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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 120b566d1df22a0a4543ac0e8aef875c49dd2c21 / . / drivers / media / platform / allegro-dvt / nal-hevc.h
blob: fc994d4242d82d7dae2714e296a1710cbfed87be [file] [log] [blame]
Michael Tretter7f8e4382020-12-03 12:00:51 +0100[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2019 Pengutronix, Michael Tretter <kernel@pengutronix.de>
4 *
5 * Convert NAL units between raw byte sequence payloads (RBSP) and C structs.
6 */
7
8#ifndef __NAL_HEVC_H__
9#define __NAL_HEVC_H__
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <media/v4l2-ctrls.h>
14
15struct nal_hevc_profile_tier_level {
16 unsigned int general_profile_space;
17 unsigned int general_tier_flag;
18 unsigned int general_profile_idc;
19 unsigned int general_profile_compatibility_flag[32];
20 unsigned int general_progressive_source_flag;
21 unsigned int general_interlaced_source_flag;
22 unsigned int general_non_packed_constraint_flag;
23 unsigned int general_frame_only_constraint_flag;
24 union {
25 struct {
26 unsigned int general_max_12bit_constraint_flag;
27 unsigned int general_max_10bit_constraint_flag;
28 unsigned int general_max_8bit_constraint_flag;
29 unsigned int general_max_422chroma_constraint_flag;
30 unsigned int general_max_420chroma_constraint_flag;
31 unsigned int general_max_monochrome_constraint_flag;
32 unsigned int general_intra_constraint_flag;
33 unsigned int general_one_picture_only_constraint_flag;
34 unsigned int general_lower_bit_rate_constraint_flag;
35 union {
36 struct {
37 unsigned int general_max_14bit_constraint_flag;
38 unsigned int general_reserved_zero_33bits;
39 };
40 unsigned int general_reserved_zero_34bits;
41 };
42 };
43 struct {
44 unsigned int general_reserved_zero_7bits;
45 /* unsigned int general_one_picture_only_constraint_flag; */
46 unsigned int general_reserved_zero_35bits;
47 };
48 unsigned int general_reserved_zero_43bits;
49 };
50 union {
51 unsigned int general_inbld_flag;
52 unsigned int general_reserved_zero_bit;
53 };
54 unsigned int general_level_idc;
55};
56
57/**
58 * struct nal_hevc_vps - Video parameter set
59 *
60 * C struct representation of the video parameter set NAL unit as defined by
61 * Rec. ITU-T H.265 (02/2018) 7.3.2.1 Video parameter set RBSP syntax
62 */
63struct nal_hevc_vps {
64 unsigned int video_parameter_set_id;
65 unsigned int base_layer_internal_flag;
66 unsigned int base_layer_available_flag;
67 unsigned int max_layers_minus1;
68 unsigned int max_sub_layers_minus1;
69 unsigned int temporal_id_nesting_flag;
70 struct nal_hevc_profile_tier_level profile_tier_level;
71 unsigned int sub_layer_ordering_info_present_flag;
72 struct {
73 unsigned int max_dec_pic_buffering_minus1[7];
74 unsigned int max_num_reorder_pics[7];
75 unsigned int max_latency_increase_plus1[7];
76 };
77 unsigned int max_layer_id;
78 unsigned int num_layer_sets_minus1;
79 unsigned int layer_id_included_flag[1024][64];
80 unsigned int timing_info_present_flag;
81 struct {
82 unsigned int num_units_in_tick;
83 unsigned int time_scale;
84 unsigned int poc_proportional_to_timing_flag;
85 unsigned int num_ticks_poc_diff_one_minus1;
86 unsigned int num_hrd_parameters;
87 struct {
88 unsigned int hrd_layer_set_idx[0];
89 unsigned int cprms_present_flag[0];
90 };
91 /* hrd_parameters( cprms_present_flag[ i ], max_sub_layers_minus1 ) */
92 };
93 unsigned int extension_flag;
94 unsigned int extension_data_flag;
95};
96
97struct nal_hevc_sub_layer_hrd_parameters {
98 unsigned int bit_rate_value_minus1[1];
99 unsigned int cpb_size_value_minus1[1];
100 unsigned int cbr_flag[1];
101};
102
103struct nal_hevc_hrd_parameters {
104 unsigned int nal_hrd_parameters_present_flag;
105 unsigned int vcl_hrd_parameters_present_flag;
106 struct {
107 unsigned int sub_pic_hrd_params_present_flag;
108 struct {
109 unsigned int tick_divisor_minus2;
110 unsigned int du_cpb_removal_delay_increment_length_minus1;
111 unsigned int sub_pic_cpb_params_in_pic_timing_sei_flag;
112 unsigned int dpb_output_delay_du_length_minus1;
113 };
114 unsigned int bit_rate_scale;
115 unsigned int cpb_size_scale;
116 unsigned int cpb_size_du_scale;
117 unsigned int initial_cpb_removal_delay_length_minus1;
118 unsigned int au_cpb_removal_delay_length_minus1;
119 unsigned int dpb_output_delay_length_minus1;
120 };
121 struct {
122 unsigned int fixed_pic_rate_general_flag[1];
123 unsigned int fixed_pic_rate_within_cvs_flag[1];
124 unsigned int elemental_duration_in_tc_minus1[1];
125 unsigned int low_delay_hrd_flag[1];
126 unsigned int cpb_cnt_minus1[1];
127 struct nal_hevc_sub_layer_hrd_parameters nal_hrd[1];
128 struct nal_hevc_sub_layer_hrd_parameters vcl_hrd[1];
129 };
130};
131
132/**
133 * struct nal_hevc_vui_parameters - VUI parameters
134 *
135 * C struct representation of the VUI parameters as defined by Rec. ITU-T
136 * H.265 (02/2018) E.2.1 VUI parameters syntax.
137 */
138struct nal_hevc_vui_parameters {
139 unsigned int aspect_ratio_info_present_flag;
140 struct {
141 unsigned int aspect_ratio_idc;
142 unsigned int sar_width;
143 unsigned int sar_height;
144 };
145 unsigned int overscan_info_present_flag;
146 unsigned int overscan_appropriate_flag;
147 unsigned int video_signal_type_present_flag;
148 struct {
149 unsigned int video_format;
150 unsigned int video_full_range_flag;
151 unsigned int colour_description_present_flag;
152 struct {
153 unsigned int colour_primaries;
154 unsigned int transfer_characteristics;
155 unsigned int matrix_coeffs;
156 };
157 };
158 unsigned int chroma_loc_info_present_flag;
159 struct {
160 unsigned int chroma_sample_loc_type_top_field;
161 unsigned int chroma_sample_loc_type_bottom_field;
162 };
163 unsigned int neutral_chroma_indication_flag;
164 unsigned int field_seq_flag;
165 unsigned int frame_field_info_present_flag;
166 unsigned int default_display_window_flag;
167 struct {
168 unsigned int def_disp_win_left_offset;
169 unsigned int def_disp_win_right_offset;
170 unsigned int def_disp_win_top_offset;
171 unsigned int def_disp_win_bottom_offset;
172 };
173 unsigned int vui_timing_info_present_flag;
174 struct {
175 unsigned int vui_num_units_in_tick;
176 unsigned int vui_time_scale;
177 unsigned int vui_poc_proportional_to_timing_flag;
178 unsigned int vui_num_ticks_poc_diff_one_minus1;
179 unsigned int vui_hrd_parameters_present_flag;
180 struct nal_hevc_hrd_parameters nal_hrd_parameters;
181 };
182 unsigned int bitstream_restriction_flag;
183 struct {
184 unsigned int tiles_fixed_structure_flag;
185 unsigned int motion_vectors_over_pic_boundaries_flag;
186 unsigned int restricted_ref_pic_lists_flag;
187 unsigned int min_spatial_segmentation_idc;
188 unsigned int max_bytes_per_pic_denom;
189 unsigned int max_bits_per_min_cu_denom;
190 unsigned int log2_max_mv_length_horizontal;
191 unsigned int log2_max_mv_length_vertical;
192 };
193};
194
195/**
196 * struct nal_hevc_sps - Sequence parameter set
197 *
198 * C struct representation of the video parameter set NAL unit as defined by
199 * Rec. ITU-T H.265 (02/2018) 7.3.2.2 Sequence parameter set RBSP syntax
200 */
201struct nal_hevc_sps {
202 unsigned int video_parameter_set_id;
203 unsigned int max_sub_layers_minus1;
204 unsigned int temporal_id_nesting_flag;
205 struct nal_hevc_profile_tier_level profile_tier_level;
206 unsigned int seq_parameter_set_id;
207 unsigned int chroma_format_idc;
208 unsigned int separate_colour_plane_flag;
209 unsigned int pic_width_in_luma_samples;
210 unsigned int pic_height_in_luma_samples;
211 unsigned int conformance_window_flag;
212 struct {
213 unsigned int conf_win_left_offset;
214 unsigned int conf_win_right_offset;
215 unsigned int conf_win_top_offset;
216 unsigned int conf_win_bottom_offset;
217 };
218
219 unsigned int bit_depth_luma_minus8;
220 unsigned int bit_depth_chroma_minus8;
221 unsigned int log2_max_pic_order_cnt_lsb_minus4;
222 unsigned int sub_layer_ordering_info_present_flag;
223 struct {
224 unsigned int max_dec_pic_buffering_minus1[7];
225 unsigned int max_num_reorder_pics[7];
226 unsigned int max_latency_increase_plus1[7];
227 };
228 unsigned int log2_min_luma_coding_block_size_minus3;
229 unsigned int log2_diff_max_min_luma_coding_block_size;
230 unsigned int log2_min_luma_transform_block_size_minus2;
231 unsigned int log2_diff_max_min_luma_transform_block_size;
232 unsigned int max_transform_hierarchy_depth_inter;
233 unsigned int max_transform_hierarchy_depth_intra;
234
235 unsigned int scaling_list_enabled_flag;
236 unsigned int scaling_list_data_present_flag;
237 unsigned int amp_enabled_flag;
238 unsigned int sample_adaptive_offset_enabled_flag;
239 unsigned int pcm_enabled_flag;
240 struct {
241 unsigned int pcm_sample_bit_depth_luma_minus1;
242 unsigned int pcm_sample_bit_depth_chroma_minus1;
243 unsigned int log2_min_pcm_luma_coding_block_size_minus3;
244 unsigned int log2_diff_max_min_pcm_luma_coding_block_size;
245 unsigned int pcm_loop_filter_disabled_flag;
246 };
247
248 unsigned int num_short_term_ref_pic_sets;
249 unsigned int long_term_ref_pics_present_flag;
250 unsigned int sps_temporal_mvp_enabled_flag;
251 unsigned int strong_intra_smoothing_enabled_flag;
252 unsigned int vui_parameters_present_flag;
253 struct nal_hevc_vui_parameters vui;
254 unsigned int extension_present_flag;
255 struct {
256 unsigned int sps_range_extension_flag;
257 unsigned int sps_multilayer_extension_flag;
258 unsigned int sps_3d_extension_flag;
259 unsigned int sps_scc_extension_flag;
260 unsigned int sps_extension_4bits;
261 };
262};
263
264struct nal_hevc_pps {
265 unsigned int pps_pic_parameter_set_id;
266 unsigned int pps_seq_parameter_set_id;
267 unsigned int dependent_slice_segments_enabled_flag;
268 unsigned int output_flag_present_flag;
269 unsigned int num_extra_slice_header_bits;
270 unsigned int sign_data_hiding_enabled_flag;
271 unsigned int cabac_init_present_flag;
272 unsigned int num_ref_idx_l0_default_active_minus1;
273 unsigned int num_ref_idx_l1_default_active_minus1;
274 int init_qp_minus26;
275 unsigned int constrained_intra_pred_flag;
276 unsigned int transform_skip_enabled_flag;
277 unsigned int cu_qp_delta_enabled_flag;
278 unsigned int diff_cu_qp_delta_depth;
279 int pps_cb_qp_offset;
280 int pps_cr_qp_offset;
281 unsigned int pps_slice_chroma_qp_offsets_present_flag;
282 unsigned int weighted_pred_flag;
283 unsigned int weighted_bipred_flag;
284 unsigned int transquant_bypass_enabled_flag;
285 unsigned int tiles_enabled_flag;
286 unsigned int entropy_coding_sync_enabled_flag;
287 struct {
288 unsigned int num_tile_columns_minus1;
289 unsigned int num_tile_rows_minus1;
290 unsigned int uniform_spacing_flag;
291 struct {
292 unsigned int column_width_minus1[1];
293 unsigned int row_height_minus1[1];
294 };
295 unsigned int loop_filter_across_tiles_enabled_flag;
296 };
297 unsigned int pps_loop_filter_across_slices_enabled_flag;
298 unsigned int deblocking_filter_control_present_flag;
299 struct {
300 unsigned int deblocking_filter_override_enabled_flag;
301 unsigned int pps_deblocking_filter_disabled_flag;
302 struct {
303 int pps_beta_offset_div2;
304 int pps_tc_offset_div2;
305 };
306 };
307 unsigned int pps_scaling_list_data_present_flag;
308 unsigned int lists_modification_present_flag;
309 unsigned int log2_parallel_merge_level_minus2;
310 unsigned int slice_segment_header_extension_present_flag;
311 unsigned int pps_extension_present_flag;
312 struct {
313 unsigned int pps_range_extension_flag;
314 unsigned int pps_multilayer_extension_flag;
315 unsigned int pps_3d_extension_flag;
316 unsigned int pps_scc_extension_flag;
317 unsigned int pps_extension_4bits;
318 };
319};
320
321int nal_hevc_profile_from_v4l2(enum v4l2_mpeg_video_hevc_profile profile);
322int nal_hevc_tier_from_v4l2(enum v4l2_mpeg_video_hevc_tier tier);
323int nal_hevc_level_from_v4l2(enum v4l2_mpeg_video_hevc_level level);
324
325int nal_range_from_v4l2(enum v4l2_quantization quantization);
326int nal_color_primaries_from_v4l2(enum v4l2_colorspace colorspace);
327int nal_transfer_characteristics_from_v4l2(enum v4l2_colorspace colorspace,
328 enum v4l2_xfer_func xfer_func);
329int nal_matrix_coeffs_from_v4l2(enum v4l2_colorspace colorspace,
330 enum v4l2_ycbcr_encoding ycbcr_encoding);
331
332ssize_t nal_hevc_write_vps(const struct device *dev,
333 void *dest, size_t n, struct nal_hevc_vps *vps);
334ssize_t nal_hevc_read_vps(const struct device *dev,
335 struct nal_hevc_vps *vps, void *src, size_t n);
336
337ssize_t nal_hevc_write_sps(const struct device *dev,
338 void *dest, size_t n, struct nal_hevc_sps *sps);
339ssize_t nal_hevc_read_sps(const struct device *dev,
340 struct nal_hevc_sps *sps, void *src, size_t n);
341
342ssize_t nal_hevc_write_pps(const struct device *dev,
343 void *dest, size_t n, struct nal_hevc_pps *pps);
344ssize_t nal_hevc_read_pps(const struct device *dev,
345 struct nal_hevc_pps *pps, void *src, size_t n);
346
347ssize_t nal_hevc_write_filler(const struct device *dev, void *dest, size_t n);
348ssize_t nal_hevc_read_filler(const struct device *dev, void *src, size_t n);
349
350#endif /* __NAL_HEVC_H__ */