Christoph Hellwig | 5d8762d | 2019-02-18 09:34:21 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2 | /* |
| 3 | * NVMe over Fabrics RDMA host code. |
| 4 | * Copyright (c) 2015-2016 HGST, a Western Digital Company. |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 5 | */ |
| 6 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 7 | #include <linux/module.h> |
| 8 | #include <linux/init.h> |
| 9 | #include <linux/slab.h> |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 10 | #include <rdma/mr_pool.h> |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 11 | #include <linux/err.h> |
| 12 | #include <linux/string.h> |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 13 | #include <linux/atomic.h> |
| 14 | #include <linux/blk-mq.h> |
Sagi Grimberg | 0b36658 | 2017-07-13 11:09:44 +0300 | [diff] [blame] | 15 | #include <linux/blk-mq-rdma.h> |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 16 | #include <linux/types.h> |
| 17 | #include <linux/list.h> |
| 18 | #include <linux/mutex.h> |
| 19 | #include <linux/scatterlist.h> |
| 20 | #include <linux/nvme.h> |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 21 | #include <asm/unaligned.h> |
| 22 | |
| 23 | #include <rdma/ib_verbs.h> |
| 24 | #include <rdma/rdma_cm.h> |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 25 | #include <linux/nvme-rdma.h> |
| 26 | |
| 27 | #include "nvme.h" |
| 28 | #include "fabrics.h" |
| 29 | |
| 30 | |
Sagi Grimberg | 782d820 | 2017-03-21 16:32:38 +0200 | [diff] [blame] | 31 | #define NVME_RDMA_CONNECT_TIMEOUT_MS 3000 /* 3 second */ |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 32 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 33 | #define NVME_RDMA_MAX_SEGMENTS 256 |
| 34 | |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 35 | #define NVME_RDMA_MAX_INLINE_SEGMENTS 4 |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 36 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 37 | struct nvme_rdma_device { |
Max Gurtovoy | f87c89a | 2017-10-23 12:59:27 +0300 | [diff] [blame] | 38 | struct ib_device *dev; |
| 39 | struct ib_pd *pd; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 40 | struct kref ref; |
| 41 | struct list_head entry; |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 42 | unsigned int num_inline_segments; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 43 | }; |
| 44 | |
| 45 | struct nvme_rdma_qe { |
| 46 | struct ib_cqe cqe; |
| 47 | void *data; |
| 48 | u64 dma; |
| 49 | }; |
| 50 | |
| 51 | struct nvme_rdma_queue; |
| 52 | struct nvme_rdma_request { |
Christoph Hellwig | d49187e | 2016-11-10 07:32:33 -0800 | [diff] [blame] | 53 | struct nvme_request req; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 54 | struct ib_mr *mr; |
| 55 | struct nvme_rdma_qe sqe; |
Sagi Grimberg | 4af7f7f | 2017-11-23 17:35:22 +0200 | [diff] [blame] | 56 | union nvme_result result; |
| 57 | __le16 status; |
| 58 | refcount_t ref; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 59 | struct ib_sge sge[1 + NVME_RDMA_MAX_INLINE_SEGMENTS]; |
| 60 | u32 num_sge; |
| 61 | int nents; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 62 | struct ib_reg_wr reg_wr; |
| 63 | struct ib_cqe reg_cqe; |
| 64 | struct nvme_rdma_queue *queue; |
| 65 | struct sg_table sg_table; |
| 66 | struct scatterlist first_sgl[]; |
| 67 | }; |
| 68 | |
| 69 | enum nvme_rdma_queue_flags { |
Sagi Grimberg | 5013e98 | 2017-10-11 15:29:12 +0300 | [diff] [blame] | 70 | NVME_RDMA_Q_ALLOCATED = 0, |
| 71 | NVME_RDMA_Q_LIVE = 1, |
Max Gurtovoy | eb1bd24 | 2017-11-28 18:28:44 +0200 | [diff] [blame] | 72 | NVME_RDMA_Q_TR_READY = 2, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 73 | }; |
| 74 | |
| 75 | struct nvme_rdma_queue { |
| 76 | struct nvme_rdma_qe *rsp_ring; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 77 | int queue_size; |
| 78 | size_t cmnd_capsule_len; |
| 79 | struct nvme_rdma_ctrl *ctrl; |
| 80 | struct nvme_rdma_device *device; |
| 81 | struct ib_cq *ib_cq; |
| 82 | struct ib_qp *qp; |
| 83 | |
| 84 | unsigned long flags; |
| 85 | struct rdma_cm_id *cm_id; |
| 86 | int cm_error; |
| 87 | struct completion cm_done; |
| 88 | }; |
| 89 | |
| 90 | struct nvme_rdma_ctrl { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 91 | /* read only in the hot path */ |
| 92 | struct nvme_rdma_queue *queues; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 93 | |
| 94 | /* other member variables */ |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 95 | struct blk_mq_tag_set tag_set; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 96 | struct work_struct err_work; |
| 97 | |
| 98 | struct nvme_rdma_qe async_event_sqe; |
| 99 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 100 | struct delayed_work reconnect_work; |
| 101 | |
| 102 | struct list_head list; |
| 103 | |
| 104 | struct blk_mq_tag_set admin_tag_set; |
| 105 | struct nvme_rdma_device *device; |
| 106 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 107 | u32 max_fr_pages; |
| 108 | |
Sagi Grimberg | 0928f9b | 2017-02-05 21:49:32 +0200 | [diff] [blame] | 109 | struct sockaddr_storage addr; |
| 110 | struct sockaddr_storage src_addr; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 111 | |
| 112 | struct nvme_ctrl ctrl; |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 113 | bool use_inline_data; |
Sagi Grimberg | b1064d3 | 2019-01-18 16:43:24 -0800 | [diff] [blame] | 114 | u32 io_queues[HCTX_MAX_TYPES]; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 115 | }; |
| 116 | |
| 117 | static inline struct nvme_rdma_ctrl *to_rdma_ctrl(struct nvme_ctrl *ctrl) |
| 118 | { |
| 119 | return container_of(ctrl, struct nvme_rdma_ctrl, ctrl); |
| 120 | } |
| 121 | |
| 122 | static LIST_HEAD(device_list); |
| 123 | static DEFINE_MUTEX(device_list_mutex); |
| 124 | |
| 125 | static LIST_HEAD(nvme_rdma_ctrl_list); |
| 126 | static DEFINE_MUTEX(nvme_rdma_ctrl_mutex); |
| 127 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 128 | /* |
| 129 | * Disabling this option makes small I/O goes faster, but is fundamentally |
| 130 | * unsafe. With it turned off we will have to register a global rkey that |
| 131 | * allows read and write access to all physical memory. |
| 132 | */ |
| 133 | static bool register_always = true; |
| 134 | module_param(register_always, bool, 0444); |
| 135 | MODULE_PARM_DESC(register_always, |
| 136 | "Use memory registration even for contiguous memory regions"); |
| 137 | |
| 138 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, |
| 139 | struct rdma_cm_event *event); |
| 140 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 141 | |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 142 | static const struct blk_mq_ops nvme_rdma_mq_ops; |
| 143 | static const struct blk_mq_ops nvme_rdma_admin_mq_ops; |
| 144 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 145 | /* XXX: really should move to a generic header sooner or later.. */ |
| 146 | static inline void put_unaligned_le24(u32 val, u8 *p) |
| 147 | { |
| 148 | *p++ = val; |
| 149 | *p++ = val >> 8; |
| 150 | *p++ = val >> 16; |
| 151 | } |
| 152 | |
| 153 | static inline int nvme_rdma_queue_idx(struct nvme_rdma_queue *queue) |
| 154 | { |
| 155 | return queue - queue->ctrl->queues; |
| 156 | } |
| 157 | |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 158 | static bool nvme_rdma_poll_queue(struct nvme_rdma_queue *queue) |
| 159 | { |
| 160 | return nvme_rdma_queue_idx(queue) > |
Sagi Grimberg | b1064d3 | 2019-01-18 16:43:24 -0800 | [diff] [blame] | 161 | queue->ctrl->io_queues[HCTX_TYPE_DEFAULT] + |
| 162 | queue->ctrl->io_queues[HCTX_TYPE_READ]; |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 163 | } |
| 164 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 165 | static inline size_t nvme_rdma_inline_data_size(struct nvme_rdma_queue *queue) |
| 166 | { |
| 167 | return queue->cmnd_capsule_len - sizeof(struct nvme_command); |
| 168 | } |
| 169 | |
| 170 | static void nvme_rdma_free_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, |
| 171 | size_t capsule_size, enum dma_data_direction dir) |
| 172 | { |
| 173 | ib_dma_unmap_single(ibdev, qe->dma, capsule_size, dir); |
| 174 | kfree(qe->data); |
| 175 | } |
| 176 | |
| 177 | static int nvme_rdma_alloc_qe(struct ib_device *ibdev, struct nvme_rdma_qe *qe, |
| 178 | size_t capsule_size, enum dma_data_direction dir) |
| 179 | { |
| 180 | qe->data = kzalloc(capsule_size, GFP_KERNEL); |
| 181 | if (!qe->data) |
| 182 | return -ENOMEM; |
| 183 | |
| 184 | qe->dma = ib_dma_map_single(ibdev, qe->data, capsule_size, dir); |
| 185 | if (ib_dma_mapping_error(ibdev, qe->dma)) { |
| 186 | kfree(qe->data); |
Prabhath Sajeepa | 6344d02 | 2018-11-28 11:11:29 -0700 | [diff] [blame] | 187 | qe->data = NULL; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 188 | return -ENOMEM; |
| 189 | } |
| 190 | |
| 191 | return 0; |
| 192 | } |
| 193 | |
| 194 | static void nvme_rdma_free_ring(struct ib_device *ibdev, |
| 195 | struct nvme_rdma_qe *ring, size_t ib_queue_size, |
| 196 | size_t capsule_size, enum dma_data_direction dir) |
| 197 | { |
| 198 | int i; |
| 199 | |
| 200 | for (i = 0; i < ib_queue_size; i++) |
| 201 | nvme_rdma_free_qe(ibdev, &ring[i], capsule_size, dir); |
| 202 | kfree(ring); |
| 203 | } |
| 204 | |
| 205 | static struct nvme_rdma_qe *nvme_rdma_alloc_ring(struct ib_device *ibdev, |
| 206 | size_t ib_queue_size, size_t capsule_size, |
| 207 | enum dma_data_direction dir) |
| 208 | { |
| 209 | struct nvme_rdma_qe *ring; |
| 210 | int i; |
| 211 | |
| 212 | ring = kcalloc(ib_queue_size, sizeof(struct nvme_rdma_qe), GFP_KERNEL); |
| 213 | if (!ring) |
| 214 | return NULL; |
| 215 | |
| 216 | for (i = 0; i < ib_queue_size; i++) { |
| 217 | if (nvme_rdma_alloc_qe(ibdev, &ring[i], capsule_size, dir)) |
| 218 | goto out_free_ring; |
| 219 | } |
| 220 | |
| 221 | return ring; |
| 222 | |
| 223 | out_free_ring: |
| 224 | nvme_rdma_free_ring(ibdev, ring, i, capsule_size, dir); |
| 225 | return NULL; |
| 226 | } |
| 227 | |
| 228 | static void nvme_rdma_qp_event(struct ib_event *event, void *context) |
| 229 | { |
Max Gurtovoy | 27a4bee | 2016-11-23 11:38:48 +0200 | [diff] [blame] | 230 | pr_debug("QP event %s (%d)\n", |
| 231 | ib_event_msg(event->event), event->event); |
| 232 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 233 | } |
| 234 | |
| 235 | static int nvme_rdma_wait_for_cm(struct nvme_rdma_queue *queue) |
| 236 | { |
Bart Van Assche | 35da77d | 2018-10-08 14:28:54 -0700 | [diff] [blame] | 237 | int ret; |
| 238 | |
| 239 | ret = wait_for_completion_interruptible_timeout(&queue->cm_done, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 240 | msecs_to_jiffies(NVME_RDMA_CONNECT_TIMEOUT_MS) + 1); |
Bart Van Assche | 35da77d | 2018-10-08 14:28:54 -0700 | [diff] [blame] | 241 | if (ret < 0) |
| 242 | return ret; |
| 243 | if (ret == 0) |
| 244 | return -ETIMEDOUT; |
| 245 | WARN_ON_ONCE(queue->cm_error > 0); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 246 | return queue->cm_error; |
| 247 | } |
| 248 | |
| 249 | static int nvme_rdma_create_qp(struct nvme_rdma_queue *queue, const int factor) |
| 250 | { |
| 251 | struct nvme_rdma_device *dev = queue->device; |
| 252 | struct ib_qp_init_attr init_attr; |
| 253 | int ret; |
| 254 | |
| 255 | memset(&init_attr, 0, sizeof(init_attr)); |
| 256 | init_attr.event_handler = nvme_rdma_qp_event; |
| 257 | /* +1 for drain */ |
| 258 | init_attr.cap.max_send_wr = factor * queue->queue_size + 1; |
| 259 | /* +1 for drain */ |
| 260 | init_attr.cap.max_recv_wr = queue->queue_size + 1; |
| 261 | init_attr.cap.max_recv_sge = 1; |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 262 | init_attr.cap.max_send_sge = 1 + dev->num_inline_segments; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 263 | init_attr.sq_sig_type = IB_SIGNAL_REQ_WR; |
| 264 | init_attr.qp_type = IB_QPT_RC; |
| 265 | init_attr.send_cq = queue->ib_cq; |
| 266 | init_attr.recv_cq = queue->ib_cq; |
| 267 | |
| 268 | ret = rdma_create_qp(queue->cm_id, dev->pd, &init_attr); |
| 269 | |
| 270 | queue->qp = queue->cm_id->qp; |
| 271 | return ret; |
| 272 | } |
| 273 | |
Christoph Hellwig | 385475e | 2017-06-13 09:15:19 +0200 | [diff] [blame] | 274 | static void nvme_rdma_exit_request(struct blk_mq_tag_set *set, |
| 275 | struct request *rq, unsigned int hctx_idx) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 276 | { |
Christoph Hellwig | 385475e | 2017-06-13 09:15:19 +0200 | [diff] [blame] | 277 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 278 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
Christoph Hellwig | 385475e | 2017-06-13 09:15:19 +0200 | [diff] [blame] | 279 | int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 280 | struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; |
| 281 | struct nvme_rdma_device *dev = queue->device; |
| 282 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 283 | nvme_rdma_free_qe(dev->dev, &req->sqe, sizeof(struct nvme_command), |
| 284 | DMA_TO_DEVICE); |
| 285 | } |
| 286 | |
Christoph Hellwig | 385475e | 2017-06-13 09:15:19 +0200 | [diff] [blame] | 287 | static int nvme_rdma_init_request(struct blk_mq_tag_set *set, |
| 288 | struct request *rq, unsigned int hctx_idx, |
| 289 | unsigned int numa_node) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 290 | { |
Christoph Hellwig | 385475e | 2017-06-13 09:15:19 +0200 | [diff] [blame] | 291 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 292 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
Christoph Hellwig | 385475e | 2017-06-13 09:15:19 +0200 | [diff] [blame] | 293 | int queue_idx = (set == &ctrl->tag_set) ? hctx_idx + 1 : 0; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 294 | struct nvme_rdma_queue *queue = &ctrl->queues[queue_idx]; |
| 295 | struct nvme_rdma_device *dev = queue->device; |
| 296 | struct ib_device *ibdev = dev->dev; |
| 297 | int ret; |
| 298 | |
Sagi Grimberg | 59e29ce | 2018-06-29 16:50:00 -0600 | [diff] [blame] | 299 | nvme_req(rq)->ctrl = &ctrl->ctrl; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 300 | ret = nvme_rdma_alloc_qe(ibdev, &req->sqe, sizeof(struct nvme_command), |
| 301 | DMA_TO_DEVICE); |
| 302 | if (ret) |
| 303 | return ret; |
| 304 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 305 | req->queue = queue; |
| 306 | |
| 307 | return 0; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 308 | } |
| 309 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 310 | static int nvme_rdma_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, |
| 311 | unsigned int hctx_idx) |
| 312 | { |
| 313 | struct nvme_rdma_ctrl *ctrl = data; |
| 314 | struct nvme_rdma_queue *queue = &ctrl->queues[hctx_idx + 1]; |
| 315 | |
Sagi Grimberg | d858e5f | 2017-04-24 10:58:29 +0300 | [diff] [blame] | 316 | BUG_ON(hctx_idx >= ctrl->ctrl.queue_count); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 317 | |
| 318 | hctx->driver_data = queue; |
| 319 | return 0; |
| 320 | } |
| 321 | |
| 322 | static int nvme_rdma_init_admin_hctx(struct blk_mq_hw_ctx *hctx, void *data, |
| 323 | unsigned int hctx_idx) |
| 324 | { |
| 325 | struct nvme_rdma_ctrl *ctrl = data; |
| 326 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; |
| 327 | |
| 328 | BUG_ON(hctx_idx != 0); |
| 329 | |
| 330 | hctx->driver_data = queue; |
| 331 | return 0; |
| 332 | } |
| 333 | |
| 334 | static void nvme_rdma_free_dev(struct kref *ref) |
| 335 | { |
| 336 | struct nvme_rdma_device *ndev = |
| 337 | container_of(ref, struct nvme_rdma_device, ref); |
| 338 | |
| 339 | mutex_lock(&device_list_mutex); |
| 340 | list_del(&ndev->entry); |
| 341 | mutex_unlock(&device_list_mutex); |
| 342 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 343 | ib_dealloc_pd(ndev->pd); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 344 | kfree(ndev); |
| 345 | } |
| 346 | |
| 347 | static void nvme_rdma_dev_put(struct nvme_rdma_device *dev) |
| 348 | { |
| 349 | kref_put(&dev->ref, nvme_rdma_free_dev); |
| 350 | } |
| 351 | |
| 352 | static int nvme_rdma_dev_get(struct nvme_rdma_device *dev) |
| 353 | { |
| 354 | return kref_get_unless_zero(&dev->ref); |
| 355 | } |
| 356 | |
| 357 | static struct nvme_rdma_device * |
| 358 | nvme_rdma_find_get_device(struct rdma_cm_id *cm_id) |
| 359 | { |
| 360 | struct nvme_rdma_device *ndev; |
| 361 | |
| 362 | mutex_lock(&device_list_mutex); |
| 363 | list_for_each_entry(ndev, &device_list, entry) { |
| 364 | if (ndev->dev->node_guid == cm_id->device->node_guid && |
| 365 | nvme_rdma_dev_get(ndev)) |
| 366 | goto out_unlock; |
| 367 | } |
| 368 | |
| 369 | ndev = kzalloc(sizeof(*ndev), GFP_KERNEL); |
| 370 | if (!ndev) |
| 371 | goto out_err; |
| 372 | |
| 373 | ndev->dev = cm_id->device; |
| 374 | kref_init(&ndev->ref); |
| 375 | |
Christoph Hellwig | 11975e0 | 2016-09-05 12:56:20 +0200 | [diff] [blame] | 376 | ndev->pd = ib_alloc_pd(ndev->dev, |
| 377 | register_always ? 0 : IB_PD_UNSAFE_GLOBAL_RKEY); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 378 | if (IS_ERR(ndev->pd)) |
| 379 | goto out_free_dev; |
| 380 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 381 | if (!(ndev->dev->attrs.device_cap_flags & |
| 382 | IB_DEVICE_MEM_MGT_EXTENSIONS)) { |
| 383 | dev_err(&ndev->dev->dev, |
| 384 | "Memory registrations not supported.\n"); |
Christoph Hellwig | 11975e0 | 2016-09-05 12:56:20 +0200 | [diff] [blame] | 385 | goto out_free_pd; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 386 | } |
| 387 | |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 388 | ndev->num_inline_segments = min(NVME_RDMA_MAX_INLINE_SEGMENTS, |
Jason Gunthorpe | 0a3173a | 2018-08-16 14:13:03 -0600 | [diff] [blame] | 389 | ndev->dev->attrs.max_send_sge - 1); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 390 | list_add(&ndev->entry, &device_list); |
| 391 | out_unlock: |
| 392 | mutex_unlock(&device_list_mutex); |
| 393 | return ndev; |
| 394 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 395 | out_free_pd: |
| 396 | ib_dealloc_pd(ndev->pd); |
| 397 | out_free_dev: |
| 398 | kfree(ndev); |
| 399 | out_err: |
| 400 | mutex_unlock(&device_list_mutex); |
| 401 | return NULL; |
| 402 | } |
| 403 | |
| 404 | static void nvme_rdma_destroy_queue_ib(struct nvme_rdma_queue *queue) |
| 405 | { |
Max Gurtovoy | eb1bd24 | 2017-11-28 18:28:44 +0200 | [diff] [blame] | 406 | struct nvme_rdma_device *dev; |
| 407 | struct ib_device *ibdev; |
| 408 | |
| 409 | if (!test_and_clear_bit(NVME_RDMA_Q_TR_READY, &queue->flags)) |
| 410 | return; |
| 411 | |
| 412 | dev = queue->device; |
| 413 | ibdev = dev->dev; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 414 | |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 415 | ib_mr_pool_destroy(queue->qp, &queue->qp->rdma_mrs); |
| 416 | |
Max Gurtovoy | eb1bd24 | 2017-11-28 18:28:44 +0200 | [diff] [blame] | 417 | /* |
| 418 | * The cm_id object might have been destroyed during RDMA connection |
| 419 | * establishment error flow to avoid getting other cma events, thus |
| 420 | * the destruction of the QP shouldn't use rdma_cm API. |
| 421 | */ |
| 422 | ib_destroy_qp(queue->qp); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 423 | ib_free_cq(queue->ib_cq); |
| 424 | |
| 425 | nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, |
| 426 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); |
| 427 | |
| 428 | nvme_rdma_dev_put(dev); |
| 429 | } |
| 430 | |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 431 | static int nvme_rdma_get_max_fr_pages(struct ib_device *ibdev) |
| 432 | { |
| 433 | return min_t(u32, NVME_RDMA_MAX_SEGMENTS, |
| 434 | ibdev->attrs.max_fast_reg_page_list_len); |
| 435 | } |
| 436 | |
Sagi Grimberg | ca6e95b | 2017-05-04 13:33:09 +0300 | [diff] [blame] | 437 | static int nvme_rdma_create_queue_ib(struct nvme_rdma_queue *queue) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 438 | { |
Sagi Grimberg | ca6e95b | 2017-05-04 13:33:09 +0300 | [diff] [blame] | 439 | struct ib_device *ibdev; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 440 | const int send_wr_factor = 3; /* MR, SEND, INV */ |
| 441 | const int cq_factor = send_wr_factor + 1; /* + RECV */ |
| 442 | int comp_vector, idx = nvme_rdma_queue_idx(queue); |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 443 | enum ib_poll_context poll_ctx; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 444 | int ret; |
| 445 | |
Sagi Grimberg | ca6e95b | 2017-05-04 13:33:09 +0300 | [diff] [blame] | 446 | queue->device = nvme_rdma_find_get_device(queue->cm_id); |
| 447 | if (!queue->device) { |
| 448 | dev_err(queue->cm_id->device->dev.parent, |
| 449 | "no client data found!\n"); |
| 450 | return -ECONNREFUSED; |
| 451 | } |
| 452 | ibdev = queue->device->dev; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 453 | |
| 454 | /* |
Sagi Grimberg | 0b36658 | 2017-07-13 11:09:44 +0300 | [diff] [blame] | 455 | * Spread I/O queues completion vectors according their queue index. |
| 456 | * Admin queues can always go on completion vector 0. |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 457 | */ |
Sagi Grimberg | 0b36658 | 2017-07-13 11:09:44 +0300 | [diff] [blame] | 458 | comp_vector = idx == 0 ? idx : idx - 1; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 459 | |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 460 | /* Polling queues need direct cq polling context */ |
| 461 | if (nvme_rdma_poll_queue(queue)) |
| 462 | poll_ctx = IB_POLL_DIRECT; |
| 463 | else |
| 464 | poll_ctx = IB_POLL_SOFTIRQ; |
| 465 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 466 | /* +1 for ib_stop_cq */ |
Sagi Grimberg | ca6e95b | 2017-05-04 13:33:09 +0300 | [diff] [blame] | 467 | queue->ib_cq = ib_alloc_cq(ibdev, queue, |
| 468 | cq_factor * queue->queue_size + 1, |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 469 | comp_vector, poll_ctx); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 470 | if (IS_ERR(queue->ib_cq)) { |
| 471 | ret = PTR_ERR(queue->ib_cq); |
Sagi Grimberg | ca6e95b | 2017-05-04 13:33:09 +0300 | [diff] [blame] | 472 | goto out_put_dev; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 473 | } |
| 474 | |
| 475 | ret = nvme_rdma_create_qp(queue, send_wr_factor); |
| 476 | if (ret) |
| 477 | goto out_destroy_ib_cq; |
| 478 | |
| 479 | queue->rsp_ring = nvme_rdma_alloc_ring(ibdev, queue->queue_size, |
| 480 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); |
| 481 | if (!queue->rsp_ring) { |
| 482 | ret = -ENOMEM; |
| 483 | goto out_destroy_qp; |
| 484 | } |
| 485 | |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 486 | ret = ib_mr_pool_init(queue->qp, &queue->qp->rdma_mrs, |
| 487 | queue->queue_size, |
| 488 | IB_MR_TYPE_MEM_REG, |
| 489 | nvme_rdma_get_max_fr_pages(ibdev)); |
| 490 | if (ret) { |
| 491 | dev_err(queue->ctrl->ctrl.device, |
| 492 | "failed to initialize MR pool sized %d for QID %d\n", |
| 493 | queue->queue_size, idx); |
| 494 | goto out_destroy_ring; |
| 495 | } |
| 496 | |
Max Gurtovoy | eb1bd24 | 2017-11-28 18:28:44 +0200 | [diff] [blame] | 497 | set_bit(NVME_RDMA_Q_TR_READY, &queue->flags); |
| 498 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 499 | return 0; |
| 500 | |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 501 | out_destroy_ring: |
| 502 | nvme_rdma_free_ring(ibdev, queue->rsp_ring, queue->queue_size, |
| 503 | sizeof(struct nvme_completion), DMA_FROM_DEVICE); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 504 | out_destroy_qp: |
Max Gurtovoy | 1f61def | 2017-11-06 16:18:51 +0200 | [diff] [blame] | 505 | rdma_destroy_qp(queue->cm_id); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 506 | out_destroy_ib_cq: |
| 507 | ib_free_cq(queue->ib_cq); |
Sagi Grimberg | ca6e95b | 2017-05-04 13:33:09 +0300 | [diff] [blame] | 508 | out_put_dev: |
| 509 | nvme_rdma_dev_put(queue->device); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 510 | return ret; |
| 511 | } |
| 512 | |
Sagi Grimberg | 41e8cfa | 2017-07-10 09:22:36 +0300 | [diff] [blame] | 513 | static int nvme_rdma_alloc_queue(struct nvme_rdma_ctrl *ctrl, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 514 | int idx, size_t queue_size) |
| 515 | { |
| 516 | struct nvme_rdma_queue *queue; |
Max Gurtovoy | 8f4e8da | 2017-02-19 20:08:03 +0200 | [diff] [blame] | 517 | struct sockaddr *src_addr = NULL; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 518 | int ret; |
| 519 | |
| 520 | queue = &ctrl->queues[idx]; |
| 521 | queue->ctrl = ctrl; |
| 522 | init_completion(&queue->cm_done); |
| 523 | |
| 524 | if (idx > 0) |
| 525 | queue->cmnd_capsule_len = ctrl->ctrl.ioccsz * 16; |
| 526 | else |
| 527 | queue->cmnd_capsule_len = sizeof(struct nvme_command); |
| 528 | |
| 529 | queue->queue_size = queue_size; |
| 530 | |
| 531 | queue->cm_id = rdma_create_id(&init_net, nvme_rdma_cm_handler, queue, |
| 532 | RDMA_PS_TCP, IB_QPT_RC); |
| 533 | if (IS_ERR(queue->cm_id)) { |
| 534 | dev_info(ctrl->ctrl.device, |
| 535 | "failed to create CM ID: %ld\n", PTR_ERR(queue->cm_id)); |
| 536 | return PTR_ERR(queue->cm_id); |
| 537 | } |
| 538 | |
Max Gurtovoy | 8f4e8da | 2017-02-19 20:08:03 +0200 | [diff] [blame] | 539 | if (ctrl->ctrl.opts->mask & NVMF_OPT_HOST_TRADDR) |
Sagi Grimberg | 0928f9b | 2017-02-05 21:49:32 +0200 | [diff] [blame] | 540 | src_addr = (struct sockaddr *)&ctrl->src_addr; |
Max Gurtovoy | 8f4e8da | 2017-02-19 20:08:03 +0200 | [diff] [blame] | 541 | |
Sagi Grimberg | 0928f9b | 2017-02-05 21:49:32 +0200 | [diff] [blame] | 542 | queue->cm_error = -ETIMEDOUT; |
| 543 | ret = rdma_resolve_addr(queue->cm_id, src_addr, |
| 544 | (struct sockaddr *)&ctrl->addr, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 545 | NVME_RDMA_CONNECT_TIMEOUT_MS); |
| 546 | if (ret) { |
| 547 | dev_info(ctrl->ctrl.device, |
| 548 | "rdma_resolve_addr failed (%d).\n", ret); |
| 549 | goto out_destroy_cm_id; |
| 550 | } |
| 551 | |
| 552 | ret = nvme_rdma_wait_for_cm(queue); |
| 553 | if (ret) { |
| 554 | dev_info(ctrl->ctrl.device, |
Sagi Grimberg | d8bfcee | 2017-10-11 15:29:07 +0300 | [diff] [blame] | 555 | "rdma connection establishment failed (%d)\n", ret); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 556 | goto out_destroy_cm_id; |
| 557 | } |
| 558 | |
Sagi Grimberg | 5013e98 | 2017-10-11 15:29:12 +0300 | [diff] [blame] | 559 | set_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 560 | |
| 561 | return 0; |
| 562 | |
| 563 | out_destroy_cm_id: |
| 564 | rdma_destroy_id(queue->cm_id); |
Max Gurtovoy | eb1bd24 | 2017-11-28 18:28:44 +0200 | [diff] [blame] | 565 | nvme_rdma_destroy_queue_ib(queue); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 566 | return ret; |
| 567 | } |
| 568 | |
| 569 | static void nvme_rdma_stop_queue(struct nvme_rdma_queue *queue) |
| 570 | { |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 571 | if (!test_and_clear_bit(NVME_RDMA_Q_LIVE, &queue->flags)) |
| 572 | return; |
| 573 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 574 | rdma_disconnect(queue->cm_id); |
| 575 | ib_drain_qp(queue->qp); |
| 576 | } |
| 577 | |
| 578 | static void nvme_rdma_free_queue(struct nvme_rdma_queue *queue) |
| 579 | { |
Sagi Grimberg | 5013e98 | 2017-10-11 15:29:12 +0300 | [diff] [blame] | 580 | if (!test_and_clear_bit(NVME_RDMA_Q_ALLOCATED, &queue->flags)) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 581 | return; |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 582 | |
| 583 | nvme_rdma_destroy_queue_ib(queue); |
| 584 | rdma_destroy_id(queue->cm_id); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 585 | } |
| 586 | |
| 587 | static void nvme_rdma_free_io_queues(struct nvme_rdma_ctrl *ctrl) |
| 588 | { |
| 589 | int i; |
| 590 | |
Sagi Grimberg | d858e5f | 2017-04-24 10:58:29 +0300 | [diff] [blame] | 591 | for (i = 1; i < ctrl->ctrl.queue_count; i++) |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 592 | nvme_rdma_free_queue(&ctrl->queues[i]); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 593 | } |
| 594 | |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 595 | static void nvme_rdma_stop_io_queues(struct nvme_rdma_ctrl *ctrl) |
| 596 | { |
| 597 | int i; |
| 598 | |
| 599 | for (i = 1; i < ctrl->ctrl.queue_count; i++) |
| 600 | nvme_rdma_stop_queue(&ctrl->queues[i]); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 601 | } |
| 602 | |
Sagi Grimberg | 68e16fc | 2017-07-10 09:22:37 +0300 | [diff] [blame] | 603 | static int nvme_rdma_start_queue(struct nvme_rdma_ctrl *ctrl, int idx) |
| 604 | { |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 605 | struct nvme_rdma_queue *queue = &ctrl->queues[idx]; |
| 606 | bool poll = nvme_rdma_poll_queue(queue); |
Sagi Grimberg | 68e16fc | 2017-07-10 09:22:37 +0300 | [diff] [blame] | 607 | int ret; |
| 608 | |
| 609 | if (idx) |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 610 | ret = nvmf_connect_io_queue(&ctrl->ctrl, idx, poll); |
Sagi Grimberg | 68e16fc | 2017-07-10 09:22:37 +0300 | [diff] [blame] | 611 | else |
| 612 | ret = nvmf_connect_admin_queue(&ctrl->ctrl); |
| 613 | |
| 614 | if (!ret) |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 615 | set_bit(NVME_RDMA_Q_LIVE, &queue->flags); |
Sagi Grimberg | 68e16fc | 2017-07-10 09:22:37 +0300 | [diff] [blame] | 616 | else |
| 617 | dev_info(ctrl->ctrl.device, |
| 618 | "failed to connect queue: %d ret=%d\n", idx, ret); |
| 619 | return ret; |
| 620 | } |
| 621 | |
| 622 | static int nvme_rdma_start_io_queues(struct nvme_rdma_ctrl *ctrl) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 623 | { |
| 624 | int i, ret = 0; |
| 625 | |
Sagi Grimberg | d858e5f | 2017-04-24 10:58:29 +0300 | [diff] [blame] | 626 | for (i = 1; i < ctrl->ctrl.queue_count; i++) { |
Sagi Grimberg | 68e16fc | 2017-07-10 09:22:37 +0300 | [diff] [blame] | 627 | ret = nvme_rdma_start_queue(ctrl, i); |
| 628 | if (ret) |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 629 | goto out_stop_queues; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 630 | } |
| 631 | |
Steve Wise | c8dbc37 | 2016-11-08 09:16:02 -0800 | [diff] [blame] | 632 | return 0; |
| 633 | |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 634 | out_stop_queues: |
Sagi Grimberg | 68e16fc | 2017-07-10 09:22:37 +0300 | [diff] [blame] | 635 | for (i--; i >= 1; i--) |
| 636 | nvme_rdma_stop_queue(&ctrl->queues[i]); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 637 | return ret; |
| 638 | } |
| 639 | |
Sagi Grimberg | 41e8cfa | 2017-07-10 09:22:36 +0300 | [diff] [blame] | 640 | static int nvme_rdma_alloc_io_queues(struct nvme_rdma_ctrl *ctrl) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 641 | { |
Sagi Grimberg | c248c64 | 2017-03-09 13:26:07 +0200 | [diff] [blame] | 642 | struct nvmf_ctrl_options *opts = ctrl->ctrl.opts; |
Sagi Grimberg | 0b36658 | 2017-07-13 11:09:44 +0300 | [diff] [blame] | 643 | struct ib_device *ibdev = ctrl->device->dev; |
Sagi Grimberg | c248c64 | 2017-03-09 13:26:07 +0200 | [diff] [blame] | 644 | unsigned int nr_io_queues; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 645 | int i, ret; |
| 646 | |
Sagi Grimberg | c248c64 | 2017-03-09 13:26:07 +0200 | [diff] [blame] | 647 | nr_io_queues = min(opts->nr_io_queues, num_online_cpus()); |
Sagi Grimberg | 0b36658 | 2017-07-13 11:09:44 +0300 | [diff] [blame] | 648 | |
| 649 | /* |
| 650 | * we map queues according to the device irq vectors for |
| 651 | * optimal locality so we don't need more queues than |
| 652 | * completion vectors. |
| 653 | */ |
| 654 | nr_io_queues = min_t(unsigned int, nr_io_queues, |
| 655 | ibdev->num_comp_vectors); |
| 656 | |
Sagi Grimberg | b1064d3 | 2019-01-18 16:43:24 -0800 | [diff] [blame] | 657 | if (opts->nr_write_queues) { |
| 658 | ctrl->io_queues[HCTX_TYPE_DEFAULT] = |
| 659 | min(opts->nr_write_queues, nr_io_queues); |
| 660 | nr_io_queues += ctrl->io_queues[HCTX_TYPE_DEFAULT]; |
| 661 | } else { |
| 662 | ctrl->io_queues[HCTX_TYPE_DEFAULT] = nr_io_queues; |
| 663 | } |
| 664 | |
| 665 | ctrl->io_queues[HCTX_TYPE_READ] = nr_io_queues; |
| 666 | |
| 667 | if (opts->nr_poll_queues) { |
| 668 | ctrl->io_queues[HCTX_TYPE_POLL] = |
| 669 | min(opts->nr_poll_queues, num_online_cpus()); |
| 670 | nr_io_queues += ctrl->io_queues[HCTX_TYPE_POLL]; |
| 671 | } |
Sagi Grimberg | b65bb77 | 2018-12-11 23:38:58 -0800 | [diff] [blame] | 672 | |
Sagi Grimberg | c248c64 | 2017-03-09 13:26:07 +0200 | [diff] [blame] | 673 | ret = nvme_set_queue_count(&ctrl->ctrl, &nr_io_queues); |
| 674 | if (ret) |
| 675 | return ret; |
| 676 | |
Sagi Grimberg | d858e5f | 2017-04-24 10:58:29 +0300 | [diff] [blame] | 677 | ctrl->ctrl.queue_count = nr_io_queues + 1; |
| 678 | if (ctrl->ctrl.queue_count < 2) |
Sagi Grimberg | c248c64 | 2017-03-09 13:26:07 +0200 | [diff] [blame] | 679 | return 0; |
| 680 | |
| 681 | dev_info(ctrl->ctrl.device, |
| 682 | "creating %d I/O queues.\n", nr_io_queues); |
| 683 | |
Sagi Grimberg | d858e5f | 2017-04-24 10:58:29 +0300 | [diff] [blame] | 684 | for (i = 1; i < ctrl->ctrl.queue_count; i++) { |
Sagi Grimberg | 41e8cfa | 2017-07-10 09:22:36 +0300 | [diff] [blame] | 685 | ret = nvme_rdma_alloc_queue(ctrl, i, |
| 686 | ctrl->ctrl.sqsize + 1); |
| 687 | if (ret) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 688 | goto out_free_queues; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 689 | } |
| 690 | |
| 691 | return 0; |
| 692 | |
| 693 | out_free_queues: |
Steve Wise | f361e5a | 2016-09-02 09:01:27 -0700 | [diff] [blame] | 694 | for (i--; i >= 1; i--) |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 695 | nvme_rdma_free_queue(&ctrl->queues[i]); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 696 | |
| 697 | return ret; |
| 698 | } |
| 699 | |
Sagi Grimberg | 60070c7 | 2017-10-11 15:29:06 +0300 | [diff] [blame] | 700 | static void nvme_rdma_free_tagset(struct nvme_ctrl *nctrl, |
| 701 | struct blk_mq_tag_set *set) |
Sagi Grimberg | b28a308 | 2017-07-10 09:22:30 +0300 | [diff] [blame] | 702 | { |
| 703 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); |
Sagi Grimberg | b28a308 | 2017-07-10 09:22:30 +0300 | [diff] [blame] | 704 | |
| 705 | blk_mq_free_tag_set(set); |
| 706 | nvme_rdma_dev_put(ctrl->device); |
| 707 | } |
| 708 | |
| 709 | static struct blk_mq_tag_set *nvme_rdma_alloc_tagset(struct nvme_ctrl *nctrl, |
| 710 | bool admin) |
| 711 | { |
| 712 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); |
| 713 | struct blk_mq_tag_set *set; |
| 714 | int ret; |
| 715 | |
| 716 | if (admin) { |
| 717 | set = &ctrl->admin_tag_set; |
| 718 | memset(set, 0, sizeof(*set)); |
| 719 | set->ops = &nvme_rdma_admin_mq_ops; |
Keith Busch | 38dabe2 | 2017-11-07 15:13:10 -0700 | [diff] [blame] | 720 | set->queue_depth = NVME_AQ_MQ_TAG_DEPTH; |
Sagi Grimberg | b28a308 | 2017-07-10 09:22:30 +0300 | [diff] [blame] | 721 | set->reserved_tags = 2; /* connect + keep-alive */ |
Hannes Reinecke | 103e515 | 2018-11-16 09:22:29 +0100 | [diff] [blame] | 722 | set->numa_node = nctrl->numa_node; |
Sagi Grimberg | b28a308 | 2017-07-10 09:22:30 +0300 | [diff] [blame] | 723 | set->cmd_size = sizeof(struct nvme_rdma_request) + |
| 724 | SG_CHUNK_SIZE * sizeof(struct scatterlist); |
| 725 | set->driver_data = ctrl; |
| 726 | set->nr_hw_queues = 1; |
| 727 | set->timeout = ADMIN_TIMEOUT; |
Israel Rukshin | 94f29d4 | 2017-10-18 12:38:24 +0000 | [diff] [blame] | 728 | set->flags = BLK_MQ_F_NO_SCHED; |
Sagi Grimberg | b28a308 | 2017-07-10 09:22:30 +0300 | [diff] [blame] | 729 | } else { |
| 730 | set = &ctrl->tag_set; |
| 731 | memset(set, 0, sizeof(*set)); |
| 732 | set->ops = &nvme_rdma_mq_ops; |
Sagi Grimberg | 5e77d61 | 2018-06-19 15:34:13 +0300 | [diff] [blame] | 733 | set->queue_depth = nctrl->sqsize + 1; |
Sagi Grimberg | b28a308 | 2017-07-10 09:22:30 +0300 | [diff] [blame] | 734 | set->reserved_tags = 1; /* fabric connect */ |
Hannes Reinecke | 103e515 | 2018-11-16 09:22:29 +0100 | [diff] [blame] | 735 | set->numa_node = nctrl->numa_node; |
Sagi Grimberg | b28a308 | 2017-07-10 09:22:30 +0300 | [diff] [blame] | 736 | set->flags = BLK_MQ_F_SHOULD_MERGE; |
| 737 | set->cmd_size = sizeof(struct nvme_rdma_request) + |
| 738 | SG_CHUNK_SIZE * sizeof(struct scatterlist); |
| 739 | set->driver_data = ctrl; |
| 740 | set->nr_hw_queues = nctrl->queue_count - 1; |
| 741 | set->timeout = NVME_IO_TIMEOUT; |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 742 | set->nr_maps = nctrl->opts->nr_poll_queues ? HCTX_MAX_TYPES : 2; |
Sagi Grimberg | b28a308 | 2017-07-10 09:22:30 +0300 | [diff] [blame] | 743 | } |
| 744 | |
| 745 | ret = blk_mq_alloc_tag_set(set); |
| 746 | if (ret) |
| 747 | goto out; |
| 748 | |
| 749 | /* |
| 750 | * We need a reference on the device as long as the tag_set is alive, |
| 751 | * as the MRs in the request structures need a valid ib_device. |
| 752 | */ |
| 753 | ret = nvme_rdma_dev_get(ctrl->device); |
| 754 | if (!ret) { |
| 755 | ret = -EINVAL; |
| 756 | goto out_free_tagset; |
| 757 | } |
| 758 | |
| 759 | return set; |
| 760 | |
| 761 | out_free_tagset: |
| 762 | blk_mq_free_tag_set(set); |
| 763 | out: |
| 764 | return ERR_PTR(ret); |
| 765 | } |
| 766 | |
Sagi Grimberg | 3f02fff | 2017-07-10 09:22:32 +0300 | [diff] [blame] | 767 | static void nvme_rdma_destroy_admin_queue(struct nvme_rdma_ctrl *ctrl, |
| 768 | bool remove) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 769 | { |
Sagi Grimberg | 3f02fff | 2017-07-10 09:22:32 +0300 | [diff] [blame] | 770 | if (remove) { |
| 771 | blk_cleanup_queue(ctrl->ctrl.admin_q); |
Sagi Grimberg | 60070c7 | 2017-10-11 15:29:06 +0300 | [diff] [blame] | 772 | nvme_rdma_free_tagset(&ctrl->ctrl, ctrl->ctrl.admin_tagset); |
Sagi Grimberg | 3f02fff | 2017-07-10 09:22:32 +0300 | [diff] [blame] | 773 | } |
Sagi Grimberg | 682630f | 2018-06-25 20:58:17 +0300 | [diff] [blame] | 774 | if (ctrl->async_event_sqe.data) { |
| 775 | nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe, |
| 776 | sizeof(struct nvme_command), DMA_TO_DEVICE); |
| 777 | ctrl->async_event_sqe.data = NULL; |
| 778 | } |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 779 | nvme_rdma_free_queue(&ctrl->queues[0]); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 780 | } |
| 781 | |
Sagi Grimberg | 3f02fff | 2017-07-10 09:22:32 +0300 | [diff] [blame] | 782 | static int nvme_rdma_configure_admin_queue(struct nvme_rdma_ctrl *ctrl, |
| 783 | bool new) |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 784 | { |
| 785 | int error; |
| 786 | |
Sagi Grimberg | 41e8cfa | 2017-07-10 09:22:36 +0300 | [diff] [blame] | 787 | error = nvme_rdma_alloc_queue(ctrl, 0, NVME_AQ_DEPTH); |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 788 | if (error) |
| 789 | return error; |
| 790 | |
| 791 | ctrl->device = ctrl->queues[0].device; |
Hannes Reinecke | 103e515 | 2018-11-16 09:22:29 +0100 | [diff] [blame] | 792 | ctrl->ctrl.numa_node = dev_to_node(ctrl->device->dev->dma_device); |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 793 | |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 794 | ctrl->max_fr_pages = nvme_rdma_get_max_fr_pages(ctrl->device->dev); |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 795 | |
Sagi Grimberg | 94e4221 | 2018-06-19 15:34:10 +0300 | [diff] [blame] | 796 | error = nvme_rdma_alloc_qe(ctrl->device->dev, &ctrl->async_event_sqe, |
| 797 | sizeof(struct nvme_command), DMA_TO_DEVICE); |
| 798 | if (error) |
| 799 | goto out_free_queue; |
| 800 | |
Sagi Grimberg | 3f02fff | 2017-07-10 09:22:32 +0300 | [diff] [blame] | 801 | if (new) { |
| 802 | ctrl->ctrl.admin_tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, true); |
Sagi Grimberg | f04b9cc | 2017-10-19 18:10:53 +0300 | [diff] [blame] | 803 | if (IS_ERR(ctrl->ctrl.admin_tagset)) { |
| 804 | error = PTR_ERR(ctrl->ctrl.admin_tagset); |
Sagi Grimberg | 94e4221 | 2018-06-19 15:34:10 +0300 | [diff] [blame] | 805 | goto out_free_async_qe; |
Sagi Grimberg | f04b9cc | 2017-10-19 18:10:53 +0300 | [diff] [blame] | 806 | } |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 807 | |
Sagi Grimberg | 3f02fff | 2017-07-10 09:22:32 +0300 | [diff] [blame] | 808 | ctrl->ctrl.admin_q = blk_mq_init_queue(&ctrl->admin_tag_set); |
| 809 | if (IS_ERR(ctrl->ctrl.admin_q)) { |
| 810 | error = PTR_ERR(ctrl->ctrl.admin_q); |
| 811 | goto out_free_tagset; |
| 812 | } |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 813 | } |
| 814 | |
Sagi Grimberg | 68e16fc | 2017-07-10 09:22:37 +0300 | [diff] [blame] | 815 | error = nvme_rdma_start_queue(ctrl, 0); |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 816 | if (error) |
| 817 | goto out_cleanup_queue; |
| 818 | |
Sagi Grimberg | 09fdc23 | 2017-07-10 09:22:39 +0300 | [diff] [blame] | 819 | error = ctrl->ctrl.ops->reg_read64(&ctrl->ctrl, NVME_REG_CAP, |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 820 | &ctrl->ctrl.cap); |
| 821 | if (error) { |
| 822 | dev_err(ctrl->ctrl.device, |
| 823 | "prop_get NVME_REG_CAP failed\n"); |
Jianchao Wang | 2e050f0 | 2018-05-24 09:27:38 +0800 | [diff] [blame] | 824 | goto out_stop_queue; |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 825 | } |
| 826 | |
| 827 | ctrl->ctrl.sqsize = |
| 828 | min_t(int, NVME_CAP_MQES(ctrl->ctrl.cap), ctrl->ctrl.sqsize); |
| 829 | |
| 830 | error = nvme_enable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap); |
| 831 | if (error) |
Jianchao Wang | 2e050f0 | 2018-05-24 09:27:38 +0800 | [diff] [blame] | 832 | goto out_stop_queue; |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 833 | |
| 834 | ctrl->ctrl.max_hw_sectors = |
Linus Torvalds | 126e76f | 2017-09-09 12:49:01 -0700 | [diff] [blame] | 835 | (ctrl->max_fr_pages - 1) << (ilog2(SZ_4K) - 9); |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 836 | |
| 837 | error = nvme_init_identify(&ctrl->ctrl); |
| 838 | if (error) |
Jianchao Wang | 2e050f0 | 2018-05-24 09:27:38 +0800 | [diff] [blame] | 839 | goto out_stop_queue; |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 840 | |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 841 | return 0; |
| 842 | |
Jianchao Wang | 2e050f0 | 2018-05-24 09:27:38 +0800 | [diff] [blame] | 843 | out_stop_queue: |
| 844 | nvme_rdma_stop_queue(&ctrl->queues[0]); |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 845 | out_cleanup_queue: |
Sagi Grimberg | 3f02fff | 2017-07-10 09:22:32 +0300 | [diff] [blame] | 846 | if (new) |
| 847 | blk_cleanup_queue(ctrl->ctrl.admin_q); |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 848 | out_free_tagset: |
Sagi Grimberg | 3f02fff | 2017-07-10 09:22:32 +0300 | [diff] [blame] | 849 | if (new) |
Sagi Grimberg | 60070c7 | 2017-10-11 15:29:06 +0300 | [diff] [blame] | 850 | nvme_rdma_free_tagset(&ctrl->ctrl, ctrl->ctrl.admin_tagset); |
Sagi Grimberg | 94e4221 | 2018-06-19 15:34:10 +0300 | [diff] [blame] | 851 | out_free_async_qe: |
| 852 | nvme_rdma_free_qe(ctrl->device->dev, &ctrl->async_event_sqe, |
| 853 | sizeof(struct nvme_command), DMA_TO_DEVICE); |
Prabhath Sajeepa | 6344d02 | 2018-11-28 11:11:29 -0700 | [diff] [blame] | 854 | ctrl->async_event_sqe.data = NULL; |
Sagi Grimberg | 90af351 | 2017-07-10 09:22:28 +0300 | [diff] [blame] | 855 | out_free_queue: |
| 856 | nvme_rdma_free_queue(&ctrl->queues[0]); |
| 857 | return error; |
| 858 | } |
| 859 | |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 860 | static void nvme_rdma_destroy_io_queues(struct nvme_rdma_ctrl *ctrl, |
| 861 | bool remove) |
| 862 | { |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 863 | if (remove) { |
| 864 | blk_cleanup_queue(ctrl->ctrl.connect_q); |
Sagi Grimberg | 60070c7 | 2017-10-11 15:29:06 +0300 | [diff] [blame] | 865 | nvme_rdma_free_tagset(&ctrl->ctrl, ctrl->ctrl.tagset); |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 866 | } |
| 867 | nvme_rdma_free_io_queues(ctrl); |
| 868 | } |
| 869 | |
| 870 | static int nvme_rdma_configure_io_queues(struct nvme_rdma_ctrl *ctrl, bool new) |
| 871 | { |
| 872 | int ret; |
| 873 | |
Sagi Grimberg | 41e8cfa | 2017-07-10 09:22:36 +0300 | [diff] [blame] | 874 | ret = nvme_rdma_alloc_io_queues(ctrl); |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 875 | if (ret) |
| 876 | return ret; |
| 877 | |
| 878 | if (new) { |
| 879 | ctrl->ctrl.tagset = nvme_rdma_alloc_tagset(&ctrl->ctrl, false); |
Sagi Grimberg | f04b9cc | 2017-10-19 18:10:53 +0300 | [diff] [blame] | 880 | if (IS_ERR(ctrl->ctrl.tagset)) { |
| 881 | ret = PTR_ERR(ctrl->ctrl.tagset); |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 882 | goto out_free_io_queues; |
Sagi Grimberg | f04b9cc | 2017-10-19 18:10:53 +0300 | [diff] [blame] | 883 | } |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 884 | |
| 885 | ctrl->ctrl.connect_q = blk_mq_init_queue(&ctrl->tag_set); |
| 886 | if (IS_ERR(ctrl->ctrl.connect_q)) { |
| 887 | ret = PTR_ERR(ctrl->ctrl.connect_q); |
| 888 | goto out_free_tag_set; |
| 889 | } |
| 890 | } else { |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 891 | blk_mq_update_nr_hw_queues(&ctrl->tag_set, |
| 892 | ctrl->ctrl.queue_count - 1); |
| 893 | } |
| 894 | |
Sagi Grimberg | 68e16fc | 2017-07-10 09:22:37 +0300 | [diff] [blame] | 895 | ret = nvme_rdma_start_io_queues(ctrl); |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 896 | if (ret) |
| 897 | goto out_cleanup_connect_q; |
| 898 | |
| 899 | return 0; |
| 900 | |
| 901 | out_cleanup_connect_q: |
| 902 | if (new) |
| 903 | blk_cleanup_queue(ctrl->ctrl.connect_q); |
| 904 | out_free_tag_set: |
| 905 | if (new) |
Sagi Grimberg | 60070c7 | 2017-10-11 15:29:06 +0300 | [diff] [blame] | 906 | nvme_rdma_free_tagset(&ctrl->ctrl, ctrl->ctrl.tagset); |
Sagi Grimberg | a57bd54 | 2017-08-28 21:41:10 +0200 | [diff] [blame] | 907 | out_free_io_queues: |
| 908 | nvme_rdma_free_io_queues(ctrl); |
| 909 | return ret; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 910 | } |
| 911 | |
Sagi Grimberg | 75862c7 | 2018-07-09 12:49:07 +0300 | [diff] [blame] | 912 | static void nvme_rdma_teardown_admin_queue(struct nvme_rdma_ctrl *ctrl, |
| 913 | bool remove) |
| 914 | { |
| 915 | blk_mq_quiesce_queue(ctrl->ctrl.admin_q); |
| 916 | nvme_rdma_stop_queue(&ctrl->queues[0]); |
Sagi Grimberg | 1007709 | 2019-04-24 11:53:18 -0700 | [diff] [blame^] | 917 | if (ctrl->ctrl.admin_tagset) |
| 918 | blk_mq_tagset_busy_iter(ctrl->ctrl.admin_tagset, |
| 919 | nvme_cancel_request, &ctrl->ctrl); |
Sagi Grimberg | 75862c7 | 2018-07-09 12:49:07 +0300 | [diff] [blame] | 920 | blk_mq_unquiesce_queue(ctrl->ctrl.admin_q); |
| 921 | nvme_rdma_destroy_admin_queue(ctrl, remove); |
| 922 | } |
| 923 | |
| 924 | static void nvme_rdma_teardown_io_queues(struct nvme_rdma_ctrl *ctrl, |
| 925 | bool remove) |
| 926 | { |
| 927 | if (ctrl->ctrl.queue_count > 1) { |
| 928 | nvme_stop_queues(&ctrl->ctrl); |
| 929 | nvme_rdma_stop_io_queues(ctrl); |
Sagi Grimberg | 1007709 | 2019-04-24 11:53:18 -0700 | [diff] [blame^] | 930 | if (ctrl->ctrl.tagset) |
| 931 | blk_mq_tagset_busy_iter(ctrl->ctrl.tagset, |
| 932 | nvme_cancel_request, &ctrl->ctrl); |
Sagi Grimberg | 75862c7 | 2018-07-09 12:49:07 +0300 | [diff] [blame] | 933 | if (remove) |
| 934 | nvme_start_queues(&ctrl->ctrl); |
| 935 | nvme_rdma_destroy_io_queues(ctrl, remove); |
| 936 | } |
| 937 | } |
| 938 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 939 | static void nvme_rdma_free_ctrl(struct nvme_ctrl *nctrl) |
| 940 | { |
| 941 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(nctrl); |
| 942 | |
| 943 | if (list_empty(&ctrl->list)) |
| 944 | goto free_ctrl; |
| 945 | |
| 946 | mutex_lock(&nvme_rdma_ctrl_mutex); |
| 947 | list_del(&ctrl->list); |
| 948 | mutex_unlock(&nvme_rdma_ctrl_mutex); |
| 949 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 950 | nvmf_free_options(nctrl->opts); |
| 951 | free_ctrl: |
Sagi Grimberg | 3d06410 | 2018-06-19 15:34:09 +0300 | [diff] [blame] | 952 | kfree(ctrl->queues); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 953 | kfree(ctrl); |
| 954 | } |
| 955 | |
Sagi Grimberg | fd8563c | 2017-03-18 20:58:29 +0200 | [diff] [blame] | 956 | static void nvme_rdma_reconnect_or_remove(struct nvme_rdma_ctrl *ctrl) |
| 957 | { |
| 958 | /* If we are resetting/deleting then do nothing */ |
Max Gurtovoy | ad6a0a5 | 2018-01-31 18:31:24 +0200 | [diff] [blame] | 959 | if (ctrl->ctrl.state != NVME_CTRL_CONNECTING) { |
Sagi Grimberg | fd8563c | 2017-03-18 20:58:29 +0200 | [diff] [blame] | 960 | WARN_ON_ONCE(ctrl->ctrl.state == NVME_CTRL_NEW || |
| 961 | ctrl->ctrl.state == NVME_CTRL_LIVE); |
| 962 | return; |
| 963 | } |
| 964 | |
| 965 | if (nvmf_should_reconnect(&ctrl->ctrl)) { |
| 966 | dev_info(ctrl->ctrl.device, "Reconnecting in %d seconds...\n", |
| 967 | ctrl->ctrl.opts->reconnect_delay); |
Sagi Grimberg | 9a6327d | 2017-06-07 20:31:55 +0200 | [diff] [blame] | 968 | queue_delayed_work(nvme_wq, &ctrl->reconnect_work, |
Sagi Grimberg | fd8563c | 2017-03-18 20:58:29 +0200 | [diff] [blame] | 969 | ctrl->ctrl.opts->reconnect_delay * HZ); |
| 970 | } else { |
Sagi Grimberg | 12fa130 | 2017-10-29 14:21:01 +0200 | [diff] [blame] | 971 | nvme_delete_ctrl(&ctrl->ctrl); |
Sagi Grimberg | fd8563c | 2017-03-18 20:58:29 +0200 | [diff] [blame] | 972 | } |
| 973 | } |
| 974 | |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 975 | static int nvme_rdma_setup_ctrl(struct nvme_rdma_ctrl *ctrl, bool new) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 976 | { |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 977 | int ret = -EINVAL; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 978 | bool changed; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 979 | |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 980 | ret = nvme_rdma_configure_admin_queue(ctrl, new); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 981 | if (ret) |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 982 | return ret; |
| 983 | |
| 984 | if (ctrl->ctrl.icdoff) { |
| 985 | dev_err(ctrl->ctrl.device, "icdoff is not supported!\n"); |
| 986 | goto destroy_admin; |
| 987 | } |
| 988 | |
| 989 | if (!(ctrl->ctrl.sgls & (1 << 2))) { |
| 990 | dev_err(ctrl->ctrl.device, |
| 991 | "Mandatory keyed sgls are not supported!\n"); |
| 992 | goto destroy_admin; |
| 993 | } |
| 994 | |
| 995 | if (ctrl->ctrl.opts->queue_size > ctrl->ctrl.sqsize + 1) { |
| 996 | dev_warn(ctrl->ctrl.device, |
| 997 | "queue_size %zu > ctrl sqsize %u, clamping down\n", |
| 998 | ctrl->ctrl.opts->queue_size, ctrl->ctrl.sqsize + 1); |
| 999 | } |
| 1000 | |
| 1001 | if (ctrl->ctrl.sqsize + 1 > ctrl->ctrl.maxcmd) { |
| 1002 | dev_warn(ctrl->ctrl.device, |
| 1003 | "sqsize %u > ctrl maxcmd %u, clamping down\n", |
| 1004 | ctrl->ctrl.sqsize + 1, ctrl->ctrl.maxcmd); |
| 1005 | ctrl->ctrl.sqsize = ctrl->ctrl.maxcmd - 1; |
| 1006 | } |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1007 | |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1008 | if (ctrl->ctrl.sgls & (1 << 20)) |
| 1009 | ctrl->use_inline_data = true; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1010 | |
Sagi Grimberg | d858e5f | 2017-04-24 10:58:29 +0300 | [diff] [blame] | 1011 | if (ctrl->ctrl.queue_count > 1) { |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 1012 | ret = nvme_rdma_configure_io_queues(ctrl, new); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1013 | if (ret) |
Sagi Grimberg | 5e1fe61 | 2017-10-11 15:29:11 +0300 | [diff] [blame] | 1014 | goto destroy_admin; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1015 | } |
| 1016 | |
| 1017 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_LIVE); |
Sagi Grimberg | 0a960afd | 2017-09-21 17:01:37 +0300 | [diff] [blame] | 1018 | if (!changed) { |
| 1019 | /* state change failure is ok if we're in DELETING state */ |
| 1020 | WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING); |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 1021 | ret = -EINVAL; |
| 1022 | goto destroy_io; |
Sagi Grimberg | 0a960afd | 2017-09-21 17:01:37 +0300 | [diff] [blame] | 1023 | } |
| 1024 | |
Sagi Grimberg | d09f2b4 | 2017-07-02 10:56:43 +0300 | [diff] [blame] | 1025 | nvme_start_ctrl(&ctrl->ctrl); |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 1026 | return 0; |
| 1027 | |
| 1028 | destroy_io: |
| 1029 | if (ctrl->ctrl.queue_count > 1) |
| 1030 | nvme_rdma_destroy_io_queues(ctrl, new); |
| 1031 | destroy_admin: |
| 1032 | nvme_rdma_stop_queue(&ctrl->queues[0]); |
| 1033 | nvme_rdma_destroy_admin_queue(ctrl, new); |
| 1034 | return ret; |
| 1035 | } |
| 1036 | |
| 1037 | static void nvme_rdma_reconnect_ctrl_work(struct work_struct *work) |
| 1038 | { |
| 1039 | struct nvme_rdma_ctrl *ctrl = container_of(to_delayed_work(work), |
| 1040 | struct nvme_rdma_ctrl, reconnect_work); |
| 1041 | |
| 1042 | ++ctrl->ctrl.nr_reconnects; |
| 1043 | |
| 1044 | if (nvme_rdma_setup_ctrl(ctrl, false)) |
| 1045 | goto requeue; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1046 | |
Sagi Grimberg | 5e1fe61 | 2017-10-11 15:29:11 +0300 | [diff] [blame] | 1047 | dev_info(ctrl->ctrl.device, "Successfully reconnected (%d attempts)\n", |
| 1048 | ctrl->ctrl.nr_reconnects); |
| 1049 | |
| 1050 | ctrl->ctrl.nr_reconnects = 0; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1051 | |
| 1052 | return; |
| 1053 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1054 | requeue: |
Sagi Grimberg | fd8563c | 2017-03-18 20:58:29 +0200 | [diff] [blame] | 1055 | dev_info(ctrl->ctrl.device, "Failed reconnect attempt %d\n", |
Sagi Grimberg | fdf9dfa | 2017-05-04 13:33:15 +0300 | [diff] [blame] | 1056 | ctrl->ctrl.nr_reconnects); |
Sagi Grimberg | fd8563c | 2017-03-18 20:58:29 +0200 | [diff] [blame] | 1057 | nvme_rdma_reconnect_or_remove(ctrl); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1058 | } |
| 1059 | |
| 1060 | static void nvme_rdma_error_recovery_work(struct work_struct *work) |
| 1061 | { |
| 1062 | struct nvme_rdma_ctrl *ctrl = container_of(work, |
| 1063 | struct nvme_rdma_ctrl, err_work); |
| 1064 | |
Sagi Grimberg | e4d753d | 2017-09-21 17:01:38 +0300 | [diff] [blame] | 1065 | nvme_stop_keep_alive(&ctrl->ctrl); |
Sagi Grimberg | 75862c7 | 2018-07-09 12:49:07 +0300 | [diff] [blame] | 1066 | nvme_rdma_teardown_io_queues(ctrl, false); |
Sagi Grimberg | e818a5b | 2017-06-05 20:35:56 +0300 | [diff] [blame] | 1067 | nvme_start_queues(&ctrl->ctrl); |
Sagi Grimberg | 75862c7 | 2018-07-09 12:49:07 +0300 | [diff] [blame] | 1068 | nvme_rdma_teardown_admin_queue(ctrl, false); |
Sagi Grimberg | e818a5b | 2017-06-05 20:35:56 +0300 | [diff] [blame] | 1069 | |
Max Gurtovoy | ad6a0a5 | 2018-01-31 18:31:24 +0200 | [diff] [blame] | 1070 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) { |
Nitzan Carmi | 187c083 | 2018-03-20 11:07:29 +0000 | [diff] [blame] | 1071 | /* state change failure is ok if we're in DELETING state */ |
| 1072 | WARN_ON_ONCE(ctrl->ctrl.state != NVME_CTRL_DELETING); |
Sagi Grimberg | d5bf4b7 | 2017-12-21 14:54:15 +0200 | [diff] [blame] | 1073 | return; |
| 1074 | } |
| 1075 | |
Sagi Grimberg | fd8563c | 2017-03-18 20:58:29 +0200 | [diff] [blame] | 1076 | nvme_rdma_reconnect_or_remove(ctrl); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1077 | } |
| 1078 | |
| 1079 | static void nvme_rdma_error_recovery(struct nvme_rdma_ctrl *ctrl) |
| 1080 | { |
Sagi Grimberg | d5bf4b7 | 2017-12-21 14:54:15 +0200 | [diff] [blame] | 1081 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_RESETTING)) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1082 | return; |
| 1083 | |
Sagi Grimberg | 9a6327d | 2017-06-07 20:31:55 +0200 | [diff] [blame] | 1084 | queue_work(nvme_wq, &ctrl->err_work); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1085 | } |
| 1086 | |
| 1087 | static void nvme_rdma_wr_error(struct ib_cq *cq, struct ib_wc *wc, |
| 1088 | const char *op) |
| 1089 | { |
| 1090 | struct nvme_rdma_queue *queue = cq->cq_context; |
| 1091 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; |
| 1092 | |
| 1093 | if (ctrl->ctrl.state == NVME_CTRL_LIVE) |
| 1094 | dev_info(ctrl->ctrl.device, |
| 1095 | "%s for CQE 0x%p failed with status %s (%d)\n", |
| 1096 | op, wc->wr_cqe, |
| 1097 | ib_wc_status_msg(wc->status), wc->status); |
| 1098 | nvme_rdma_error_recovery(ctrl); |
| 1099 | } |
| 1100 | |
| 1101 | static void nvme_rdma_memreg_done(struct ib_cq *cq, struct ib_wc *wc) |
| 1102 | { |
| 1103 | if (unlikely(wc->status != IB_WC_SUCCESS)) |
| 1104 | nvme_rdma_wr_error(cq, wc, "MEMREG"); |
| 1105 | } |
| 1106 | |
| 1107 | static void nvme_rdma_inv_rkey_done(struct ib_cq *cq, struct ib_wc *wc) |
| 1108 | { |
Sagi Grimberg | 2f122e4 | 2017-11-23 17:35:23 +0200 | [diff] [blame] | 1109 | struct nvme_rdma_request *req = |
| 1110 | container_of(wc->wr_cqe, struct nvme_rdma_request, reg_cqe); |
| 1111 | struct request *rq = blk_mq_rq_from_pdu(req); |
| 1112 | |
| 1113 | if (unlikely(wc->status != IB_WC_SUCCESS)) { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1114 | nvme_rdma_wr_error(cq, wc, "LOCAL_INV"); |
Sagi Grimberg | 2f122e4 | 2017-11-23 17:35:23 +0200 | [diff] [blame] | 1115 | return; |
| 1116 | } |
| 1117 | |
| 1118 | if (refcount_dec_and_test(&req->ref)) |
| 1119 | nvme_end_request(rq, req->status, req->result); |
| 1120 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1121 | } |
| 1122 | |
| 1123 | static int nvme_rdma_inv_rkey(struct nvme_rdma_queue *queue, |
| 1124 | struct nvme_rdma_request *req) |
| 1125 | { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1126 | struct ib_send_wr wr = { |
| 1127 | .opcode = IB_WR_LOCAL_INV, |
| 1128 | .next = NULL, |
| 1129 | .num_sge = 0, |
Sagi Grimberg | 2f122e4 | 2017-11-23 17:35:23 +0200 | [diff] [blame] | 1130 | .send_flags = IB_SEND_SIGNALED, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1131 | .ex.invalidate_rkey = req->mr->rkey, |
| 1132 | }; |
| 1133 | |
| 1134 | req->reg_cqe.done = nvme_rdma_inv_rkey_done; |
| 1135 | wr.wr_cqe = &req->reg_cqe; |
| 1136 | |
Bart Van Assche | 45e3cc1a | 2018-07-18 09:25:23 -0700 | [diff] [blame] | 1137 | return ib_post_send(queue->qp, &wr, NULL); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1138 | } |
| 1139 | |
| 1140 | static void nvme_rdma_unmap_data(struct nvme_rdma_queue *queue, |
| 1141 | struct request *rq) |
| 1142 | { |
| 1143 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1144 | struct nvme_rdma_device *dev = queue->device; |
| 1145 | struct ib_device *ibdev = dev->dev; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1146 | |
Chaitanya Kulkarni | 34e0819 | 2019-02-20 20:13:34 -0800 | [diff] [blame] | 1147 | if (!blk_rq_nr_phys_segments(rq)) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1148 | return; |
| 1149 | |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 1150 | if (req->mr) { |
| 1151 | ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr); |
| 1152 | req->mr = NULL; |
| 1153 | } |
| 1154 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1155 | ib_dma_unmap_sg(ibdev, req->sg_table.sgl, |
| 1156 | req->nents, rq_data_dir(rq) == |
| 1157 | WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE); |
| 1158 | |
| 1159 | nvme_cleanup_cmd(rq); |
| 1160 | sg_free_table_chained(&req->sg_table, true); |
| 1161 | } |
| 1162 | |
| 1163 | static int nvme_rdma_set_sg_null(struct nvme_command *c) |
| 1164 | { |
| 1165 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; |
| 1166 | |
| 1167 | sg->addr = 0; |
| 1168 | put_unaligned_le24(0, sg->length); |
| 1169 | put_unaligned_le32(0, sg->key); |
| 1170 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; |
| 1171 | return 0; |
| 1172 | } |
| 1173 | |
| 1174 | static int nvme_rdma_map_sg_inline(struct nvme_rdma_queue *queue, |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1175 | struct nvme_rdma_request *req, struct nvme_command *c, |
| 1176 | int count) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1177 | { |
| 1178 | struct nvme_sgl_desc *sg = &c->common.dptr.sgl; |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1179 | struct scatterlist *sgl = req->sg_table.sgl; |
| 1180 | struct ib_sge *sge = &req->sge[1]; |
| 1181 | u32 len = 0; |
| 1182 | int i; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1183 | |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1184 | for (i = 0; i < count; i++, sgl++, sge++) { |
| 1185 | sge->addr = sg_dma_address(sgl); |
| 1186 | sge->length = sg_dma_len(sgl); |
| 1187 | sge->lkey = queue->device->pd->local_dma_lkey; |
| 1188 | len += sge->length; |
| 1189 | } |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1190 | |
| 1191 | sg->addr = cpu_to_le64(queue->ctrl->ctrl.icdoff); |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1192 | sg->length = cpu_to_le32(len); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1193 | sg->type = (NVME_SGL_FMT_DATA_DESC << 4) | NVME_SGL_FMT_OFFSET; |
| 1194 | |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1195 | req->num_sge += count; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1196 | return 0; |
| 1197 | } |
| 1198 | |
| 1199 | static int nvme_rdma_map_sg_single(struct nvme_rdma_queue *queue, |
| 1200 | struct nvme_rdma_request *req, struct nvme_command *c) |
| 1201 | { |
| 1202 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; |
| 1203 | |
| 1204 | sg->addr = cpu_to_le64(sg_dma_address(req->sg_table.sgl)); |
| 1205 | put_unaligned_le24(sg_dma_len(req->sg_table.sgl), sg->length); |
Christoph Hellwig | 11975e0 | 2016-09-05 12:56:20 +0200 | [diff] [blame] | 1206 | put_unaligned_le32(queue->device->pd->unsafe_global_rkey, sg->key); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1207 | sg->type = NVME_KEY_SGL_FMT_DATA_DESC << 4; |
| 1208 | return 0; |
| 1209 | } |
| 1210 | |
| 1211 | static int nvme_rdma_map_sg_fr(struct nvme_rdma_queue *queue, |
| 1212 | struct nvme_rdma_request *req, struct nvme_command *c, |
| 1213 | int count) |
| 1214 | { |
| 1215 | struct nvme_keyed_sgl_desc *sg = &c->common.dptr.ksgl; |
| 1216 | int nr; |
| 1217 | |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 1218 | req->mr = ib_mr_pool_get(queue->qp, &queue->qp->rdma_mrs); |
| 1219 | if (WARN_ON_ONCE(!req->mr)) |
| 1220 | return -EAGAIN; |
| 1221 | |
Max Gurtovoy | b925a2d | 2017-08-28 12:52:27 +0300 | [diff] [blame] | 1222 | /* |
| 1223 | * Align the MR to a 4K page size to match the ctrl page size and |
| 1224 | * the block virtual boundary. |
| 1225 | */ |
| 1226 | nr = ib_map_mr_sg(req->mr, req->sg_table.sgl, count, NULL, SZ_4K); |
Max Gurtovoy | a7b7c7a | 2017-08-14 15:29:26 +0300 | [diff] [blame] | 1227 | if (unlikely(nr < count)) { |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 1228 | ib_mr_pool_put(queue->qp, &queue->qp->rdma_mrs, req->mr); |
| 1229 | req->mr = NULL; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1230 | if (nr < 0) |
| 1231 | return nr; |
| 1232 | return -EINVAL; |
| 1233 | } |
| 1234 | |
| 1235 | ib_update_fast_reg_key(req->mr, ib_inc_rkey(req->mr->rkey)); |
| 1236 | |
| 1237 | req->reg_cqe.done = nvme_rdma_memreg_done; |
| 1238 | memset(&req->reg_wr, 0, sizeof(req->reg_wr)); |
| 1239 | req->reg_wr.wr.opcode = IB_WR_REG_MR; |
| 1240 | req->reg_wr.wr.wr_cqe = &req->reg_cqe; |
| 1241 | req->reg_wr.wr.num_sge = 0; |
| 1242 | req->reg_wr.mr = req->mr; |
| 1243 | req->reg_wr.key = req->mr->rkey; |
| 1244 | req->reg_wr.access = IB_ACCESS_LOCAL_WRITE | |
| 1245 | IB_ACCESS_REMOTE_READ | |
| 1246 | IB_ACCESS_REMOTE_WRITE; |
| 1247 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1248 | sg->addr = cpu_to_le64(req->mr->iova); |
| 1249 | put_unaligned_le24(req->mr->length, sg->length); |
| 1250 | put_unaligned_le32(req->mr->rkey, sg->key); |
| 1251 | sg->type = (NVME_KEY_SGL_FMT_DATA_DESC << 4) | |
| 1252 | NVME_SGL_FMT_INVALIDATE; |
| 1253 | |
| 1254 | return 0; |
| 1255 | } |
| 1256 | |
| 1257 | static int nvme_rdma_map_data(struct nvme_rdma_queue *queue, |
Christoph Hellwig | b131c61 | 2017-01-13 12:29:12 +0100 | [diff] [blame] | 1258 | struct request *rq, struct nvme_command *c) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1259 | { |
| 1260 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
| 1261 | struct nvme_rdma_device *dev = queue->device; |
| 1262 | struct ib_device *ibdev = dev->dev; |
Christoph Hellwig | f9d03f9 | 2016-12-08 15:20:32 -0700 | [diff] [blame] | 1263 | int count, ret; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1264 | |
| 1265 | req->num_sge = 1; |
Sagi Grimberg | 4af7f7f | 2017-11-23 17:35:22 +0200 | [diff] [blame] | 1266 | refcount_set(&req->ref, 2); /* send and recv completions */ |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1267 | |
| 1268 | c->common.flags |= NVME_CMD_SGL_METABUF; |
| 1269 | |
Chaitanya Kulkarni | 34e0819 | 2019-02-20 20:13:34 -0800 | [diff] [blame] | 1270 | if (!blk_rq_nr_phys_segments(rq)) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1271 | return nvme_rdma_set_sg_null(c); |
| 1272 | |
| 1273 | req->sg_table.sgl = req->first_sgl; |
Christoph Hellwig | f9d03f9 | 2016-12-08 15:20:32 -0700 | [diff] [blame] | 1274 | ret = sg_alloc_table_chained(&req->sg_table, |
| 1275 | blk_rq_nr_phys_segments(rq), req->sg_table.sgl); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1276 | if (ret) |
| 1277 | return -ENOMEM; |
| 1278 | |
Christoph Hellwig | f9d03f9 | 2016-12-08 15:20:32 -0700 | [diff] [blame] | 1279 | req->nents = blk_rq_map_sg(rq->q, rq, req->sg_table.sgl); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1280 | |
Christoph Hellwig | f9d03f9 | 2016-12-08 15:20:32 -0700 | [diff] [blame] | 1281 | count = ib_dma_map_sg(ibdev, req->sg_table.sgl, req->nents, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1282 | rq_data_dir(rq) == WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE); |
| 1283 | if (unlikely(count <= 0)) { |
Max Gurtovoy | 94423a8 | 2018-06-10 16:58:29 +0300 | [diff] [blame] | 1284 | ret = -EIO; |
| 1285 | goto out_free_table; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1286 | } |
| 1287 | |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1288 | if (count <= dev->num_inline_segments) { |
Christoph Hellwig | b131c61 | 2017-01-13 12:29:12 +0100 | [diff] [blame] | 1289 | if (rq_data_dir(rq) == WRITE && nvme_rdma_queue_idx(queue) && |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1290 | queue->ctrl->use_inline_data && |
Christoph Hellwig | b131c61 | 2017-01-13 12:29:12 +0100 | [diff] [blame] | 1291 | blk_rq_payload_bytes(rq) <= |
Max Gurtovoy | 94423a8 | 2018-06-10 16:58:29 +0300 | [diff] [blame] | 1292 | nvme_rdma_inline_data_size(queue)) { |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1293 | ret = nvme_rdma_map_sg_inline(queue, req, c, count); |
Max Gurtovoy | 94423a8 | 2018-06-10 16:58:29 +0300 | [diff] [blame] | 1294 | goto out; |
| 1295 | } |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1296 | |
Steve Wise | 64a741c | 2018-06-20 07:15:05 -0700 | [diff] [blame] | 1297 | if (count == 1 && dev->pd->flags & IB_PD_UNSAFE_GLOBAL_RKEY) { |
Max Gurtovoy | 94423a8 | 2018-06-10 16:58:29 +0300 | [diff] [blame] | 1298 | ret = nvme_rdma_map_sg_single(queue, req, c); |
| 1299 | goto out; |
| 1300 | } |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1301 | } |
| 1302 | |
Max Gurtovoy | 94423a8 | 2018-06-10 16:58:29 +0300 | [diff] [blame] | 1303 | ret = nvme_rdma_map_sg_fr(queue, req, c, count); |
| 1304 | out: |
| 1305 | if (unlikely(ret)) |
| 1306 | goto out_unmap_sg; |
| 1307 | |
| 1308 | return 0; |
| 1309 | |
| 1310 | out_unmap_sg: |
| 1311 | ib_dma_unmap_sg(ibdev, req->sg_table.sgl, |
| 1312 | req->nents, rq_data_dir(rq) == |
| 1313 | WRITE ? DMA_TO_DEVICE : DMA_FROM_DEVICE); |
| 1314 | out_free_table: |
| 1315 | sg_free_table_chained(&req->sg_table, true); |
| 1316 | return ret; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1317 | } |
| 1318 | |
| 1319 | static void nvme_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc) |
| 1320 | { |
Sagi Grimberg | 4af7f7f | 2017-11-23 17:35:22 +0200 | [diff] [blame] | 1321 | struct nvme_rdma_qe *qe = |
| 1322 | container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); |
| 1323 | struct nvme_rdma_request *req = |
| 1324 | container_of(qe, struct nvme_rdma_request, sqe); |
| 1325 | struct request *rq = blk_mq_rq_from_pdu(req); |
| 1326 | |
| 1327 | if (unlikely(wc->status != IB_WC_SUCCESS)) { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1328 | nvme_rdma_wr_error(cq, wc, "SEND"); |
Sagi Grimberg | 4af7f7f | 2017-11-23 17:35:22 +0200 | [diff] [blame] | 1329 | return; |
| 1330 | } |
| 1331 | |
| 1332 | if (refcount_dec_and_test(&req->ref)) |
| 1333 | nvme_end_request(rq, req->status, req->result); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1334 | } |
| 1335 | |
| 1336 | static int nvme_rdma_post_send(struct nvme_rdma_queue *queue, |
| 1337 | struct nvme_rdma_qe *qe, struct ib_sge *sge, u32 num_sge, |
Sagi Grimberg | b4b591c | 2017-11-23 17:35:21 +0200 | [diff] [blame] | 1338 | struct ib_send_wr *first) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1339 | { |
Bart Van Assche | 45e3cc1a | 2018-07-18 09:25:23 -0700 | [diff] [blame] | 1340 | struct ib_send_wr wr; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1341 | int ret; |
| 1342 | |
| 1343 | sge->addr = qe->dma; |
| 1344 | sge->length = sizeof(struct nvme_command), |
| 1345 | sge->lkey = queue->device->pd->local_dma_lkey; |
| 1346 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1347 | wr.next = NULL; |
| 1348 | wr.wr_cqe = &qe->cqe; |
| 1349 | wr.sg_list = sge; |
| 1350 | wr.num_sge = num_sge; |
| 1351 | wr.opcode = IB_WR_SEND; |
Sagi Grimberg | b4b591c | 2017-11-23 17:35:21 +0200 | [diff] [blame] | 1352 | wr.send_flags = IB_SEND_SIGNALED; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1353 | |
| 1354 | if (first) |
| 1355 | first->next = ≀ |
| 1356 | else |
| 1357 | first = ≀ |
| 1358 | |
Bart Van Assche | 45e3cc1a | 2018-07-18 09:25:23 -0700 | [diff] [blame] | 1359 | ret = ib_post_send(queue->qp, first, NULL); |
Max Gurtovoy | a7b7c7a | 2017-08-14 15:29:26 +0300 | [diff] [blame] | 1360 | if (unlikely(ret)) { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1361 | dev_err(queue->ctrl->ctrl.device, |
| 1362 | "%s failed with error code %d\n", __func__, ret); |
| 1363 | } |
| 1364 | return ret; |
| 1365 | } |
| 1366 | |
| 1367 | static int nvme_rdma_post_recv(struct nvme_rdma_queue *queue, |
| 1368 | struct nvme_rdma_qe *qe) |
| 1369 | { |
Bart Van Assche | 45e3cc1a | 2018-07-18 09:25:23 -0700 | [diff] [blame] | 1370 | struct ib_recv_wr wr; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1371 | struct ib_sge list; |
| 1372 | int ret; |
| 1373 | |
| 1374 | list.addr = qe->dma; |
| 1375 | list.length = sizeof(struct nvme_completion); |
| 1376 | list.lkey = queue->device->pd->local_dma_lkey; |
| 1377 | |
| 1378 | qe->cqe.done = nvme_rdma_recv_done; |
| 1379 | |
| 1380 | wr.next = NULL; |
| 1381 | wr.wr_cqe = &qe->cqe; |
| 1382 | wr.sg_list = &list; |
| 1383 | wr.num_sge = 1; |
| 1384 | |
Bart Van Assche | 45e3cc1a | 2018-07-18 09:25:23 -0700 | [diff] [blame] | 1385 | ret = ib_post_recv(queue->qp, &wr, NULL); |
Max Gurtovoy | a7b7c7a | 2017-08-14 15:29:26 +0300 | [diff] [blame] | 1386 | if (unlikely(ret)) { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1387 | dev_err(queue->ctrl->ctrl.device, |
| 1388 | "%s failed with error code %d\n", __func__, ret); |
| 1389 | } |
| 1390 | return ret; |
| 1391 | } |
| 1392 | |
| 1393 | static struct blk_mq_tags *nvme_rdma_tagset(struct nvme_rdma_queue *queue) |
| 1394 | { |
| 1395 | u32 queue_idx = nvme_rdma_queue_idx(queue); |
| 1396 | |
| 1397 | if (queue_idx == 0) |
| 1398 | return queue->ctrl->admin_tag_set.tags[queue_idx]; |
| 1399 | return queue->ctrl->tag_set.tags[queue_idx - 1]; |
| 1400 | } |
| 1401 | |
Sagi Grimberg | b4b591c | 2017-11-23 17:35:21 +0200 | [diff] [blame] | 1402 | static void nvme_rdma_async_done(struct ib_cq *cq, struct ib_wc *wc) |
| 1403 | { |
| 1404 | if (unlikely(wc->status != IB_WC_SUCCESS)) |
| 1405 | nvme_rdma_wr_error(cq, wc, "ASYNC"); |
| 1406 | } |
| 1407 | |
Keith Busch | ad22c35 | 2017-11-07 15:13:12 -0700 | [diff] [blame] | 1408 | static void nvme_rdma_submit_async_event(struct nvme_ctrl *arg) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1409 | { |
| 1410 | struct nvme_rdma_ctrl *ctrl = to_rdma_ctrl(arg); |
| 1411 | struct nvme_rdma_queue *queue = &ctrl->queues[0]; |
| 1412 | struct ib_device *dev = queue->device->dev; |
| 1413 | struct nvme_rdma_qe *sqe = &ctrl->async_event_sqe; |
| 1414 | struct nvme_command *cmd = sqe->data; |
| 1415 | struct ib_sge sge; |
| 1416 | int ret; |
| 1417 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1418 | ib_dma_sync_single_for_cpu(dev, sqe->dma, sizeof(*cmd), DMA_TO_DEVICE); |
| 1419 | |
| 1420 | memset(cmd, 0, sizeof(*cmd)); |
| 1421 | cmd->common.opcode = nvme_admin_async_event; |
Keith Busch | 38dabe2 | 2017-11-07 15:13:10 -0700 | [diff] [blame] | 1422 | cmd->common.command_id = NVME_AQ_BLK_MQ_DEPTH; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1423 | cmd->common.flags |= NVME_CMD_SGL_METABUF; |
| 1424 | nvme_rdma_set_sg_null(cmd); |
| 1425 | |
Sagi Grimberg | b4b591c | 2017-11-23 17:35:21 +0200 | [diff] [blame] | 1426 | sqe->cqe.done = nvme_rdma_async_done; |
| 1427 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1428 | ib_dma_sync_single_for_device(dev, sqe->dma, sizeof(*cmd), |
| 1429 | DMA_TO_DEVICE); |
| 1430 | |
Sagi Grimberg | b4b591c | 2017-11-23 17:35:21 +0200 | [diff] [blame] | 1431 | ret = nvme_rdma_post_send(queue, sqe, &sge, 1, NULL); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1432 | WARN_ON_ONCE(ret); |
| 1433 | } |
| 1434 | |
Jens Axboe | 1052b8a | 2018-11-26 08:21:49 -0700 | [diff] [blame] | 1435 | static void nvme_rdma_process_nvme_rsp(struct nvme_rdma_queue *queue, |
| 1436 | struct nvme_completion *cqe, struct ib_wc *wc) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1437 | { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1438 | struct request *rq; |
| 1439 | struct nvme_rdma_request *req; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1440 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1441 | rq = blk_mq_tag_to_rq(nvme_rdma_tagset(queue), cqe->command_id); |
| 1442 | if (!rq) { |
| 1443 | dev_err(queue->ctrl->ctrl.device, |
| 1444 | "tag 0x%x on QP %#x not found\n", |
| 1445 | cqe->command_id, queue->qp->qp_num); |
| 1446 | nvme_rdma_error_recovery(queue->ctrl); |
Jens Axboe | 1052b8a | 2018-11-26 08:21:49 -0700 | [diff] [blame] | 1447 | return; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1448 | } |
| 1449 | req = blk_mq_rq_to_pdu(rq); |
| 1450 | |
Sagi Grimberg | 4af7f7f | 2017-11-23 17:35:22 +0200 | [diff] [blame] | 1451 | req->status = cqe->status; |
| 1452 | req->result = cqe->result; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1453 | |
Sagi Grimberg | 3ef0279 | 2017-11-23 17:35:24 +0200 | [diff] [blame] | 1454 | if (wc->wc_flags & IB_WC_WITH_INVALIDATE) { |
| 1455 | if (unlikely(wc->ex.invalidate_rkey != req->mr->rkey)) { |
| 1456 | dev_err(queue->ctrl->ctrl.device, |
| 1457 | "Bogus remote invalidation for rkey %#x\n", |
| 1458 | req->mr->rkey); |
| 1459 | nvme_rdma_error_recovery(queue->ctrl); |
| 1460 | } |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 1461 | } else if (req->mr) { |
Jens Axboe | 1052b8a | 2018-11-26 08:21:49 -0700 | [diff] [blame] | 1462 | int ret; |
| 1463 | |
Sagi Grimberg | 2f122e4 | 2017-11-23 17:35:23 +0200 | [diff] [blame] | 1464 | ret = nvme_rdma_inv_rkey(queue, req); |
| 1465 | if (unlikely(ret < 0)) { |
| 1466 | dev_err(queue->ctrl->ctrl.device, |
| 1467 | "Queueing INV WR for rkey %#x failed (%d)\n", |
| 1468 | req->mr->rkey, ret); |
| 1469 | nvme_rdma_error_recovery(queue->ctrl); |
| 1470 | } |
| 1471 | /* the local invalidation completion will end the request */ |
Jens Axboe | 1052b8a | 2018-11-26 08:21:49 -0700 | [diff] [blame] | 1472 | return; |
Sagi Grimberg | 2f122e4 | 2017-11-23 17:35:23 +0200 | [diff] [blame] | 1473 | } |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1474 | |
Jens Axboe | 1052b8a | 2018-11-26 08:21:49 -0700 | [diff] [blame] | 1475 | if (refcount_dec_and_test(&req->ref)) |
Sagi Grimberg | 4af7f7f | 2017-11-23 17:35:22 +0200 | [diff] [blame] | 1476 | nvme_end_request(rq, req->status, req->result); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1477 | } |
| 1478 | |
Jens Axboe | 1052b8a | 2018-11-26 08:21:49 -0700 | [diff] [blame] | 1479 | static void nvme_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1480 | { |
| 1481 | struct nvme_rdma_qe *qe = |
| 1482 | container_of(wc->wr_cqe, struct nvme_rdma_qe, cqe); |
| 1483 | struct nvme_rdma_queue *queue = cq->cq_context; |
| 1484 | struct ib_device *ibdev = queue->device->dev; |
| 1485 | struct nvme_completion *cqe = qe->data; |
| 1486 | const size_t len = sizeof(struct nvme_completion); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1487 | |
| 1488 | if (unlikely(wc->status != IB_WC_SUCCESS)) { |
| 1489 | nvme_rdma_wr_error(cq, wc, "RECV"); |
Jens Axboe | 1052b8a | 2018-11-26 08:21:49 -0700 | [diff] [blame] | 1490 | return; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1491 | } |
| 1492 | |
| 1493 | ib_dma_sync_single_for_cpu(ibdev, qe->dma, len, DMA_FROM_DEVICE); |
| 1494 | /* |
| 1495 | * AEN requests are special as they don't time out and can |
| 1496 | * survive any kind of queue freeze and often don't respond to |
| 1497 | * aborts. We don't even bother to allocate a struct request |
| 1498 | * for them but rather special case them here. |
| 1499 | */ |
| 1500 | if (unlikely(nvme_rdma_queue_idx(queue) == 0 && |
Keith Busch | 38dabe2 | 2017-11-07 15:13:10 -0700 | [diff] [blame] | 1501 | cqe->command_id >= NVME_AQ_BLK_MQ_DEPTH)) |
Christoph Hellwig | 7bf5853 | 2016-11-10 07:32:34 -0800 | [diff] [blame] | 1502 | nvme_complete_async_event(&queue->ctrl->ctrl, cqe->status, |
| 1503 | &cqe->result); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1504 | else |
Jens Axboe | 1052b8a | 2018-11-26 08:21:49 -0700 | [diff] [blame] | 1505 | nvme_rdma_process_nvme_rsp(queue, cqe, wc); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1506 | ib_dma_sync_single_for_device(ibdev, qe->dma, len, DMA_FROM_DEVICE); |
| 1507 | |
| 1508 | nvme_rdma_post_recv(queue, qe); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1509 | } |
| 1510 | |
| 1511 | static int nvme_rdma_conn_established(struct nvme_rdma_queue *queue) |
| 1512 | { |
| 1513 | int ret, i; |
| 1514 | |
| 1515 | for (i = 0; i < queue->queue_size; i++) { |
| 1516 | ret = nvme_rdma_post_recv(queue, &queue->rsp_ring[i]); |
| 1517 | if (ret) |
| 1518 | goto out_destroy_queue_ib; |
| 1519 | } |
| 1520 | |
| 1521 | return 0; |
| 1522 | |
| 1523 | out_destroy_queue_ib: |
| 1524 | nvme_rdma_destroy_queue_ib(queue); |
| 1525 | return ret; |
| 1526 | } |
| 1527 | |
| 1528 | static int nvme_rdma_conn_rejected(struct nvme_rdma_queue *queue, |
| 1529 | struct rdma_cm_event *ev) |
| 1530 | { |
Steve Wise | 7f03953 | 2016-10-26 12:36:47 -0700 | [diff] [blame] | 1531 | struct rdma_cm_id *cm_id = queue->cm_id; |
| 1532 | int status = ev->status; |
| 1533 | const char *rej_msg; |
| 1534 | const struct nvme_rdma_cm_rej *rej_data; |
| 1535 | u8 rej_data_len; |
| 1536 | |
| 1537 | rej_msg = rdma_reject_msg(cm_id, status); |
| 1538 | rej_data = rdma_consumer_reject_data(cm_id, ev, &rej_data_len); |
| 1539 | |
| 1540 | if (rej_data && rej_data_len >= sizeof(u16)) { |
| 1541 | u16 sts = le16_to_cpu(rej_data->sts); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1542 | |
| 1543 | dev_err(queue->ctrl->ctrl.device, |
Steve Wise | 7f03953 | 2016-10-26 12:36:47 -0700 | [diff] [blame] | 1544 | "Connect rejected: status %d (%s) nvme status %d (%s).\n", |
| 1545 | status, rej_msg, sts, nvme_rdma_cm_msg(sts)); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1546 | } else { |
| 1547 | dev_err(queue->ctrl->ctrl.device, |
Steve Wise | 7f03953 | 2016-10-26 12:36:47 -0700 | [diff] [blame] | 1548 | "Connect rejected: status %d (%s).\n", status, rej_msg); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1549 | } |
| 1550 | |
| 1551 | return -ECONNRESET; |
| 1552 | } |
| 1553 | |
| 1554 | static int nvme_rdma_addr_resolved(struct nvme_rdma_queue *queue) |
| 1555 | { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1556 | int ret; |
| 1557 | |
Sagi Grimberg | ca6e95b | 2017-05-04 13:33:09 +0300 | [diff] [blame] | 1558 | ret = nvme_rdma_create_queue_ib(queue); |
| 1559 | if (ret) |
| 1560 | return ret; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1561 | |
| 1562 | ret = rdma_resolve_route(queue->cm_id, NVME_RDMA_CONNECT_TIMEOUT_MS); |
| 1563 | if (ret) { |
| 1564 | dev_err(queue->ctrl->ctrl.device, |
| 1565 | "rdma_resolve_route failed (%d).\n", |
| 1566 | queue->cm_error); |
| 1567 | goto out_destroy_queue; |
| 1568 | } |
| 1569 | |
| 1570 | return 0; |
| 1571 | |
| 1572 | out_destroy_queue: |
| 1573 | nvme_rdma_destroy_queue_ib(queue); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1574 | return ret; |
| 1575 | } |
| 1576 | |
| 1577 | static int nvme_rdma_route_resolved(struct nvme_rdma_queue *queue) |
| 1578 | { |
| 1579 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; |
| 1580 | struct rdma_conn_param param = { }; |
Roland Dreier | 0b857b4 | 2016-07-31 00:27:39 -0700 | [diff] [blame] | 1581 | struct nvme_rdma_cm_req priv = { }; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1582 | int ret; |
| 1583 | |
| 1584 | param.qp_num = queue->qp->qp_num; |
| 1585 | param.flow_control = 1; |
| 1586 | |
| 1587 | param.responder_resources = queue->device->dev->attrs.max_qp_rd_atom; |
Sagi Grimberg | 2ac17c2 | 2016-06-22 15:06:00 +0300 | [diff] [blame] | 1588 | /* maximum retry count */ |
| 1589 | param.retry_count = 7; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1590 | param.rnr_retry_count = 7; |
| 1591 | param.private_data = &priv; |
| 1592 | param.private_data_len = sizeof(priv); |
| 1593 | |
| 1594 | priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0); |
| 1595 | priv.qid = cpu_to_le16(nvme_rdma_queue_idx(queue)); |
Jay Freyensee | f994d9d | 2016-08-17 15:00:26 -0700 | [diff] [blame] | 1596 | /* |
| 1597 | * set the admin queue depth to the minimum size |
| 1598 | * specified by the Fabrics standard. |
| 1599 | */ |
| 1600 | if (priv.qid == 0) { |
Sagi Grimberg | 7aa1f42 | 2017-06-18 16:15:59 +0300 | [diff] [blame] | 1601 | priv.hrqsize = cpu_to_le16(NVME_AQ_DEPTH); |
| 1602 | priv.hsqsize = cpu_to_le16(NVME_AQ_DEPTH - 1); |
Jay Freyensee | f994d9d | 2016-08-17 15:00:26 -0700 | [diff] [blame] | 1603 | } else { |
Jay Freyensee | c5af865 | 2016-08-17 15:00:27 -0700 | [diff] [blame] | 1604 | /* |
| 1605 | * current interpretation of the fabrics spec |
| 1606 | * is at minimum you make hrqsize sqsize+1, or a |
| 1607 | * 1's based representation of sqsize. |
| 1608 | */ |
Jay Freyensee | f994d9d | 2016-08-17 15:00:26 -0700 | [diff] [blame] | 1609 | priv.hrqsize = cpu_to_le16(queue->queue_size); |
Jay Freyensee | c5af865 | 2016-08-17 15:00:27 -0700 | [diff] [blame] | 1610 | priv.hsqsize = cpu_to_le16(queue->ctrl->ctrl.sqsize); |
Jay Freyensee | f994d9d | 2016-08-17 15:00:26 -0700 | [diff] [blame] | 1611 | } |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1612 | |
| 1613 | ret = rdma_connect(queue->cm_id, ¶m); |
| 1614 | if (ret) { |
| 1615 | dev_err(ctrl->ctrl.device, |
| 1616 | "rdma_connect failed (%d).\n", ret); |
| 1617 | goto out_destroy_queue_ib; |
| 1618 | } |
| 1619 | |
| 1620 | return 0; |
| 1621 | |
| 1622 | out_destroy_queue_ib: |
| 1623 | nvme_rdma_destroy_queue_ib(queue); |
| 1624 | return ret; |
| 1625 | } |
| 1626 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1627 | static int nvme_rdma_cm_handler(struct rdma_cm_id *cm_id, |
| 1628 | struct rdma_cm_event *ev) |
| 1629 | { |
| 1630 | struct nvme_rdma_queue *queue = cm_id->context; |
| 1631 | int cm_error = 0; |
| 1632 | |
| 1633 | dev_dbg(queue->ctrl->ctrl.device, "%s (%d): status %d id %p\n", |
| 1634 | rdma_event_msg(ev->event), ev->event, |
| 1635 | ev->status, cm_id); |
| 1636 | |
| 1637 | switch (ev->event) { |
| 1638 | case RDMA_CM_EVENT_ADDR_RESOLVED: |
| 1639 | cm_error = nvme_rdma_addr_resolved(queue); |
| 1640 | break; |
| 1641 | case RDMA_CM_EVENT_ROUTE_RESOLVED: |
| 1642 | cm_error = nvme_rdma_route_resolved(queue); |
| 1643 | break; |
| 1644 | case RDMA_CM_EVENT_ESTABLISHED: |
| 1645 | queue->cm_error = nvme_rdma_conn_established(queue); |
| 1646 | /* complete cm_done regardless of success/failure */ |
| 1647 | complete(&queue->cm_done); |
| 1648 | return 0; |
| 1649 | case RDMA_CM_EVENT_REJECTED: |
Sagi Grimberg | abf87d5 | 2017-05-04 13:33:10 +0300 | [diff] [blame] | 1650 | nvme_rdma_destroy_queue_ib(queue); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1651 | cm_error = nvme_rdma_conn_rejected(queue, ev); |
| 1652 | break; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1653 | case RDMA_CM_EVENT_ROUTE_ERROR: |
| 1654 | case RDMA_CM_EVENT_CONNECT_ERROR: |
| 1655 | case RDMA_CM_EVENT_UNREACHABLE: |
Sagi Grimberg | abf87d5 | 2017-05-04 13:33:10 +0300 | [diff] [blame] | 1656 | nvme_rdma_destroy_queue_ib(queue); |
Gustavo A. R. Silva | 249090f | 2018-07-05 08:14:00 -0500 | [diff] [blame] | 1657 | /* fall through */ |
Sagi Grimberg | abf87d5 | 2017-05-04 13:33:10 +0300 | [diff] [blame] | 1658 | case RDMA_CM_EVENT_ADDR_ERROR: |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1659 | dev_dbg(queue->ctrl->ctrl.device, |
| 1660 | "CM error event %d\n", ev->event); |
| 1661 | cm_error = -ECONNRESET; |
| 1662 | break; |
| 1663 | case RDMA_CM_EVENT_DISCONNECTED: |
| 1664 | case RDMA_CM_EVENT_ADDR_CHANGE: |
| 1665 | case RDMA_CM_EVENT_TIMEWAIT_EXIT: |
| 1666 | dev_dbg(queue->ctrl->ctrl.device, |
| 1667 | "disconnect received - connection closed\n"); |
| 1668 | nvme_rdma_error_recovery(queue->ctrl); |
| 1669 | break; |
| 1670 | case RDMA_CM_EVENT_DEVICE_REMOVAL: |
Steve Wise | e87a911 | 2016-09-02 09:01:54 -0700 | [diff] [blame] | 1671 | /* device removal is handled via the ib_client API */ |
| 1672 | break; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1673 | default: |
| 1674 | dev_err(queue->ctrl->ctrl.device, |
| 1675 | "Unexpected RDMA CM event (%d)\n", ev->event); |
| 1676 | nvme_rdma_error_recovery(queue->ctrl); |
| 1677 | break; |
| 1678 | } |
| 1679 | |
| 1680 | if (cm_error) { |
| 1681 | queue->cm_error = cm_error; |
| 1682 | complete(&queue->cm_done); |
| 1683 | } |
| 1684 | |
| 1685 | return 0; |
| 1686 | } |
| 1687 | |
| 1688 | static enum blk_eh_timer_return |
| 1689 | nvme_rdma_timeout(struct request *rq, bool reserved) |
| 1690 | { |
| 1691 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
Sagi Grimberg | 4c174e6 | 2019-01-08 00:53:22 -0800 | [diff] [blame] | 1692 | struct nvme_rdma_queue *queue = req->queue; |
| 1693 | struct nvme_rdma_ctrl *ctrl = queue->ctrl; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1694 | |
Sagi Grimberg | 4c174e6 | 2019-01-08 00:53:22 -0800 | [diff] [blame] | 1695 | dev_warn(ctrl->ctrl.device, "I/O %d QID %d timeout\n", |
| 1696 | rq->tag, nvme_rdma_queue_idx(queue)); |
Nitzan Carmi | e62a538 | 2017-10-22 09:37:04 +0000 | [diff] [blame] | 1697 | |
Sagi Grimberg | 4c174e6 | 2019-01-08 00:53:22 -0800 | [diff] [blame] | 1698 | if (ctrl->ctrl.state != NVME_CTRL_LIVE) { |
| 1699 | /* |
| 1700 | * Teardown immediately if controller times out while starting |
| 1701 | * or we are already started error recovery. all outstanding |
| 1702 | * requests are completed on shutdown, so we return BLK_EH_DONE. |
| 1703 | */ |
| 1704 | flush_work(&ctrl->err_work); |
| 1705 | nvme_rdma_teardown_io_queues(ctrl, false); |
| 1706 | nvme_rdma_teardown_admin_queue(ctrl, false); |
| 1707 | return BLK_EH_DONE; |
| 1708 | } |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1709 | |
Sagi Grimberg | 4c174e6 | 2019-01-08 00:53:22 -0800 | [diff] [blame] | 1710 | dev_warn(ctrl->ctrl.device, "starting error recovery\n"); |
| 1711 | nvme_rdma_error_recovery(ctrl); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1712 | |
Sagi Grimberg | 4c174e6 | 2019-01-08 00:53:22 -0800 | [diff] [blame] | 1713 | return BLK_EH_RESET_TIMER; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1714 | } |
| 1715 | |
Christoph Hellwig | fc17b65 | 2017-06-03 09:38:05 +0200 | [diff] [blame] | 1716 | static blk_status_t nvme_rdma_queue_rq(struct blk_mq_hw_ctx *hctx, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1717 | const struct blk_mq_queue_data *bd) |
| 1718 | { |
| 1719 | struct nvme_ns *ns = hctx->queue->queuedata; |
| 1720 | struct nvme_rdma_queue *queue = hctx->driver_data; |
| 1721 | struct request *rq = bd->rq; |
| 1722 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
| 1723 | struct nvme_rdma_qe *sqe = &req->sqe; |
| 1724 | struct nvme_command *c = sqe->data; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1725 | struct ib_device *dev; |
Christoph Hellwig | 3bc32bb | 2018-06-11 17:34:06 +0200 | [diff] [blame] | 1726 | bool queue_ready = test_bit(NVME_RDMA_Q_LIVE, &queue->flags); |
Christoph Hellwig | fc17b65 | 2017-06-03 09:38:05 +0200 | [diff] [blame] | 1727 | blk_status_t ret; |
| 1728 | int err; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1729 | |
| 1730 | WARN_ON_ONCE(rq->tag < 0); |
| 1731 | |
Christoph Hellwig | 3bc32bb | 2018-06-11 17:34:06 +0200 | [diff] [blame] | 1732 | if (!nvmf_check_ready(&queue->ctrl->ctrl, rq, queue_ready)) |
James Smart | 6cdefc6 | 2018-07-20 15:49:48 -0700 | [diff] [blame] | 1733 | return nvmf_fail_nonready_command(&queue->ctrl->ctrl, rq); |
Christoph Hellwig | 553cd9e | 2016-11-02 08:49:18 -0600 | [diff] [blame] | 1734 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1735 | dev = queue->device->dev; |
| 1736 | ib_dma_sync_single_for_cpu(dev, sqe->dma, |
| 1737 | sizeof(struct nvme_command), DMA_TO_DEVICE); |
| 1738 | |
| 1739 | ret = nvme_setup_cmd(ns, rq, c); |
Christoph Hellwig | fc17b65 | 2017-06-03 09:38:05 +0200 | [diff] [blame] | 1740 | if (ret) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1741 | return ret; |
| 1742 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1743 | blk_mq_start_request(rq); |
| 1744 | |
Christoph Hellwig | fc17b65 | 2017-06-03 09:38:05 +0200 | [diff] [blame] | 1745 | err = nvme_rdma_map_data(queue, rq, c); |
Max Gurtovoy | a7b7c7a | 2017-08-14 15:29:26 +0300 | [diff] [blame] | 1746 | if (unlikely(err < 0)) { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1747 | dev_err(queue->ctrl->ctrl.device, |
Christoph Hellwig | fc17b65 | 2017-06-03 09:38:05 +0200 | [diff] [blame] | 1748 | "Failed to map data (%d)\n", err); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1749 | nvme_cleanup_cmd(rq); |
| 1750 | goto err; |
| 1751 | } |
| 1752 | |
Sagi Grimberg | b4b591c | 2017-11-23 17:35:21 +0200 | [diff] [blame] | 1753 | sqe->cqe.done = nvme_rdma_send_done; |
| 1754 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1755 | ib_dma_sync_single_for_device(dev, sqe->dma, |
| 1756 | sizeof(struct nvme_command), DMA_TO_DEVICE); |
| 1757 | |
Christoph Hellwig | fc17b65 | 2017-06-03 09:38:05 +0200 | [diff] [blame] | 1758 | err = nvme_rdma_post_send(queue, sqe, req->sge, req->num_sge, |
Israel Rukshin | f41725b | 2017-11-26 10:40:55 +0000 | [diff] [blame] | 1759 | req->mr ? &req->reg_wr.wr : NULL); |
Max Gurtovoy | a7b7c7a | 2017-08-14 15:29:26 +0300 | [diff] [blame] | 1760 | if (unlikely(err)) { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1761 | nvme_rdma_unmap_data(queue, rq); |
| 1762 | goto err; |
| 1763 | } |
| 1764 | |
Christoph Hellwig | fc17b65 | 2017-06-03 09:38:05 +0200 | [diff] [blame] | 1765 | return BLK_STS_OK; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1766 | err: |
Christoph Hellwig | fc17b65 | 2017-06-03 09:38:05 +0200 | [diff] [blame] | 1767 | if (err == -ENOMEM || err == -EAGAIN) |
| 1768 | return BLK_STS_RESOURCE; |
| 1769 | return BLK_STS_IOERR; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1770 | } |
| 1771 | |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 1772 | static int nvme_rdma_poll(struct blk_mq_hw_ctx *hctx) |
| 1773 | { |
| 1774 | struct nvme_rdma_queue *queue = hctx->driver_data; |
| 1775 | |
| 1776 | return ib_process_cq_direct(queue->ib_cq, -1); |
| 1777 | } |
| 1778 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1779 | static void nvme_rdma_complete_rq(struct request *rq) |
| 1780 | { |
| 1781 | struct nvme_rdma_request *req = blk_mq_rq_to_pdu(rq); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1782 | |
Christoph Hellwig | 77f02a7 | 2017-03-30 13:41:32 +0200 | [diff] [blame] | 1783 | nvme_rdma_unmap_data(req->queue, rq); |
| 1784 | nvme_complete_rq(rq); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1785 | } |
| 1786 | |
Sagi Grimberg | 0b36658 | 2017-07-13 11:09:44 +0300 | [diff] [blame] | 1787 | static int nvme_rdma_map_queues(struct blk_mq_tag_set *set) |
| 1788 | { |
| 1789 | struct nvme_rdma_ctrl *ctrl = set->driver_data; |
| 1790 | |
Sagi Grimberg | b65bb77 | 2018-12-11 23:38:58 -0800 | [diff] [blame] | 1791 | set->map[HCTX_TYPE_DEFAULT].queue_offset = 0; |
Sagi Grimberg | b1064d3 | 2019-01-18 16:43:24 -0800 | [diff] [blame] | 1792 | set->map[HCTX_TYPE_DEFAULT].nr_queues = |
| 1793 | ctrl->io_queues[HCTX_TYPE_DEFAULT]; |
| 1794 | set->map[HCTX_TYPE_READ].nr_queues = ctrl->io_queues[HCTX_TYPE_READ]; |
Sagi Grimberg | b65bb77 | 2018-12-11 23:38:58 -0800 | [diff] [blame] | 1795 | if (ctrl->ctrl.opts->nr_write_queues) { |
| 1796 | /* separate read/write queues */ |
Sagi Grimberg | b65bb77 | 2018-12-11 23:38:58 -0800 | [diff] [blame] | 1797 | set->map[HCTX_TYPE_READ].queue_offset = |
Sagi Grimberg | b1064d3 | 2019-01-18 16:43:24 -0800 | [diff] [blame] | 1798 | ctrl->io_queues[HCTX_TYPE_DEFAULT]; |
Sagi Grimberg | b65bb77 | 2018-12-11 23:38:58 -0800 | [diff] [blame] | 1799 | } else { |
| 1800 | /* mixed read/write queues */ |
Sagi Grimberg | b65bb77 | 2018-12-11 23:38:58 -0800 | [diff] [blame] | 1801 | set->map[HCTX_TYPE_READ].queue_offset = 0; |
| 1802 | } |
| 1803 | blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_DEFAULT], |
| 1804 | ctrl->device->dev, 0); |
| 1805 | blk_mq_rdma_map_queues(&set->map[HCTX_TYPE_READ], |
| 1806 | ctrl->device->dev, 0); |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 1807 | |
| 1808 | if (ctrl->ctrl.opts->nr_poll_queues) { |
| 1809 | set->map[HCTX_TYPE_POLL].nr_queues = |
Sagi Grimberg | b1064d3 | 2019-01-18 16:43:24 -0800 | [diff] [blame] | 1810 | ctrl->io_queues[HCTX_TYPE_POLL]; |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 1811 | set->map[HCTX_TYPE_POLL].queue_offset = |
Sagi Grimberg | b1064d3 | 2019-01-18 16:43:24 -0800 | [diff] [blame] | 1812 | ctrl->io_queues[HCTX_TYPE_DEFAULT]; |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 1813 | if (ctrl->ctrl.opts->nr_write_queues) |
| 1814 | set->map[HCTX_TYPE_POLL].queue_offset += |
Sagi Grimberg | b1064d3 | 2019-01-18 16:43:24 -0800 | [diff] [blame] | 1815 | ctrl->io_queues[HCTX_TYPE_READ]; |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 1816 | blk_mq_map_queues(&set->map[HCTX_TYPE_POLL]); |
| 1817 | } |
Sagi Grimberg | b65bb77 | 2018-12-11 23:38:58 -0800 | [diff] [blame] | 1818 | return 0; |
Sagi Grimberg | 0b36658 | 2017-07-13 11:09:44 +0300 | [diff] [blame] | 1819 | } |
| 1820 | |
Eric Biggers | f363b08 | 2017-03-30 13:39:16 -0700 | [diff] [blame] | 1821 | static const struct blk_mq_ops nvme_rdma_mq_ops = { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1822 | .queue_rq = nvme_rdma_queue_rq, |
| 1823 | .complete = nvme_rdma_complete_rq, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1824 | .init_request = nvme_rdma_init_request, |
| 1825 | .exit_request = nvme_rdma_exit_request, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1826 | .init_hctx = nvme_rdma_init_hctx, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1827 | .timeout = nvme_rdma_timeout, |
Sagi Grimberg | 0b36658 | 2017-07-13 11:09:44 +0300 | [diff] [blame] | 1828 | .map_queues = nvme_rdma_map_queues, |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 1829 | .poll = nvme_rdma_poll, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1830 | }; |
| 1831 | |
Eric Biggers | f363b08 | 2017-03-30 13:39:16 -0700 | [diff] [blame] | 1832 | static const struct blk_mq_ops nvme_rdma_admin_mq_ops = { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1833 | .queue_rq = nvme_rdma_queue_rq, |
| 1834 | .complete = nvme_rdma_complete_rq, |
Christoph Hellwig | 385475e | 2017-06-13 09:15:19 +0200 | [diff] [blame] | 1835 | .init_request = nvme_rdma_init_request, |
| 1836 | .exit_request = nvme_rdma_exit_request, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1837 | .init_hctx = nvme_rdma_init_admin_hctx, |
| 1838 | .timeout = nvme_rdma_timeout, |
| 1839 | }; |
| 1840 | |
Sagi Grimberg | 18398af | 2017-07-10 09:22:31 +0300 | [diff] [blame] | 1841 | static void nvme_rdma_shutdown_ctrl(struct nvme_rdma_ctrl *ctrl, bool shutdown) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1842 | { |
Sagi Grimberg | 794a4cb | 2019-01-01 00:19:30 -0800 | [diff] [blame] | 1843 | cancel_work_sync(&ctrl->err_work); |
| 1844 | cancel_delayed_work_sync(&ctrl->reconnect_work); |
| 1845 | |
Sagi Grimberg | 75862c7 | 2018-07-09 12:49:07 +0300 | [diff] [blame] | 1846 | nvme_rdma_teardown_io_queues(ctrl, shutdown); |
Sagi Grimberg | 18398af | 2017-07-10 09:22:31 +0300 | [diff] [blame] | 1847 | if (shutdown) |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1848 | nvme_shutdown_ctrl(&ctrl->ctrl); |
Sagi Grimberg | 18398af | 2017-07-10 09:22:31 +0300 | [diff] [blame] | 1849 | else |
| 1850 | nvme_disable_ctrl(&ctrl->ctrl, ctrl->ctrl.cap); |
Sagi Grimberg | 75862c7 | 2018-07-09 12:49:07 +0300 | [diff] [blame] | 1851 | nvme_rdma_teardown_admin_queue(ctrl, shutdown); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1852 | } |
| 1853 | |
Christoph Hellwig | c5017e8 | 2017-10-29 10:44:29 +0200 | [diff] [blame] | 1854 | static void nvme_rdma_delete_ctrl(struct nvme_ctrl *ctrl) |
Sagi Grimberg | 2461a8d | 2016-07-24 09:29:51 +0300 | [diff] [blame] | 1855 | { |
Christoph Hellwig | e9bc258 | 2017-10-29 10:44:30 +0200 | [diff] [blame] | 1856 | nvme_rdma_shutdown_ctrl(to_rdma_ctrl(ctrl), true); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1857 | } |
| 1858 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1859 | static void nvme_rdma_reset_ctrl_work(struct work_struct *work) |
| 1860 | { |
Christoph Hellwig | d86c4d8 | 2017-06-15 15:41:08 +0200 | [diff] [blame] | 1861 | struct nvme_rdma_ctrl *ctrl = |
| 1862 | container_of(work, struct nvme_rdma_ctrl, ctrl.reset_work); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1863 | |
Sagi Grimberg | d09f2b4 | 2017-07-02 10:56:43 +0300 | [diff] [blame] | 1864 | nvme_stop_ctrl(&ctrl->ctrl); |
Sagi Grimberg | 18398af | 2017-07-10 09:22:31 +0300 | [diff] [blame] | 1865 | nvme_rdma_shutdown_ctrl(ctrl, false); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1866 | |
Max Gurtovoy | ad6a0a5 | 2018-01-31 18:31:24 +0200 | [diff] [blame] | 1867 | if (!nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING)) { |
Sagi Grimberg | d5bf4b7 | 2017-12-21 14:54:15 +0200 | [diff] [blame] | 1868 | /* state change failure should never happen */ |
| 1869 | WARN_ON_ONCE(1); |
| 1870 | return; |
| 1871 | } |
| 1872 | |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 1873 | if (nvme_rdma_setup_ctrl(ctrl, false)) |
Sagi Grimberg | 370ae6e | 2017-07-10 09:22:38 +0300 | [diff] [blame] | 1874 | goto out_fail; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1875 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1876 | return; |
| 1877 | |
Sagi Grimberg | 370ae6e | 2017-07-10 09:22:38 +0300 | [diff] [blame] | 1878 | out_fail: |
Nitzan Carmi | 8000d1f | 2018-01-17 11:01:14 +0000 | [diff] [blame] | 1879 | ++ctrl->ctrl.nr_reconnects; |
| 1880 | nvme_rdma_reconnect_or_remove(ctrl); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1881 | } |
| 1882 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1883 | static const struct nvme_ctrl_ops nvme_rdma_ctrl_ops = { |
| 1884 | .name = "rdma", |
| 1885 | .module = THIS_MODULE, |
Christoph Hellwig | d3d5b87 | 2017-05-20 15:14:44 +0200 | [diff] [blame] | 1886 | .flags = NVME_F_FABRICS, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1887 | .reg_read32 = nvmf_reg_read32, |
| 1888 | .reg_read64 = nvmf_reg_read64, |
| 1889 | .reg_write32 = nvmf_reg_write32, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1890 | .free_ctrl = nvme_rdma_free_ctrl, |
| 1891 | .submit_async_event = nvme_rdma_submit_async_event, |
Christoph Hellwig | c5017e8 | 2017-10-29 10:44:29 +0200 | [diff] [blame] | 1892 | .delete_ctrl = nvme_rdma_delete_ctrl, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1893 | .get_address = nvmf_get_address, |
| 1894 | }; |
| 1895 | |
James Smart | 36e835f | 2017-10-20 16:17:09 -0700 | [diff] [blame] | 1896 | /* |
| 1897 | * Fails a connection request if it matches an existing controller |
| 1898 | * (association) with the same tuple: |
| 1899 | * <Host NQN, Host ID, local address, remote address, remote port, SUBSYS NQN> |
| 1900 | * |
| 1901 | * if local address is not specified in the request, it will match an |
| 1902 | * existing controller with all the other parameters the same and no |
| 1903 | * local port address specified as well. |
| 1904 | * |
| 1905 | * The ports don't need to be compared as they are intrinsically |
| 1906 | * already matched by the port pointers supplied. |
| 1907 | */ |
| 1908 | static bool |
| 1909 | nvme_rdma_existing_controller(struct nvmf_ctrl_options *opts) |
| 1910 | { |
| 1911 | struct nvme_rdma_ctrl *ctrl; |
| 1912 | bool found = false; |
| 1913 | |
| 1914 | mutex_lock(&nvme_rdma_ctrl_mutex); |
| 1915 | list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { |
Sagi Grimberg | b7c7be6f6 | 2018-10-18 17:40:40 -0700 | [diff] [blame] | 1916 | found = nvmf_ip_options_match(&ctrl->ctrl, opts); |
James Smart | 36e835f | 2017-10-20 16:17:09 -0700 | [diff] [blame] | 1917 | if (found) |
| 1918 | break; |
| 1919 | } |
| 1920 | mutex_unlock(&nvme_rdma_ctrl_mutex); |
| 1921 | |
| 1922 | return found; |
| 1923 | } |
| 1924 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1925 | static struct nvme_ctrl *nvme_rdma_create_ctrl(struct device *dev, |
| 1926 | struct nvmf_ctrl_options *opts) |
| 1927 | { |
| 1928 | struct nvme_rdma_ctrl *ctrl; |
| 1929 | int ret; |
| 1930 | bool changed; |
| 1931 | |
| 1932 | ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); |
| 1933 | if (!ctrl) |
| 1934 | return ERR_PTR(-ENOMEM); |
| 1935 | ctrl->ctrl.opts = opts; |
| 1936 | INIT_LIST_HEAD(&ctrl->list); |
| 1937 | |
Sagi Grimberg | bb59b8e | 2018-10-19 00:50:29 -0700 | [diff] [blame] | 1938 | if (!(opts->mask & NVMF_OPT_TRSVCID)) { |
| 1939 | opts->trsvcid = |
| 1940 | kstrdup(__stringify(NVME_RDMA_IP_PORT), GFP_KERNEL); |
| 1941 | if (!opts->trsvcid) { |
| 1942 | ret = -ENOMEM; |
| 1943 | goto out_free_ctrl; |
| 1944 | } |
| 1945 | opts->mask |= NVMF_OPT_TRSVCID; |
| 1946 | } |
Sagi Grimberg | 0928f9b | 2017-02-05 21:49:32 +0200 | [diff] [blame] | 1947 | |
| 1948 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, |
Sagi Grimberg | bb59b8e | 2018-10-19 00:50:29 -0700 | [diff] [blame] | 1949 | opts->traddr, opts->trsvcid, &ctrl->addr); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1950 | if (ret) { |
Sagi Grimberg | bb59b8e | 2018-10-19 00:50:29 -0700 | [diff] [blame] | 1951 | pr_err("malformed address passed: %s:%s\n", |
| 1952 | opts->traddr, opts->trsvcid); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1953 | goto out_free_ctrl; |
| 1954 | } |
| 1955 | |
Max Gurtovoy | 8f4e8da | 2017-02-19 20:08:03 +0200 | [diff] [blame] | 1956 | if (opts->mask & NVMF_OPT_HOST_TRADDR) { |
Sagi Grimberg | 0928f9b | 2017-02-05 21:49:32 +0200 | [diff] [blame] | 1957 | ret = inet_pton_with_scope(&init_net, AF_UNSPEC, |
| 1958 | opts->host_traddr, NULL, &ctrl->src_addr); |
Max Gurtovoy | 8f4e8da | 2017-02-19 20:08:03 +0200 | [diff] [blame] | 1959 | if (ret) { |
Sagi Grimberg | 0928f9b | 2017-02-05 21:49:32 +0200 | [diff] [blame] | 1960 | pr_err("malformed src address passed: %s\n", |
Max Gurtovoy | 8f4e8da | 2017-02-19 20:08:03 +0200 | [diff] [blame] | 1961 | opts->host_traddr); |
| 1962 | goto out_free_ctrl; |
| 1963 | } |
| 1964 | } |
| 1965 | |
James Smart | 36e835f | 2017-10-20 16:17:09 -0700 | [diff] [blame] | 1966 | if (!opts->duplicate_connect && nvme_rdma_existing_controller(opts)) { |
| 1967 | ret = -EALREADY; |
| 1968 | goto out_free_ctrl; |
| 1969 | } |
| 1970 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1971 | INIT_DELAYED_WORK(&ctrl->reconnect_work, |
| 1972 | nvme_rdma_reconnect_ctrl_work); |
| 1973 | INIT_WORK(&ctrl->err_work, nvme_rdma_error_recovery_work); |
Christoph Hellwig | d86c4d8 | 2017-06-15 15:41:08 +0200 | [diff] [blame] | 1974 | INIT_WORK(&ctrl->ctrl.reset_work, nvme_rdma_reset_ctrl_work); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1975 | |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 1976 | ctrl->ctrl.queue_count = opts->nr_io_queues + opts->nr_write_queues + |
| 1977 | opts->nr_poll_queues + 1; |
Jay Freyensee | c5af865 | 2016-08-17 15:00:27 -0700 | [diff] [blame] | 1978 | ctrl->ctrl.sqsize = opts->queue_size - 1; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1979 | ctrl->ctrl.kato = opts->kato; |
| 1980 | |
| 1981 | ret = -ENOMEM; |
Sagi Grimberg | d858e5f | 2017-04-24 10:58:29 +0300 | [diff] [blame] | 1982 | ctrl->queues = kcalloc(ctrl->ctrl.queue_count, sizeof(*ctrl->queues), |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1983 | GFP_KERNEL); |
| 1984 | if (!ctrl->queues) |
Sagi Grimberg | 3d06410 | 2018-06-19 15:34:09 +0300 | [diff] [blame] | 1985 | goto out_free_ctrl; |
| 1986 | |
| 1987 | ret = nvme_init_ctrl(&ctrl->ctrl, dev, &nvme_rdma_ctrl_ops, |
| 1988 | 0 /* no quirks, we're perfect! */); |
| 1989 | if (ret) |
| 1990 | goto out_kfree_queues; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1991 | |
Max Gurtovoy | b754a32 | 2018-01-31 18:31:25 +0200 | [diff] [blame] | 1992 | changed = nvme_change_ctrl_state(&ctrl->ctrl, NVME_CTRL_CONNECTING); |
| 1993 | WARN_ON_ONCE(!changed); |
| 1994 | |
Sagi Grimberg | c66e299 | 2018-07-09 12:49:06 +0300 | [diff] [blame] | 1995 | ret = nvme_rdma_setup_ctrl(ctrl, true); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1996 | if (ret) |
Sagi Grimberg | 3d06410 | 2018-06-19 15:34:09 +0300 | [diff] [blame] | 1997 | goto out_uninit_ctrl; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 1998 | |
Sagi Grimberg | 0928f9b | 2017-02-05 21:49:32 +0200 | [diff] [blame] | 1999 | dev_info(ctrl->ctrl.device, "new ctrl: NQN \"%s\", addr %pISpcs\n", |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2000 | ctrl->ctrl.opts->subsysnqn, &ctrl->addr); |
| 2001 | |
Christoph Hellwig | d22524a | 2017-10-18 13:25:42 +0200 | [diff] [blame] | 2002 | nvme_get_ctrl(&ctrl->ctrl); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2003 | |
| 2004 | mutex_lock(&nvme_rdma_ctrl_mutex); |
| 2005 | list_add_tail(&ctrl->list, &nvme_rdma_ctrl_list); |
| 2006 | mutex_unlock(&nvme_rdma_ctrl_mutex); |
| 2007 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2008 | return &ctrl->ctrl; |
| 2009 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2010 | out_uninit_ctrl: |
| 2011 | nvme_uninit_ctrl(&ctrl->ctrl); |
| 2012 | nvme_put_ctrl(&ctrl->ctrl); |
| 2013 | if (ret > 0) |
| 2014 | ret = -EIO; |
| 2015 | return ERR_PTR(ret); |
Sagi Grimberg | 3d06410 | 2018-06-19 15:34:09 +0300 | [diff] [blame] | 2016 | out_kfree_queues: |
| 2017 | kfree(ctrl->queues); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2018 | out_free_ctrl: |
| 2019 | kfree(ctrl); |
| 2020 | return ERR_PTR(ret); |
| 2021 | } |
| 2022 | |
| 2023 | static struct nvmf_transport_ops nvme_rdma_transport = { |
| 2024 | .name = "rdma", |
Roy Shterman | 0de5cd3 | 2017-12-25 14:18:30 +0200 | [diff] [blame] | 2025 | .module = THIS_MODULE, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2026 | .required_opts = NVMF_OPT_TRADDR, |
Max Gurtovoy | 8f4e8da | 2017-02-19 20:08:03 +0200 | [diff] [blame] | 2027 | .allowed_opts = NVMF_OPT_TRSVCID | NVMF_OPT_RECONNECT_DELAY | |
Sagi Grimberg | b65bb77 | 2018-12-11 23:38:58 -0800 | [diff] [blame] | 2028 | NVMF_OPT_HOST_TRADDR | NVMF_OPT_CTRL_LOSS_TMO | |
Sagi Grimberg | ff8519f | 2018-12-14 11:06:10 -0800 | [diff] [blame] | 2029 | NVMF_OPT_NR_WRITE_QUEUES | NVMF_OPT_NR_POLL_QUEUES, |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2030 | .create_ctrl = nvme_rdma_create_ctrl, |
| 2031 | }; |
| 2032 | |
Steve Wise | e87a911 | 2016-09-02 09:01:54 -0700 | [diff] [blame] | 2033 | static void nvme_rdma_remove_one(struct ib_device *ib_device, void *client_data) |
| 2034 | { |
| 2035 | struct nvme_rdma_ctrl *ctrl; |
Max Gurtovoy | 9bad040 | 2018-02-28 13:12:39 +0200 | [diff] [blame] | 2036 | struct nvme_rdma_device *ndev; |
| 2037 | bool found = false; |
| 2038 | |
| 2039 | mutex_lock(&device_list_mutex); |
| 2040 | list_for_each_entry(ndev, &device_list, entry) { |
| 2041 | if (ndev->dev == ib_device) { |
| 2042 | found = true; |
| 2043 | break; |
| 2044 | } |
| 2045 | } |
| 2046 | mutex_unlock(&device_list_mutex); |
| 2047 | |
| 2048 | if (!found) |
| 2049 | return; |
Steve Wise | e87a911 | 2016-09-02 09:01:54 -0700 | [diff] [blame] | 2050 | |
| 2051 | /* Delete all controllers using this device */ |
| 2052 | mutex_lock(&nvme_rdma_ctrl_mutex); |
| 2053 | list_for_each_entry(ctrl, &nvme_rdma_ctrl_list, list) { |
| 2054 | if (ctrl->device->dev != ib_device) |
| 2055 | continue; |
Christoph Hellwig | c5017e8 | 2017-10-29 10:44:29 +0200 | [diff] [blame] | 2056 | nvme_delete_ctrl(&ctrl->ctrl); |
Steve Wise | e87a911 | 2016-09-02 09:01:54 -0700 | [diff] [blame] | 2057 | } |
| 2058 | mutex_unlock(&nvme_rdma_ctrl_mutex); |
| 2059 | |
Roy Shterman | b227c59 | 2018-01-14 12:39:02 +0200 | [diff] [blame] | 2060 | flush_workqueue(nvme_delete_wq); |
Steve Wise | e87a911 | 2016-09-02 09:01:54 -0700 | [diff] [blame] | 2061 | } |
| 2062 | |
| 2063 | static struct ib_client nvme_rdma_ib_client = { |
| 2064 | .name = "nvme_rdma", |
Steve Wise | e87a911 | 2016-09-02 09:01:54 -0700 | [diff] [blame] | 2065 | .remove = nvme_rdma_remove_one |
| 2066 | }; |
| 2067 | |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2068 | static int __init nvme_rdma_init_module(void) |
| 2069 | { |
Steve Wise | e87a911 | 2016-09-02 09:01:54 -0700 | [diff] [blame] | 2070 | int ret; |
| 2071 | |
Steve Wise | e87a911 | 2016-09-02 09:01:54 -0700 | [diff] [blame] | 2072 | ret = ib_register_client(&nvme_rdma_ib_client); |
Sagi Grimberg | a56c79c | 2017-03-19 06:21:42 +0200 | [diff] [blame] | 2073 | if (ret) |
Sagi Grimberg | 9a6327d | 2017-06-07 20:31:55 +0200 | [diff] [blame] | 2074 | return ret; |
Steve Wise | e87a911 | 2016-09-02 09:01:54 -0700 | [diff] [blame] | 2075 | |
Sagi Grimberg | a56c79c | 2017-03-19 06:21:42 +0200 | [diff] [blame] | 2076 | ret = nvmf_register_transport(&nvme_rdma_transport); |
| 2077 | if (ret) |
| 2078 | goto err_unreg_client; |
| 2079 | |
| 2080 | return 0; |
| 2081 | |
| 2082 | err_unreg_client: |
| 2083 | ib_unregister_client(&nvme_rdma_ib_client); |
Sagi Grimberg | a56c79c | 2017-03-19 06:21:42 +0200 | [diff] [blame] | 2084 | return ret; |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2085 | } |
| 2086 | |
| 2087 | static void __exit nvme_rdma_cleanup_module(void) |
| 2088 | { |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2089 | nvmf_unregister_transport(&nvme_rdma_transport); |
Steve Wise | e87a911 | 2016-09-02 09:01:54 -0700 | [diff] [blame] | 2090 | ib_unregister_client(&nvme_rdma_ib_client); |
Christoph Hellwig | 7110230 | 2016-07-06 21:55:52 +0900 | [diff] [blame] | 2091 | } |
| 2092 | |
| 2093 | module_init(nvme_rdma_init_module); |
| 2094 | module_exit(nvme_rdma_cleanup_module); |
| 2095 | |
| 2096 | MODULE_LICENSE("GPL v2"); |