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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 1003f06953472ecc34f12d9867670f475a8c1af6 / . / arch / s390 / kernel / reipl64.S
blob: f18ef260ca237bb53f9fb04958dbc99a0d4de886 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]1/*
2 * arch/s390/kernel/reipl.S
3 *
4 * S390 version
5 * Copyright (C) 2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Holger Smolinski (Holger.Smolinski@de.ibm.com)
Heiko Carstens25d83cb2006-09-28 16:56:37 +0200[diff] [blame]7 Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]8 */
9
10#include <asm/lowcore.h>
Michael Holzheuff6b8ea2006-09-20 15:58:49 +0200[diff] [blame]11 .globl do_reipl_asm
12do_reipl_asm: basr %r13,0
Heiko Carstens15e9b582006-12-04 15:40:26 +0100[diff] [blame]13.Lpg0: lpswe .Lnewpsw-.Lpg0(%r13)
14.Lpg1: # do store status of all registers
Michael Holzheuff6b8ea2006-09-20 15:58:49 +0200[diff] [blame]15
Heiko Carstens15e9b582006-12-04 15:40:26 +0100[diff] [blame]16 stg %r1,.Lregsave-.Lpg0(%r13)
Michael Holzheuff6b8ea2006-09-20 15:58:49 +0200[diff] [blame]17 lghi %r1,0x1000
18 stmg %r0,%r15,__LC_GPREGS_SAVE_AREA-0x1000(%r1)
19 lg %r0,.Lregsave-.Lpg0(%r13)
20 stg %r0,__LC_GPREGS_SAVE_AREA-0x1000+8(%r1)
21 stctg %c0,%c15,__LC_CREGS_SAVE_AREA-0x1000(%r1)
22 stam %a0,%a15,__LC_AREGS_SAVE_AREA-0x1000(%r1)
23 stpx __LC_PREFIX_SAVE_AREA-0x1000(%r1)
24 stfpc __LC_FP_CREG_SAVE_AREA-0x1000(%r1)
25 stckc .Lclkcmp-.Lpg0(%r13)
26 mvc __LC_CLOCK_COMP_SAVE_AREA-0x1000(8,%r1),.Lclkcmp-.Lpg0(%r13)
27 stpt __LC_CPU_TIMER_SAVE_AREA-0x1000(%r1)
28 stg %r13, __LC_PSW_SAVE_AREA-0x1000+8(%r1)
29
Heiko Carstens15e9b582006-12-04 15:40:26 +0100[diff] [blame]30 lctlg %c6,%c6,.Lall-.Lpg0(%r13)
Heiko Carstens25d83cb2006-09-28 16:56:37 +0200[diff] [blame]31 lgr %r1,%r2
32 mvc __LC_PGM_NEW_PSW(16),.Lpcnew-.Lpg0(%r13)
33 stsch .Lschib-.Lpg0(%r13)
34 oi .Lschib+5-.Lpg0(%r13),0x84
35.Lecs: xi .Lschib+27-.Lpg0(%r13),0x01
36 msch .Lschib-.Lpg0(%r13)
37 lghi %r0,5
38.Lssch: ssch .Liplorb-.Lpg0(%r13)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]39 jz .L001
Heiko Carstens25d83cb2006-09-28 16:56:37 +0200[diff] [blame]40 brct %r0,.Lssch
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]41 bas %r14,.Ldisab-.Lpg0(%r13)
Heiko Carstens25d83cb2006-09-28 16:56:37 +0200[diff] [blame]42.L001: mvc __LC_IO_NEW_PSW(16),.Lionew-.Lpg0(%r13)
43.Ltpi: lpswe .Lwaitpsw-.Lpg0(%r13)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]44.Lcont: c %r1,__LC_SUBCHANNEL_ID
45 jnz .Ltpi
46 clc __LC_IO_INT_PARM(4),.Liplorb-.Lpg0(%r13)
47 jnz .Ltpi
Heiko Carstens25d83cb2006-09-28 16:56:37 +0200[diff] [blame]48 tsch .Liplirb-.Lpg0(%r13)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]49 tm .Liplirb+9-.Lpg0(%r13),0xbf
Heiko Carstens25d83cb2006-09-28 16:56:37 +0200[diff] [blame]50 jz .L002
51 bas %r14,.Ldisab-.Lpg0(%r13)
52.L002: tm .Liplirb+8-.Lpg0(%r13),0xf3
53 jz .L003
54 bas %r14,.Ldisab-.Lpg0(%r13)
Heiko Carstens15e9b582006-12-04 15:40:26 +0100[diff] [blame]55.L003: st %r1,__LC_SUBCHANNEL_ID
Heiko Carstens25d83cb2006-09-28 16:56:37 +0200[diff] [blame]56 lhi %r1,0 # mode 0 = esa
57 slr %r0,%r0 # set cpuid to zero
58 sigp %r1,%r0,0x12 # switch to esa mode
59 lpsw 0
60.Ldisab: sll %r14,1
61 srl %r14,1 # need to kill hi bit to avoid specification exceptions.
62 st %r14,.Ldispsw+12-.Lpg0(%r13)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]63 lpswe .Ldispsw-.Lpg0(%r13)
Heiko Carstens25d83cb2006-09-28 16:56:37 +0200[diff] [blame]64 .align 8
Michael Holzheuff6b8ea2006-09-20 15:58:49 +0200[diff] [blame]65.Lclkcmp: .quad 0x0000000000000000
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]66.Lall: .quad 0x00000000ff000000
Michael Holzheuff6b8ea2006-09-20 15:58:49 +0200[diff] [blame]67.Lregsave: .quad 0x0000000000000000
Heiko Carstens25d83cb2006-09-28 16:56:37 +0200[diff] [blame]68 .align 16
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]69/*
70 * These addresses have to be 31 bit otherwise
71 * the sigp will throw a specifcation exception
72 * when switching to ESA mode as bit 31 be set
73 * in the ESA psw.
74 * Bit 31 of the addresses has to be 0 for the
75 * 31bit lpswe instruction a fact they appear to have
76 * ommited from the pop.
77 */
Heiko Carstens25d83cb2006-09-28 16:56:37 +0200[diff] [blame]78.Lnewpsw: .quad 0x0000000080000000
79 .quad .Lpg1
80.Lpcnew: .quad 0x0000000080000000
81 .quad .Lecs
82.Lionew: .quad 0x0000000080000000
83 .quad .Lcont
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]84.Lwaitpsw: .quad 0x0202000080000000
Heiko Carstens25d83cb2006-09-28 16:56:37 +0200[diff] [blame]85 .quad .Ltpi
86.Ldispsw: .quad 0x0002000080000000
87 .quad 0x0000000000000000
88.Liplccws: .long 0x02000000,0x60000018
89 .long 0x08000008,0x20000001
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]90.Liplorb: .long 0x0049504c,0x0040ff80
91 .long 0x00000000+.Liplccws
Heiko Carstens25d83cb2006-09-28 16:56:37 +0200[diff] [blame]92.Lschib: .long 0x00000000,0x00000000
93 .long 0x00000000,0x00000000
94 .long 0x00000000,0x00000000
95 .long 0x00000000,0x00000000
96 .long 0x00000000,0x00000000
97 .long 0x00000000,0x00000000
Linus Torvalds1da177e2005-04-16 15:20:36 -0700[diff] [blame]98.Liplirb: .long 0x00000000,0x00000000
99 .long 0x00000000,0x00000000
100 .long 0x00000000,0x00000000
101 .long 0x00000000,0x00000000
102 .long 0x00000000,0x00000000
103 .long 0x00000000,0x00000000
104 .long 0x00000000,0x00000000
105 .long 0x00000000,0x00000000