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Thomas Gleixner1ccea772019-05-19 15:51:43 +02001// SPDX-License-Identifier: GPL-2.0-or-later
Dinh Nguyen66314222012-07-18 16:07:18 -06002/*
Dinh Nguyen56c5c132013-04-11 10:55:26 -05003 * Copyright 2011-2012 Calxeda, Inc.
4 * Copyright (C) 2012-2013 Altera Corporation <www.altera.com>
Dinh Nguyen66314222012-07-18 16:07:18 -06005 *
Dinh Nguyen56c5c132013-04-11 10:55:26 -05006 * Based from clk-highbank.c
Dinh Nguyen66314222012-07-18 16:07:18 -06007 */
Dinh Nguyen56c5c132013-04-11 10:55:26 -05008#include <linux/of.h>
Dinh Nguyen66314222012-07-18 16:07:18 -06009
Steffen Trumtrar97259e92014-01-06 10:27:37 -060010#include "clk.h"
Dinh Nguyen56c5c132013-04-11 10:55:26 -050011
Dinh Nguyena30d27e2014-04-14 07:59:32 -050012CLK_OF_DECLARE(socfpga_pll_clk, "altr,socfpga-pll-clock", socfpga_pll_init);
13CLK_OF_DECLARE(socfpga_perip_clk, "altr,socfpga-perip-clk", socfpga_periph_init);
14CLK_OF_DECLARE(socfpga_gate_clk, "altr,socfpga-gate-clk", socfpga_gate_init);
Dinh Nguyen53433252015-05-19 22:22:42 -050015CLK_OF_DECLARE(socfpga_a10_pll_clk, "altr,socfpga-a10-pll-clock",
16 socfpga_a10_pll_init);
17CLK_OF_DECLARE(socfpga_a10_perip_clk, "altr,socfpga-a10-perip-clk",
18 socfpga_a10_periph_init);
19CLK_OF_DECLARE(socfpga_a10_gate_clk, "altr,socfpga-a10-gate-clk",
20 socfpga_a10_gate_init);