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Zhu, Richard \(NSN - CN/Beijing\)a8bfece2014-07-01 07:14:23 +00001Kernel driver tps40422
2======================
3
4Supported chips:
Mauro Carvalho Chehab1f234ff2019-04-17 06:46:26 -03005
Zhu, Richard \(NSN - CN/Beijing\)a8bfece2014-07-01 07:14:23 +00006 * TI TPS40422
Mauro Carvalho Chehab1f234ff2019-04-17 06:46:26 -03007
Zhu, Richard \(NSN - CN/Beijing\)a8bfece2014-07-01 07:14:23 +00008 Prefix: 'tps40422'
Mauro Carvalho Chehab1f234ff2019-04-17 06:46:26 -03009
Zhu, Richard \(NSN - CN/Beijing\)a8bfece2014-07-01 07:14:23 +000010 Addresses scanned: -
Mauro Carvalho Chehab1f234ff2019-04-17 06:46:26 -030011
Zhu, Richard \(NSN - CN/Beijing\)a8bfece2014-07-01 07:14:23 +000012 Datasheet: http://www.ti.com/lit/gpn/tps40422
13
14Author: Zhu Laiwen <richard.zhu@nsn.com>
15
16
17Description
18-----------
19
20This driver supports TI TPS40422 Dual-Output or Two-Phase Synchronous Buck
21Controller with PMBus
22
23The driver is a client driver to the core PMBus driver.
Mauro Carvalho Chehab7ebd8b662019-04-17 06:46:29 -030024Please see Documentation/hwmon/pmbus.rst for details on PMBus client drivers.
Zhu, Richard \(NSN - CN/Beijing\)a8bfece2014-07-01 07:14:23 +000025
26
27Usage Notes
28-----------
29
30This driver does not auto-detect devices. You will have to instantiate the
Mauro Carvalho Chehabccf988b2019-07-26 09:51:16 -030031devices explicitly. Please see Documentation/i2c/instantiating-devices.rst for
Zhu, Richard \(NSN - CN/Beijing\)a8bfece2014-07-01 07:14:23 +000032details.
33
34
35Platform data support
36---------------------
37
38The driver supports standard PMBus driver platform data.
39
40
41Sysfs entries
42-------------
43
44The following attributes are supported.
45
Mauro Carvalho Chehab1f234ff2019-04-17 06:46:26 -030046======================= =======================================================
Zhu, Richard \(NSN - CN/Beijing\)a8bfece2014-07-01 07:14:23 +000047in[1-2]_label "vout[1-2]"
48in[1-2]_input Measured voltage. From READ_VOUT register.
49in[1-2]_alarm voltage alarm.
50
51curr[1-2]_input Measured current. From READ_IOUT register.
52curr[1-2]_label "iout[1-2]"
53curr1_max Maximum current. From IOUT_OC_WARN_LIMIT register.
Mauro Carvalho Chehab1f234ff2019-04-17 06:46:26 -030054curr1_crit Critical maximum current. From IOUT_OC_FAULT_LIMIT
55 register.
Zhu, Richard \(NSN - CN/Beijing\)a8bfece2014-07-01 07:14:23 +000056curr1_max_alarm Current high alarm. From IOUT_OC_WARN_LIMIT status.
57curr1_crit_alarm Current critical high alarm. From IOUT_OC_FAULT status.
58curr2_alarm Current high alarm. From IOUT_OC_WARNING status.
59
Mauro Carvalho Chehab1f234ff2019-04-17 06:46:26 -030060temp1_input Measured temperature. From READ_TEMPERATURE_2 register
61 on page 0.
Zhu, Richard \(NSN - CN/Beijing\)a8bfece2014-07-01 07:14:23 +000062temp1_max Maximum temperature. From OT_WARN_LIMIT register.
63temp1_crit Critical high temperature. From OT_FAULT_LIMIT register.
64temp1_max_alarm Chip temperature high alarm. Set by comparing
Mauro Carvalho Chehab1f234ff2019-04-17 06:46:26 -030065 READ_TEMPERATURE_2 on page 0 with OT_WARN_LIMIT if
66 TEMP_OT_WARNING status is set.
Zhu, Richard \(NSN - CN/Beijing\)a8bfece2014-07-01 07:14:23 +000067temp1_crit_alarm Chip temperature critical high alarm. Set by comparing
Mauro Carvalho Chehab1f234ff2019-04-17 06:46:26 -030068 READ_TEMPERATURE_2 on page 0 with OT_FAULT_LIMIT if
69 TEMP_OT_FAULT status is set.
70temp2_input Measured temperature. From READ_TEMPERATURE_2 register
71 on page 1.
Zhu, Richard \(NSN - CN/Beijing\)a8bfece2014-07-01 07:14:23 +000072temp2_alarm Chip temperature alarm on page 1.
Mauro Carvalho Chehab1f234ff2019-04-17 06:46:26 -030073======================= =======================================================