Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
Chris Brandt | 538bf46 | 2016-02-03 15:58:10 +0100 | [diff] [blame] | 2 | /* ld script to make ARM Linux kernel |
| 3 | * taken from the i386 version by Russell King |
| 4 | * Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz> |
| 5 | */ |
| 6 | |
Russell King | 2a38110 | 2016-11-16 23:51:19 +0000 | [diff] [blame] | 7 | /* No __ro_after_init data in the .rodata section - which will always be ro */ |
| 8 | #define RO_AFTER_INIT_DATA |
| 9 | |
Vladimir Murzin | 2162183 | 2017-10-16 13:00:45 +0100 | [diff] [blame] | 10 | #include <linux/sizes.h> |
| 11 | |
Chris Brandt | 538bf46 | 2016-02-03 15:58:10 +0100 | [diff] [blame] | 12 | #include <asm-generic/vmlinux.lds.h> |
| 13 | #include <asm/cache.h> |
| 14 | #include <asm/thread_info.h> |
| 15 | #include <asm/memory.h> |
| 16 | #include <asm/page.h> |
Chris Brandt | 538bf46 | 2016-02-03 15:58:10 +0100 | [diff] [blame] | 17 | |
Nicolas Pitre | 2f181e0 | 2018-02-27 22:39:27 -0500 | [diff] [blame] | 18 | #include "vmlinux.lds.h" |
Chris Brandt | 538bf46 | 2016-02-03 15:58:10 +0100 | [diff] [blame] | 19 | |
| 20 | OUTPUT_ARCH(arm) |
| 21 | ENTRY(stext) |
| 22 | |
| 23 | #ifndef __ARMEB__ |
| 24 | jiffies = jiffies_64; |
| 25 | #else |
| 26 | jiffies = jiffies_64 + 4; |
| 27 | #endif |
| 28 | |
| 29 | SECTIONS |
| 30 | { |
| 31 | /* |
| 32 | * XXX: The linker does not define how output sections are |
| 33 | * assigned to input sections when there are multiple statements |
| 34 | * matching the same input section name. There is no documented |
| 35 | * order of matching. |
| 36 | * |
| 37 | * unwind exit sections must be discarded before the rest of the |
| 38 | * unwind sections get included. |
| 39 | */ |
| 40 | /DISCARD/ : { |
Nicolas Pitre | ab42fad | 2018-03-05 16:34:03 -0500 | [diff] [blame] | 41 | ARM_DISCARD |
Chris Brandt | 538bf46 | 2016-02-03 15:58:10 +0100 | [diff] [blame] | 42 | *(.alt.smp.init) |
Nicolas Pitre | ab42fad | 2018-03-05 16:34:03 -0500 | [diff] [blame] | 43 | *(.pv_table) |
Chris Brandt | 538bf46 | 2016-02-03 15:58:10 +0100 | [diff] [blame] | 44 | } |
| 45 | |
| 46 | . = XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR); |
Chris Brandt | 02afa9a | 2016-02-09 19:34:43 +0100 | [diff] [blame] | 47 | _xiprom = .; /* XIP ROM area to be mapped */ |
Chris Brandt | 538bf46 | 2016-02-03 15:58:10 +0100 | [diff] [blame] | 48 | |
| 49 | .head.text : { |
| 50 | _text = .; |
| 51 | HEAD_TEXT |
| 52 | } |
| 53 | |
Chris Brandt | 538bf46 | 2016-02-03 15:58:10 +0100 | [diff] [blame] | 54 | .text : { /* Real text segment */ |
| 55 | _stext = .; /* Text and read-only data */ |
Nicolas Pitre | 47b4c77 | 2018-03-05 16:34:03 -0500 | [diff] [blame] | 56 | ARM_TEXT |
Chris Brandt | 538bf46 | 2016-02-03 15:58:10 +0100 | [diff] [blame] | 57 | } |
| 58 | |
Chris Brandt | 538bf46 | 2016-02-03 15:58:10 +0100 | [diff] [blame] | 59 | RO_DATA(PAGE_SIZE) |
| 60 | |
| 61 | . = ALIGN(4); |
| 62 | __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) { |
| 63 | __start___ex_table = .; |
Nicolas Pitre | ab42fad | 2018-03-05 16:34:03 -0500 | [diff] [blame] | 64 | ARM_MMU_KEEP(*(__ex_table)) |
Chris Brandt | 538bf46 | 2016-02-03 15:58:10 +0100 | [diff] [blame] | 65 | __stop___ex_table = .; |
| 66 | } |
| 67 | |
| 68 | #ifdef CONFIG_ARM_UNWIND |
Nicolas Pitre | d9a46e6 | 2018-03-01 17:32:28 -0500 | [diff] [blame] | 69 | ARM_UNWIND_SECTIONS |
Chris Brandt | 538bf46 | 2016-02-03 15:58:10 +0100 | [diff] [blame] | 70 | #endif |
| 71 | |
| 72 | NOTES |
| 73 | |
| 74 | _etext = .; /* End of text and rodata section */ |
| 75 | |
Nicolas Pitre | 9147095 | 2018-03-01 22:17:03 -0500 | [diff] [blame] | 76 | ARM_VECTORS |
Chris Brandt | 538bf46 | 2016-02-03 15:58:10 +0100 | [diff] [blame] | 77 | INIT_TEXT_SECTION(8) |
| 78 | .exit.text : { |
| 79 | ARM_EXIT_KEEP(EXIT_TEXT) |
| 80 | } |
| 81 | .init.proc.info : { |
| 82 | ARM_CPU_DISCARD(PROC_INFO) |
| 83 | } |
| 84 | .init.arch.info : { |
| 85 | __arch_info_begin = .; |
| 86 | *(.arch.info.init) |
| 87 | __arch_info_end = .; |
| 88 | } |
| 89 | .init.tagtable : { |
| 90 | __tagtable_begin = .; |
| 91 | *(.taglist.init) |
| 92 | __tagtable_end = .; |
| 93 | } |
Nicolas Pitre | 0d302c7 | 2017-08-29 17:58:41 -0400 | [diff] [blame] | 94 | .init.rodata : { |
Chris Brandt | 538bf46 | 2016-02-03 15:58:10 +0100 | [diff] [blame] | 95 | INIT_SETUP(16) |
| 96 | INIT_CALLS |
| 97 | CON_INITCALL |
| 98 | SECURITY_INITCALL |
| 99 | INIT_RAM_FS |
| 100 | } |
| 101 | |
Vladimir Murzin | 2162183 | 2017-10-16 13:00:45 +0100 | [diff] [blame] | 102 | #ifdef CONFIG_ARM_MPU |
| 103 | . = ALIGN(SZ_128K); |
| 104 | #endif |
Nicolas Pitre | 0d302c7 | 2017-08-29 17:58:41 -0400 | [diff] [blame] | 105 | _exiprom = .; /* End of XIP ROM area */ |
| 106 | |
| 107 | /* |
| 108 | * From this point, stuff is considered writable and will be copied to RAM |
| 109 | */ |
| 110 | __data_loc = ALIGN(4); /* location in file */ |
| 111 | . = PAGE_OFFSET + TEXT_OFFSET; /* location in memory */ |
| 112 | #undef LOAD_OFFSET |
| 113 | #define LOAD_OFFSET (PAGE_OFFSET + TEXT_OFFSET - __data_loc) |
| 114 | |
| 115 | . = ALIGN(THREAD_SIZE); |
| 116 | _sdata = .; |
| 117 | RW_DATA_SECTION(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE) |
| 118 | .data.ro_after_init : AT(ADDR(.data.ro_after_init) - LOAD_OFFSET) { |
| 119 | *(.data..ro_after_init) |
| 120 | } |
| 121 | _edata = .; |
| 122 | |
| 123 | . = ALIGN(PAGE_SIZE); |
| 124 | __init_begin = .; |
| 125 | .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) { |
| 126 | INIT_DATA |
| 127 | } |
| 128 | .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) { |
| 129 | ARM_EXIT_KEEP(EXIT_DATA) |
| 130 | } |
Chris Brandt | 538bf46 | 2016-02-03 15:58:10 +0100 | [diff] [blame] | 131 | #ifdef CONFIG_SMP |
| 132 | PERCPU_SECTION(L1_CACHE_BYTES) |
| 133 | #endif |
| 134 | |
Nicolas Pitre | b54290e | 2018-03-08 21:12:04 -0500 | [diff] [blame] | 135 | #ifdef CONFIG_HAVE_TCM |
| 136 | ARM_TCM |
| 137 | #endif |
| 138 | |
Nicolas Pitre | 0d302c7 | 2017-08-29 17:58:41 -0400 | [diff] [blame] | 139 | /* |
| 140 | * End of copied data. We need a dummy section to get its LMA. |
| 141 | * Also located before final ALIGN() as trailing padding is not stored |
| 142 | * in the resulting binary file and useless to copy. |
| 143 | */ |
| 144 | .data.endmark : AT(ADDR(.data.endmark) - LOAD_OFFSET) { } |
| 145 | _edata_loc = LOADADDR(.data.endmark); |
Chris Brandt | 538bf46 | 2016-02-03 15:58:10 +0100 | [diff] [blame] | 146 | |
Nicolas Pitre | 0d302c7 | 2017-08-29 17:58:41 -0400 | [diff] [blame] | 147 | . = ALIGN(PAGE_SIZE); |
| 148 | __init_end = .; |
Peter Zijlstra | b5effd3 | 2017-03-30 17:49:27 +0200 | [diff] [blame] | 149 | |
Nicolas Pitre | 9520b1a | 2017-08-24 15:54:47 -0400 | [diff] [blame] | 150 | BSS_SECTION(0, 0, 8) |
Chris Brandt | 538bf46 | 2016-02-03 15:58:10 +0100 | [diff] [blame] | 151 | _end = .; |
| 152 | |
| 153 | STABS_DEBUG |
| 154 | } |
| 155 | |
| 156 | /* |
| 157 | * These must never be empty |
| 158 | * If you have to comment these two assert statements out, your |
| 159 | * binutils is too old (for other reasons as well) |
| 160 | */ |
| 161 | ASSERT((__proc_info_end - __proc_info_begin), "missing CPU support") |
| 162 | ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined") |
| 163 | |
| 164 | /* |
| 165 | * The HYP init code can't be more than a page long, |
| 166 | * and should not cross a page boundary. |
| 167 | * The above comment applies as well. |
| 168 | */ |
| 169 | ASSERT(__hyp_idmap_text_end - (__hyp_idmap_text_start & PAGE_MASK) <= PAGE_SIZE, |
| 170 | "HYP init code too big or misaligned") |
Nicolas Pitre | ca8b5d9 | 2017-08-25 00:54:18 -0400 | [diff] [blame] | 171 | |
| 172 | #ifdef CONFIG_XIP_DEFLATED_DATA |
| 173 | /* |
| 174 | * The .bss is used as a stack area for __inflate_kernel_data() whose stack |
| 175 | * frame is 9568 bytes. Make sure it has extra room left. |
| 176 | */ |
| 177 | ASSERT((_end - __bss_start) >= 12288, ".bss too small for CONFIG_XIP_DEFLATED_DATA") |
| 178 | #endif |
Vladimir Murzin | 2162183 | 2017-10-16 13:00:45 +0100 | [diff] [blame] | 179 | |
| 180 | #ifdef CONFIG_ARM_MPU |
| 181 | /* |
| 182 | * Due to PMSAv7 restriction on base address and size we have to |
| 183 | * enforce minimal alignment restrictions. It was seen that weaker |
| 184 | * alignment restriction on _xiprom will likely force XIP address |
| 185 | * space spawns multiple MPU regions thus it is likely we run in |
| 186 | * situation when we are reprogramming MPU region we run on with |
| 187 | * something which doesn't cover reprogramming code itself, so as soon |
| 188 | * as we update MPU settings we'd immediately try to execute straight |
| 189 | * from background region which is XN. |
| 190 | * It seem that alignment in 1M should suit most users. |
| 191 | * _exiprom is aligned as 1/8 of 1M so can be covered by subregion |
| 192 | * disable |
| 193 | */ |
| 194 | ASSERT(!(_xiprom & (SZ_1M - 1)), "XIP start address may cause MPU programming issues") |
| 195 | ASSERT(!(_exiprom & (SZ_128K - 1)), "XIP end address may cause MPU programming issues") |
| 196 | #endif |