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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 0b892c717714334890ea179a2dc1941a223e446f / . / drivers / edac / edac_pci.h
blob: 9da0c6fb0634003f5b31d2cda3012d4ca3fd6473 [file] [log] [blame]
Mauro Carvalho Chehab0b892c72016-10-29 09:56:00 -0200[diff] [blame^]1/*
2 * Defines, structures, APIs for edac_pci and edac_pci_sysfs
3 *
4 * (C) 2007 Linux Networx (http://lnxi.com)
5 * This file may be distributed under the terms of the
6 * GNU General Public License.
7 *
8 * Written by Thayne Harbaugh
9 * Based on work by Dan Hollis <goemon at anime dot net> and others.
10 * http://www.anime.net/~goemon/linux-ecc/
11 *
12 * NMI handling support added by
13 * Dave Peterson <dsp@llnl.gov> <dave_peterson@pobox.com>
14 *
15 * Refactored for multi-source files:
16 * Doug Thompson <norsk5@xmission.com>
17 *
18 * Please look at Documentation/driver-api/edac.rst for more info about
19 * EDAC core structs and functions.
20 */
21
22#ifndef _EDAC_PCI_H_
23#define _EDAC_PCI_H_
24
25#include <linux/completion.h>
26#include <linux/device.h>
27#include <linux/edac.h>
28#include <linux/kobject.h>
29#include <linux/list.h>
30#include <linux/pci.h>
31#include <linux/types.h>
32#include <linux/workqueue.h>
33
34#ifdef CONFIG_PCI
35
36struct edac_pci_counter {
37 atomic_t pe_count;
38 atomic_t npe_count;
39};
40
41/*
42 * Abstract edac_pci control info structure
43 *
44 */
45struct edac_pci_ctl_info {
46 /* for global list of edac_pci_ctl_info structs */
47 struct list_head link;
48
49 int pci_idx;
50
51 struct bus_type *edac_subsys; /* pointer to subsystem */
52
53 /* the internal state of this controller instance */
54 int op_state;
55 /* work struct for this instance */
56 struct delayed_work work;
57
58 /* pointer to edac polling checking routine:
59 * If NOT NULL: points to polling check routine
60 * If NULL: Then assumes INTERRUPT operation, where
61 * MC driver will receive events
62 */
63 void (*edac_check) (struct edac_pci_ctl_info * edac_dev);
64
65 struct device *dev; /* pointer to device structure */
66
67 const char *mod_name; /* module name */
68 const char *ctl_name; /* edac controller name */
69 const char *dev_name; /* pci/platform/etc... name */
70
71 void *pvt_info; /* pointer to 'private driver' info */
72
73 unsigned long start_time; /* edac_pci load start time (jiffies) */
74
75 struct completion complete;
76
77 /* sysfs top name under 'edac' directory
78 * and instance name:
79 * cpu/cpu0/...
80 * cpu/cpu1/...
81 * cpu/cpu2/...
82 * ...
83 */
84 char name[EDAC_DEVICE_NAME_LEN + 1];
85
86 /* Event counters for the this whole EDAC Device */
87 struct edac_pci_counter counters;
88
89 /* edac sysfs device control for the 'name'
90 * device this structure controls
91 */
92 struct kobject kobj;
93};
94
95#define to_edac_pci_ctl_work(w) \
96 container_of(w, struct edac_pci_ctl_info,work)
97
98/* write all or some bits in a byte-register*/
99static inline void pci_write_bits8(struct pci_dev *pdev, int offset, u8 value,
100 u8 mask)
101{
102 if (mask != 0xff) {
103 u8 buf;
104
105 pci_read_config_byte(pdev, offset, &buf);
106 value &= mask;
107 buf &= ~mask;
108 value |= buf;
109 }
110
111 pci_write_config_byte(pdev, offset, value);
112}
113
114/* write all or some bits in a word-register*/
115static inline void pci_write_bits16(struct pci_dev *pdev, int offset,
116 u16 value, u16 mask)
117{
118 if (mask != 0xffff) {
119 u16 buf;
120
121 pci_read_config_word(pdev, offset, &buf);
122 value &= mask;
123 buf &= ~mask;
124 value |= buf;
125 }
126
127 pci_write_config_word(pdev, offset, value);
128}
129
130/*
131 * pci_write_bits32
132 *
133 * edac local routine to do pci_write_config_dword, but adds
134 * a mask parameter. If mask is all ones, ignore the mask.
135 * Otherwise utilize the mask to isolate specified bits
136 *
137 * write all or some bits in a dword-register
138 */
139static inline void pci_write_bits32(struct pci_dev *pdev, int offset,
140 u32 value, u32 mask)
141{
142 if (mask != 0xffffffff) {
143 u32 buf;
144
145 pci_read_config_dword(pdev, offset, &buf);
146 value &= mask;
147 buf &= ~mask;
148 value |= buf;
149 }
150
151 pci_write_config_dword(pdev, offset, value);
152}
153
154#endif /* CONFIG_PCI */
155
156extern struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
157 const char *edac_pci_name);
158
159extern void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci);
160
161extern int edac_pci_alloc_index(void);
162extern int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx);
163extern struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev);
164
165extern struct edac_pci_ctl_info *edac_pci_create_generic_ctl(
166 struct device *dev,
167 const char *mod_name);
168
169extern void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci);
170extern int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci);
171extern void edac_pci_remove_sysfs(struct edac_pci_ctl_info *pci);
172
173#endif