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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001// SPDX-License-Identifier: GPL-2.0
Andrew Mortonc777ac52006-03-25 03:07:36 -08002
Christoph Hellwigd824e662006-04-10 22:54:04 -07003#include <linux/irq.h>
Yinghai Lu57b150c2009-04-27 17:59:53 -07004#include <linux/interrupt.h>
5
6#include "internals.h"
Andrew Mortonc777ac52006-03-25 03:07:36 -08007
Thomas Gleixnercdd16362017-06-20 01:37:19 +02008/**
9 * irq_fixup_move_pending - Cleanup irq move pending from a dying CPU
Krzysztof Kozlowski5c982c52021-03-16 11:02:05 +010010 * @desc: Interrupt descriptor to clean up
Thomas Gleixnercdd16362017-06-20 01:37:19 +020011 * @force_clear: If set clear the move pending bit unconditionally.
12 * If not set, clear it only when the dying CPU is the
13 * last one in the pending mask.
14 *
15 * Returns true if the pending bit was set and the pending mask contains an
16 * online CPU other than the dying CPU.
17 */
18bool irq_fixup_move_pending(struct irq_desc *desc, bool force_clear)
19{
20 struct irq_data *data = irq_desc_get_irq_data(desc);
21
22 if (!irqd_is_setaffinity_pending(data))
23 return false;
24
25 /*
26 * The outgoing CPU might be the last online target in a pending
27 * interrupt move. If that's the case clear the pending move bit.
28 */
29 if (cpumask_any_and(desc->pending_mask, cpu_online_mask) >= nr_cpu_ids) {
30 irqd_clr_move_pending(data);
31 return false;
32 }
33 if (force_clear)
34 irqd_clr_move_pending(data);
35 return true;
36}
37
Thomas Gleixnera4395202011-02-04 18:46:16 +010038void irq_move_masked_irq(struct irq_data *idata)
Andrew Mortonc777ac52006-03-25 03:07:36 -080039{
Thomas Gleixnera4395202011-02-04 18:46:16 +010040 struct irq_desc *desc = irq_data_to_desc(idata);
Thomas Gleixnera33a5d22018-06-04 17:33:54 +020041 struct irq_data *data = &desc->irq_data;
42 struct irq_chip *chip = data->chip;
Andrew Mortonc777ac52006-03-25 03:07:36 -080043
Thomas Gleixnera33a5d22018-06-04 17:33:54 +020044 if (likely(!irqd_is_setaffinity_pending(data)))
Andrew Mortonc777ac52006-03-25 03:07:36 -080045 return;
46
Thomas Gleixnera33a5d22018-06-04 17:33:54 +020047 irqd_clr_move_pending(data);
Thomas Gleixnera614a610a2015-06-20 12:05:40 +020048
Bryan Holty501f2492006-03-25 03:07:37 -080049 /*
50 * Paranoia: cpu-local interrupts shouldn't be calling in here anyway.
51 */
Thomas Gleixnera33a5d22018-06-04 17:33:54 +020052 if (irqd_is_per_cpu(data)) {
Bryan Holty501f2492006-03-25 03:07:37 -080053 WARN_ON(1);
54 return;
55 }
56
Mike Travis7f7ace02009-01-10 21:58:08 -080057 if (unlikely(cpumask_empty(desc->pending_mask)))
Andrew Mortonc777ac52006-03-25 03:07:36 -080058 return;
59
Thomas Gleixnerc96b3b32010-09-27 12:45:41 +000060 if (!chip->irq_set_affinity)
Andrew Mortonc777ac52006-03-25 03:07:36 -080061 return;
62
Thomas Gleixner239007b2009-11-17 16:46:45 +010063 assert_raw_spin_locked(&desc->lock);
Bryan Holty501f2492006-03-25 03:07:37 -080064
Andrew Mortonc777ac52006-03-25 03:07:36 -080065 /*
66 * If there was a valid mask to work with, please
67 * do the disable, re-program, enable sequence.
68 * This is *not* particularly important for level triggered
69 * but in a edge trigger case, we might be setting rte
Lucas De Marchi25985ed2011-03-30 22:57:33 -030070 * when an active trigger is coming in. This could
Andrew Mortonc777ac52006-03-25 03:07:36 -080071 * cause some ioapics to mal-function.
72 * Being paranoid i guess!
Eric W. Biedermane7b946e2006-10-04 02:16:29 -070073 *
74 * For correct operation this depends on the caller
75 * masking the irqs.
Andrew Mortonc777ac52006-03-25 03:07:36 -080076 */
Thomas Gleixnera33a5d22018-06-04 17:33:54 +020077 if (cpumask_any_and(desc->pending_mask, cpu_online_mask) < nr_cpu_ids) {
78 int ret;
Yinghai Lu57b150c2009-04-27 17:59:53 -070079
Thomas Gleixnera33a5d22018-06-04 17:33:54 +020080 ret = irq_do_set_affinity(data, desc->pending_mask, false);
81 /*
82 * If the there is a cleanup pending in the underlying
83 * vector management, reschedule the move for the next
84 * interrupt. Leave desc->pending_mask intact.
85 */
86 if (ret == -EBUSY) {
87 irqd_set_move_pending(data);
88 return;
89 }
90 }
Mike Travis7f7ace02009-01-10 21:58:08 -080091 cpumask_clear(desc->pending_mask);
Andrew Mortonc777ac52006-03-25 03:07:36 -080092}
Eric W. Biedermane7b946e2006-10-04 02:16:29 -070093
Thomas Gleixnerd340ebd2018-06-06 14:46:59 +020094void __irq_move_irq(struct irq_data *idata)
Thomas Gleixnera4395202011-02-04 18:46:16 +010095{
Thomas Gleixnerf1a06392011-01-28 08:47:15 +010096 bool masked;
Eric W. Biedermane7b946e2006-10-04 02:16:29 -070097
Jiang Liu77ed42f2015-06-01 16:05:11 +080098 /*
99 * Get top level irq_data when CONFIG_IRQ_DOMAIN_HIERARCHY is enabled,
100 * and it should be optimized away when CONFIG_IRQ_DOMAIN_HIERARCHY is
101 * disabled. So we avoid an "#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY" here.
102 */
103 idata = irq_desc_get_irq_data(irq_data_to_desc(idata));
104
Thomas Gleixner32f41252011-03-28 14:10:52 +0200105 if (unlikely(irqd_irq_disabled(idata)))
Eric W. Biederman2a786b42007-02-23 04:46:20 -0700106 return;
Eric W. Biedermane7b946e2006-10-04 02:16:29 -0700107
Thomas Gleixnerf1a06392011-01-28 08:47:15 +0100108 /*
109 * Be careful vs. already masked interrupts. If this is a
110 * threaded interrupt with ONESHOT set, we can end up with an
111 * interrupt storm.
112 */
Thomas Gleixner32f41252011-03-28 14:10:52 +0200113 masked = irqd_irq_masked(idata);
Thomas Gleixnerf1a06392011-01-28 08:47:15 +0100114 if (!masked)
Thomas Gleixnera4395202011-02-04 18:46:16 +0100115 idata->chip->irq_mask(idata);
116 irq_move_masked_irq(idata);
Thomas Gleixnerf1a06392011-01-28 08:47:15 +0100117 if (!masked)
Thomas Gleixnera4395202011-02-04 18:46:16 +0100118 idata->chip->irq_unmask(idata);
119}