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Grant Likely8e267f32011-07-19 17:26:54 -06001/*
Hiroshi Doyu1b14f3a2013-02-13 19:15:50 +02002 * NVIDIA Tegra SoC device tree board support
Grant Likely8e267f32011-07-19 17:26:54 -06003 *
Hiroshi Doyu1b14f3a2013-02-13 19:15:50 +02004 * Copyright (C) 2011, 2013, NVIDIA Corporation
Grant Likely8e267f32011-07-19 17:26:54 -06005 * Copyright (C) 2010 Secret Lab Technologies, Ltd.
6 * Copyright (C) 2010 Google, Inc.
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
Grant Likely8e267f32011-07-19 17:26:54 -060019#include <linux/clk.h>
Thierry Redinga0524ac2014-07-11 09:44:49 +020020#include <linux/clk/tegra.h>
Grant Likely8e267f32011-07-19 17:26:54 -060021#include <linux/dma-mapping.h>
Thierry Redinga0524ac2014-07-11 09:44:49 +020022#include <linux/init.h>
23#include <linux/io.h>
24#include <linux/irqchip.h>
Grant Likely8e267f32011-07-19 17:26:54 -060025#include <linux/irqdomain.h>
Thierry Redinga0524ac2014-07-11 09:44:49 +020026#include <linux/kernel.h>
Grant Likely8e267f32011-07-19 17:26:54 -060027#include <linux/of_address.h>
28#include <linux/of_fdt.h>
Thierry Redinga0524ac2014-07-11 09:44:49 +020029#include <linux/of.h>
Grant Likely8e267f32011-07-19 17:26:54 -060030#include <linux/of_platform.h>
31#include <linux/pda_power.h>
Thierry Redinga0524ac2014-07-11 09:44:49 +020032#include <linux/platform_device.h>
33#include <linux/serial_8250.h>
Danny Huangd591fdf2013-03-14 08:48:40 +080034#include <linux/slab.h>
35#include <linux/sys_soc.h>
Stephen Warrenbab53ce2012-08-27 14:22:48 -070036#include <linux/usb/tegra_usb_phy.h>
Grant Likely8e267f32011-07-19 17:26:54 -060037
Thierry Reding304664e2014-07-11 09:52:41 +020038#include <soc/tegra/fuse.h>
Thierry Reding72323982014-07-11 13:19:06 +020039#include <soc/tegra/pmc.h>
Thierry Reding304664e2014-07-11 09:52:41 +020040
Stephen Warren51100bd2013-08-20 15:47:38 -060041#include <asm/hardware/cache-l2x0.h>
Grant Likely8e267f32011-07-19 17:26:54 -060042#include <asm/mach/arch.h>
43#include <asm/mach/time.h>
Thierry Redinga0524ac2014-07-11 09:44:49 +020044#include <asm/mach-types.h>
Grant Likely8e267f32011-07-19 17:26:54 -060045#include <asm/setup.h>
Alexandre Courbot1a5de3a2013-11-24 15:30:49 +090046#include <asm/trusted_foundations.h>
Grant Likely8e267f32011-07-19 17:26:54 -060047
Grant Likely8e267f32011-07-19 17:26:54 -060048#include "board.h"
Marc Zyngiera1725732011-09-08 13:15:22 +010049#include "common.h"
Stephen Warren51100bd2013-08-20 15:47:38 -060050#include "cpuidle.h"
Thierry Reding783944f2014-08-26 08:14:04 +020051#include "flowctrl.h"
Stephen Warren2be39c02012-10-04 14:24:09 -060052#include "iomap.h"
Stephen Warren51100bd2013-08-20 15:47:38 -060053#include "irq.h"
Stephen Warren51100bd2013-08-20 15:47:38 -060054#include "pm.h"
55#include "reset.h"
56#include "sleep.h"
57
58/*
59 * Storage for debug-macro.S's state.
60 *
61 * This must be in .data not .bss so that it gets initialized each time the
62 * kernel is loaded. The data is declared here rather than debug-macro.S so
63 * that multiple inclusions of debug-macro.S point at the same data.
64 */
Stephen Warren2f1d70a2013-11-05 14:10:53 -070065u32 tegra_uart_config[3] = {
Stephen Warren51100bd2013-08-20 15:47:38 -060066 /* Debug UART initialization required */
67 1,
68 /* Debug UART physical address */
69 0,
70 /* Debug UART virtual address */
71 0,
Stephen Warren51100bd2013-08-20 15:47:38 -060072};
73
Stephen Warren51100bd2013-08-20 15:47:38 -060074static void __init tegra_init_early(void)
75{
Alexandre Courbot1a5de3a2013-11-24 15:30:49 +090076 of_register_trusted_foundations();
Alexandre Courbotcd198d62013-11-12 13:03:16 -070077 tegra_cpu_reset_handler_init();
Thierry Reding783944f2014-08-26 08:14:04 +020078 tegra_flowctrl_init();
Stephen Warren51100bd2013-08-20 15:47:38 -060079}
80
81static void __init tegra_dt_init_irq(void)
82{
Stephen Warren51100bd2013-08-20 15:47:38 -060083 tegra_init_irq();
84 irqchip_init();
Stephen Warren51100bd2013-08-20 15:47:38 -060085}
Stephen Warrenbab53ce2012-08-27 14:22:48 -070086
Grant Likely8e267f32011-07-19 17:26:54 -060087static void __init tegra_dt_init(void)
88{
Danny Huangd591fdf2013-03-14 08:48:40 +080089 struct soc_device_attribute *soc_dev_attr;
90 struct soc_device *soc_dev;
91 struct device *parent = NULL;
92
93 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
94 if (!soc_dev_attr)
95 goto out;
96
97 soc_dev_attr->family = kasprintf(GFP_KERNEL, "Tegra");
Peter De Schrijver783c8f42014-06-12 18:36:37 +030098 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d",
99 tegra_sku_info.revision);
Thierry Reding304664e2014-07-11 09:52:41 +0200100 soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%u", tegra_get_chip_id());
Danny Huangd591fdf2013-03-14 08:48:40 +0800101
102 soc_dev = soc_device_register(soc_dev_attr);
103 if (IS_ERR(soc_dev)) {
104 kfree(soc_dev_attr->family);
105 kfree(soc_dev_attr->revision);
106 kfree(soc_dev_attr->soc_id);
107 kfree(soc_dev_attr);
108 goto out;
109 }
110
111 parent = soc_device_to_device(soc_dev);
112
Stephen Warrena58116f2011-12-16 15:12:32 -0700113 /*
114 * Finished with the static registrations now; fill in the missing
115 * devices
116 */
Danny Huangd591fdf2013-03-14 08:48:40 +0800117out:
Tuomas Tynkkynen5fed6822013-07-25 21:38:04 +0300118 of_platform_populate(NULL, of_default_bus_match_table, NULL, parent);
Grant Likely8e267f32011-07-19 17:26:54 -0600119}
120
Stephen Warrenb64a02c2012-05-02 16:05:44 -0600121static void __init paz00_init(void)
122{
Hiroshi Doyu1b14f3a2013-02-13 19:15:50 +0200123 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
124 tegra_paz00_wifikill_init();
Stephen Warrenb64a02c2012-05-02 16:05:44 -0600125}
Stephen Warrenb64a02c2012-05-02 16:05:44 -0600126
Stephen Warrenc554dee2012-05-02 13:43:26 -0600127static struct {
128 char *machine;
129 void (*init)(void);
130} board_init_funcs[] = {
Stephen Warrenb64a02c2012-05-02 16:05:44 -0600131 { "compal,paz00", paz00_init },
Stephen Warrenc554dee2012-05-02 13:43:26 -0600132};
133
134static void __init tegra_dt_init_late(void)
135{
136 int i;
137
Stephen Warren51100bd2013-08-20 15:47:38 -0600138 tegra_init_suspend();
139 tegra_cpuidle_init();
Stephen Warrenc554dee2012-05-02 13:43:26 -0600140
141 for (i = 0; i < ARRAY_SIZE(board_init_funcs); i++) {
142 if (of_machine_is_compatible(board_init_funcs[i].machine)) {
143 board_init_funcs[i].init();
144 break;
145 }
146 }
147}
148
Hiroshi Doyu1b14f3a2013-02-13 19:15:50 +0200149static const char * const tegra_dt_board_compat[] = {
Joseph Lo73944472013-10-08 12:50:03 +0800150 "nvidia,tegra124",
Hiroshi Doyu1b14f3a2013-02-13 19:15:50 +0200151 "nvidia,tegra114",
152 "nvidia,tegra30",
Stephen Warrenc5444f32012-02-27 18:26:16 -0700153 "nvidia,tegra20",
Grant Likely8e267f32011-07-19 17:26:54 -0600154 NULL
155};
156
Hiroshi Doyu1b14f3a2013-02-13 19:15:50 +0200157DT_MACHINE_START(TEGRA_DT, "NVIDIA Tegra SoC (Flattened Device Tree)")
Russell King00123d9a2014-04-28 15:36:04 +0100158 .l2c_aux_val = 0x3c400001,
159 .l2c_aux_mask = 0xc20fc3fe,
Marc Zyngiera1725732011-09-08 13:15:22 +0100160 .smp = smp_ops(tegra_smp_ops),
Russell King00123d9a2014-04-28 15:36:04 +0100161 .map_io = tegra_map_common_io,
Hiroshi Doyu74696882013-02-13 19:15:48 +0200162 .init_early = tegra_init_early,
pdeschrijver@nvidia.com0d4f7472011-11-29 18:29:19 -0700163 .init_irq = tegra_dt_init_irq,
Grant Likely8e267f32011-07-19 17:26:54 -0600164 .init_machine = tegra_dt_init,
Stephen Warrenc554dee2012-05-02 13:43:26 -0600165 .init_late = tegra_dt_init_late,
Hiroshi Doyu1b14f3a2013-02-13 19:15:50 +0200166 .dt_compat = tegra_dt_board_compat,
Grant Likely8e267f32011-07-19 17:26:54 -0600167MACHINE_END