blob: c54eabd5eb57a1db5382441b789c60645a1ea1e8 [file] [log] [blame]
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +00001Kernel driver smsc47m1
2======================
3
4Supported chips:
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -03005
Jean Delvare60917802006-10-08 22:00:44 +02006 * SMSC LPC47B27x, LPC47M112, LPC47M10x, LPC47M13x, LPC47M14x,
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -03007
Jean Delvare60917802006-10-08 22:00:44 +02008 LPC47M15x and LPC47M192
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -03009
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +000010 Addresses scanned: none, address read from Super I/O config space
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030011
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +000012 Prefix: 'smsc47m1'
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030013
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +000014 Datasheets:
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030015
16 http://www.smsc.com/media/Downloads_Public/Data_Sheets/47b272.pdf
17
18 http://www.smsc.com/media/Downloads_Public/Data_Sheets/47m10x.pdf
19
20 http://www.smsc.com/media/Downloads_Public/Data_Sheets/47m112.pdf
21
22 http://www.smsc.com/
23
Jean Delvare8eccbb62007-05-08 17:21:59 +020024 * SMSC LPC47M292
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030025
Jean Delvare8eccbb62007-05-08 17:21:59 +020026 Addresses scanned: none, address read from Super I/O config space
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030027
Jean Delvare8eccbb62007-05-08 17:21:59 +020028 Prefix: 'smsc47m2'
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030029
Jean Delvare8eccbb62007-05-08 17:21:59 +020030 Datasheet: Not public
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030031
Jean Delvareb890a072005-10-26 22:21:24 +020032 * SMSC LPC47M997
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030033
Jean Delvareb890a072005-10-26 22:21:24 +020034 Addresses scanned: none, address read from Super I/O config space
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030035
Jean Delvareb890a072005-10-26 22:21:24 +020036 Prefix: 'smsc47m1'
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030037
Jean Delvareb890a072005-10-26 22:21:24 +020038 Datasheet: none
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +000039
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030040
41
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +000042Authors:
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030043
44 - Mark D. Studebaker <mdsxyz123@yahoo.com>,
45 - With assistance from Bruce Allen <ballen@uwm.edu>, and his
46 fan.c program:
47
48 - http://www.lsc-group.phys.uwm.edu/%7Eballen/driver/
49
50 - Gabriele Gorla <gorlik@yahoo.com>,
51 - Jean Delvare <jdelvare@suse.de>
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +000052
53Description
54-----------
55
56The Standard Microsystems Corporation (SMSC) 47M1xx Super I/O chips
57contain monitoring and PWM control circuitry for two fans.
58
Jean Delvare8eccbb62007-05-08 17:21:59 +020059The LPC47M15x, LPC47M192 and LPC47M292 chips contain a full 'hardware
60monitoring block' in addition to the fan monitoring and control. The
61hardware monitoring block is not supported by this driver, use the
62smsc47m192 driver for that.
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +000063
Jean Delvareb890a072005-10-26 22:21:24 +020064No documentation is available for the 47M997, but it has the same device
65ID as the 47M15x and 47M192 chips and seems to be compatible.
66
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +000067Fan rotation speeds are reported in RPM (rotations per minute). An alarm is
68triggered if the rotation speed has dropped below a programmable limit. Fan
69readings can be divided by a programmable divider (1, 2, 4 or 8) to give
70the readings more range or accuracy. Not all RPM values can accurately be
71represented, so some rounding is done. With a divider of 2, the lowest
72representable value is around 2600 RPM.
73
74PWM values are from 0 to 255.
75
76If an alarm triggers, it will remain triggered until the hardware register
77is read at least once. This means that the cause for the alarm may
78already have disappeared! Note that in the current implementation, all
79hardware registers are read whenever any data is read (unless it is less
80than 1.5 seconds since the last update). This means that you can easily
81miss once-only alarms.
82
Mauro Carvalho Chehabb04f2f72019-04-17 06:46:28 -030083------------------------------------------------------------------
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +000084
R.Marek@sh.cvut.cz7f15b662005-05-26 12:42:19 +000085The lm_sensors project gratefully acknowledges the support of
86Intel in the development of this driver.