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review.shift-gmbh.com / SHIFTPHONES / mainline / linux / 044b724ada4448174f3f7510b791df0bdcb834ee / . / sound / soc / codecs / rt5670.c
blob: 5e54ac957e47462a4f6103d215ed15f3b2c931eb [file] [log] [blame]
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1/*
2 * rt5670.c -- RT5670 ALSA SoC audio codec driver
3 *
4 * Copyright 2014 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/moduleparam.h>
14#include <linux/init.h>
15#include <linux/delay.h>
16#include <linux/pm.h>
17#include <linux/i2c.h>
18#include <linux/platform_device.h>
Mengdong Lin06058152014-11-14 15:51:34 +0800[diff] [blame]19#include <linux/acpi.h>
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]20#include <linux/spi/spi.h>
21#include <sound/core.h>
22#include <sound/pcm.h>
23#include <sound/pcm_params.h>
24#include <sound/jack.h>
25#include <sound/soc.h>
26#include <sound/soc-dapm.h>
27#include <sound/initval.h>
28#include <sound/tlv.h>
29#include <sound/rt5670.h>
30
31#include "rl6231.h"
32#include "rt5670.h"
33#include "rt5670-dsp.h"
34
35#define RT5670_DEVICE_ID 0x6271
36
37#define RT5670_PR_RANGE_BASE (0xff + 1)
38#define RT5670_PR_SPACING 0x100
39
40#define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING))
41
42static const struct regmap_range_cfg rt5670_ranges[] = {
43 { .name = "PR", .range_min = RT5670_PR_BASE,
44 .range_max = RT5670_PR_BASE + 0xf8,
45 .selector_reg = RT5670_PRIV_INDEX,
46 .selector_mask = 0xff,
47 .selector_shift = 0x0,
48 .window_start = RT5670_PRIV_DATA,
49 .window_len = 0x1, },
50};
51
52static struct reg_default init_list[] = {
53 { RT5670_PR_BASE + 0x14, 0x9a8a },
54 { RT5670_PR_BASE + 0x38, 0x3ba1 },
55 { RT5670_PR_BASE + 0x3d, 0x3640 },
56};
57#define RT5670_INIT_REG_LEN ARRAY_SIZE(init_list)
58
59static const struct reg_default rt5670_reg[] = {
60 { 0x00, 0x0000 },
61 { 0x02, 0x8888 },
62 { 0x03, 0x8888 },
63 { 0x0a, 0x0001 },
64 { 0x0b, 0x0827 },
65 { 0x0c, 0x0000 },
66 { 0x0d, 0x0008 },
67 { 0x0e, 0x0000 },
68 { 0x0f, 0x0808 },
69 { 0x19, 0xafaf },
70 { 0x1a, 0xafaf },
71 { 0x1b, 0x0011 },
72 { 0x1c, 0x2f2f },
73 { 0x1d, 0x2f2f },
74 { 0x1e, 0x0000 },
75 { 0x1f, 0x2f2f },
76 { 0x20, 0x0000 },
77 { 0x26, 0x7860 },
78 { 0x27, 0x7860 },
79 { 0x28, 0x7871 },
80 { 0x29, 0x8080 },
81 { 0x2a, 0x5656 },
82 { 0x2b, 0x5454 },
83 { 0x2c, 0xaaa0 },
84 { 0x2d, 0x0000 },
85 { 0x2e, 0x2f2f },
86 { 0x2f, 0x1002 },
87 { 0x30, 0x0000 },
88 { 0x31, 0x5f00 },
89 { 0x32, 0x0000 },
90 { 0x33, 0x0000 },
91 { 0x34, 0x0000 },
92 { 0x35, 0x0000 },
93 { 0x36, 0x0000 },
94 { 0x37, 0x0000 },
95 { 0x38, 0x0000 },
96 { 0x3b, 0x0000 },
97 { 0x3c, 0x007f },
98 { 0x3d, 0x0000 },
99 { 0x3e, 0x007f },
100 { 0x45, 0xe00f },
101 { 0x4c, 0x5380 },
102 { 0x4f, 0x0073 },
103 { 0x52, 0x00d3 },
104 { 0x53, 0xf0f0 },
105 { 0x61, 0x0000 },
106 { 0x62, 0x0001 },
107 { 0x63, 0x00c3 },
108 { 0x64, 0x0000 },
109 { 0x65, 0x0000 },
110 { 0x66, 0x0000 },
111 { 0x6f, 0x8000 },
112 { 0x70, 0x8000 },
113 { 0x71, 0x8000 },
114 { 0x72, 0x8000 },
115 { 0x73, 0x1110 },
116 { 0x74, 0x0e00 },
117 { 0x75, 0x1505 },
118 { 0x76, 0x0015 },
119 { 0x77, 0x0c00 },
120 { 0x78, 0x4000 },
121 { 0x79, 0x0123 },
122 { 0x7f, 0x1100 },
123 { 0x80, 0x0000 },
124 { 0x81, 0x0000 },
125 { 0x82, 0x0000 },
126 { 0x83, 0x0000 },
127 { 0x84, 0x0000 },
128 { 0x85, 0x0000 },
129 { 0x86, 0x0008 },
130 { 0x87, 0x0000 },
131 { 0x88, 0x0000 },
132 { 0x89, 0x0000 },
133 { 0x8a, 0x0000 },
134 { 0x8b, 0x0000 },
135 { 0x8c, 0x0007 },
136 { 0x8d, 0x0000 },
137 { 0x8e, 0x0004 },
138 { 0x8f, 0x1100 },
139 { 0x90, 0x0646 },
140 { 0x91, 0x0c06 },
141 { 0x93, 0x0000 },
142 { 0x94, 0x0000 },
143 { 0x95, 0x0000 },
144 { 0x97, 0x0000 },
145 { 0x98, 0x0000 },
146 { 0x99, 0x0000 },
147 { 0x9a, 0x2184 },
148 { 0x9b, 0x010a },
149 { 0x9c, 0x0aea },
150 { 0x9d, 0x000c },
151 { 0x9e, 0x0400 },
152 { 0xae, 0x7000 },
153 { 0xaf, 0x0000 },
154 { 0xb0, 0x6000 },
155 { 0xb1, 0x0000 },
156 { 0xb2, 0x0000 },
157 { 0xb3, 0x001f },
158 { 0xb4, 0x2206 },
159 { 0xb5, 0x1f00 },
160 { 0xb6, 0x0000 },
161 { 0xb7, 0x0000 },
162 { 0xbb, 0x0000 },
163 { 0xbc, 0x0000 },
164 { 0xbd, 0x0000 },
165 { 0xbe, 0x0000 },
166 { 0xbf, 0x0000 },
167 { 0xc0, 0x0000 },
168 { 0xc1, 0x0000 },
169 { 0xc2, 0x0000 },
170 { 0xcd, 0x0000 },
171 { 0xce, 0x0000 },
172 { 0xcf, 0x1813 },
173 { 0xd0, 0x0690 },
174 { 0xd1, 0x1c17 },
175 { 0xd3, 0xb320 },
176 { 0xd4, 0x0000 },
177 { 0xd6, 0x0400 },
178 { 0xd9, 0x0809 },
179 { 0xda, 0x0000 },
180 { 0xdb, 0x0001 },
181 { 0xdc, 0x0049 },
182 { 0xdd, 0x0009 },
183 { 0xe6, 0x8000 },
184 { 0xe7, 0x0000 },
185 { 0xec, 0xb300 },
186 { 0xed, 0x0000 },
187 { 0xee, 0xb300 },
188 { 0xef, 0x0000 },
189 { 0xf8, 0x0000 },
190 { 0xf9, 0x0000 },
191 { 0xfa, 0x8010 },
192 { 0xfb, 0x0033 },
193 { 0xfc, 0x0080 },
194};
195
196static bool rt5670_volatile_register(struct device *dev, unsigned int reg)
197{
198 int i;
199
200 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
201 if ((reg >= rt5670_ranges[i].window_start &&
202 reg <= rt5670_ranges[i].window_start +
203 rt5670_ranges[i].window_len) ||
204 (reg >= rt5670_ranges[i].range_min &&
205 reg <= rt5670_ranges[i].range_max)) {
206 return true;
207 }
208 }
209
210 switch (reg) {
211 case RT5670_RESET:
212 case RT5670_PDM_DATA_CTRL1:
213 case RT5670_PDM1_DATA_CTRL4:
214 case RT5670_PDM2_DATA_CTRL4:
215 case RT5670_PRIV_DATA:
216 case RT5670_ASRC_5:
217 case RT5670_CJ_CTRL1:
218 case RT5670_CJ_CTRL2:
219 case RT5670_CJ_CTRL3:
220 case RT5670_A_JD_CTRL1:
221 case RT5670_A_JD_CTRL2:
222 case RT5670_VAD_CTRL5:
223 case RT5670_ADC_EQ_CTRL1:
224 case RT5670_EQ_CTRL1:
225 case RT5670_ALC_CTRL_1:
226 case RT5670_IRQ_CTRL1:
227 case RT5670_IRQ_CTRL2:
228 case RT5670_INT_IRQ_ST:
229 case RT5670_IL_CMD:
230 case RT5670_DSP_CTRL1:
231 case RT5670_DSP_CTRL2:
232 case RT5670_DSP_CTRL3:
233 case RT5670_DSP_CTRL4:
234 case RT5670_DSP_CTRL5:
235 case RT5670_VENDOR_ID:
236 case RT5670_VENDOR_ID1:
237 case RT5670_VENDOR_ID2:
238 return true;
239 default:
240 return false;
241 }
242}
243
244static bool rt5670_readable_register(struct device *dev, unsigned int reg)
245{
246 int i;
247
248 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
249 if ((reg >= rt5670_ranges[i].window_start &&
250 reg <= rt5670_ranges[i].window_start +
251 rt5670_ranges[i].window_len) ||
252 (reg >= rt5670_ranges[i].range_min &&
253 reg <= rt5670_ranges[i].range_max)) {
254 return true;
255 }
256 }
257
258 switch (reg) {
259 case RT5670_RESET:
260 case RT5670_HP_VOL:
261 case RT5670_LOUT1:
262 case RT5670_CJ_CTRL1:
263 case RT5670_CJ_CTRL2:
264 case RT5670_CJ_CTRL3:
265 case RT5670_IN2:
266 case RT5670_INL1_INR1_VOL:
267 case RT5670_DAC1_DIG_VOL:
268 case RT5670_DAC2_DIG_VOL:
269 case RT5670_DAC_CTRL:
270 case RT5670_STO1_ADC_DIG_VOL:
271 case RT5670_MONO_ADC_DIG_VOL:
272 case RT5670_STO2_ADC_DIG_VOL:
273 case RT5670_ADC_BST_VOL1:
274 case RT5670_ADC_BST_VOL2:
275 case RT5670_STO2_ADC_MIXER:
276 case RT5670_STO1_ADC_MIXER:
277 case RT5670_MONO_ADC_MIXER:
278 case RT5670_AD_DA_MIXER:
279 case RT5670_STO_DAC_MIXER:
280 case RT5670_DD_MIXER:
281 case RT5670_DIG_MIXER:
282 case RT5670_DSP_PATH1:
283 case RT5670_DSP_PATH2:
284 case RT5670_DIG_INF1_DATA:
285 case RT5670_DIG_INF2_DATA:
286 case RT5670_PDM_OUT_CTRL:
287 case RT5670_PDM_DATA_CTRL1:
288 case RT5670_PDM1_DATA_CTRL2:
289 case RT5670_PDM1_DATA_CTRL3:
290 case RT5670_PDM1_DATA_CTRL4:
291 case RT5670_PDM2_DATA_CTRL2:
292 case RT5670_PDM2_DATA_CTRL3:
293 case RT5670_PDM2_DATA_CTRL4:
294 case RT5670_REC_L1_MIXER:
295 case RT5670_REC_L2_MIXER:
296 case RT5670_REC_R1_MIXER:
297 case RT5670_REC_R2_MIXER:
298 case RT5670_HPO_MIXER:
299 case RT5670_MONO_MIXER:
300 case RT5670_OUT_L1_MIXER:
301 case RT5670_OUT_R1_MIXER:
302 case RT5670_LOUT_MIXER:
303 case RT5670_PWR_DIG1:
304 case RT5670_PWR_DIG2:
305 case RT5670_PWR_ANLG1:
306 case RT5670_PWR_ANLG2:
307 case RT5670_PWR_MIXER:
308 case RT5670_PWR_VOL:
309 case RT5670_PRIV_INDEX:
310 case RT5670_PRIV_DATA:
311 case RT5670_I2S4_SDP:
312 case RT5670_I2S1_SDP:
313 case RT5670_I2S2_SDP:
314 case RT5670_I2S3_SDP:
315 case RT5670_ADDA_CLK1:
316 case RT5670_ADDA_CLK2:
317 case RT5670_DMIC_CTRL1:
318 case RT5670_DMIC_CTRL2:
319 case RT5670_TDM_CTRL_1:
320 case RT5670_TDM_CTRL_2:
321 case RT5670_TDM_CTRL_3:
322 case RT5670_DSP_CLK:
323 case RT5670_GLB_CLK:
324 case RT5670_PLL_CTRL1:
325 case RT5670_PLL_CTRL2:
326 case RT5670_ASRC_1:
327 case RT5670_ASRC_2:
328 case RT5670_ASRC_3:
329 case RT5670_ASRC_4:
330 case RT5670_ASRC_5:
331 case RT5670_ASRC_7:
332 case RT5670_ASRC_8:
333 case RT5670_ASRC_9:
334 case RT5670_ASRC_10:
335 case RT5670_ASRC_11:
336 case RT5670_ASRC_12:
337 case RT5670_ASRC_13:
338 case RT5670_ASRC_14:
339 case RT5670_DEPOP_M1:
340 case RT5670_DEPOP_M2:
341 case RT5670_DEPOP_M3:
342 case RT5670_CHARGE_PUMP:
343 case RT5670_MICBIAS:
344 case RT5670_A_JD_CTRL1:
345 case RT5670_A_JD_CTRL2:
346 case RT5670_VAD_CTRL1:
347 case RT5670_VAD_CTRL2:
348 case RT5670_VAD_CTRL3:
349 case RT5670_VAD_CTRL4:
350 case RT5670_VAD_CTRL5:
351 case RT5670_ADC_EQ_CTRL1:
352 case RT5670_ADC_EQ_CTRL2:
353 case RT5670_EQ_CTRL1:
354 case RT5670_EQ_CTRL2:
355 case RT5670_ALC_DRC_CTRL1:
356 case RT5670_ALC_DRC_CTRL2:
357 case RT5670_ALC_CTRL_1:
358 case RT5670_ALC_CTRL_2:
359 case RT5670_ALC_CTRL_3:
360 case RT5670_JD_CTRL:
361 case RT5670_IRQ_CTRL1:
362 case RT5670_IRQ_CTRL2:
363 case RT5670_INT_IRQ_ST:
364 case RT5670_GPIO_CTRL1:
365 case RT5670_GPIO_CTRL2:
366 case RT5670_GPIO_CTRL3:
367 case RT5670_SCRABBLE_FUN:
368 case RT5670_SCRABBLE_CTRL:
369 case RT5670_BASE_BACK:
370 case RT5670_MP3_PLUS1:
371 case RT5670_MP3_PLUS2:
372 case RT5670_ADJ_HPF1:
373 case RT5670_ADJ_HPF2:
374 case RT5670_HP_CALIB_AMP_DET:
375 case RT5670_SV_ZCD1:
376 case RT5670_SV_ZCD2:
377 case RT5670_IL_CMD:
378 case RT5670_IL_CMD2:
379 case RT5670_IL_CMD3:
380 case RT5670_DRC_HL_CTRL1:
381 case RT5670_DRC_HL_CTRL2:
382 case RT5670_ADC_MONO_HP_CTRL1:
383 case RT5670_ADC_MONO_HP_CTRL2:
384 case RT5670_ADC_STO2_HP_CTRL1:
385 case RT5670_ADC_STO2_HP_CTRL2:
386 case RT5670_JD_CTRL3:
387 case RT5670_JD_CTRL4:
388 case RT5670_DIG_MISC:
389 case RT5670_DSP_CTRL1:
390 case RT5670_DSP_CTRL2:
391 case RT5670_DSP_CTRL3:
392 case RT5670_DSP_CTRL4:
393 case RT5670_DSP_CTRL5:
394 case RT5670_GEN_CTRL2:
395 case RT5670_GEN_CTRL3:
396 case RT5670_VENDOR_ID:
397 case RT5670_VENDOR_ID1:
398 case RT5670_VENDOR_ID2:
399 return true;
400 default:
401 return false;
402 }
403}
404
405static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
406static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
407static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
408static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
409static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
410
411/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
412static unsigned int bst_tlv[] = {
413 TLV_DB_RANGE_HEAD(7),
414 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
415 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
416 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
417 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
418 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
419 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
420 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
421};
422
423/* Interface data select */
424static const char * const rt5670_data_select[] = {
425 "Normal", "Swap", "left copy to right", "right copy to left"
426};
427
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]428static SOC_ENUM_SINGLE_DECL(rt5670_if2_dac_enum, RT5670_DIG_INF1_DATA,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]429 RT5670_IF2_DAC_SEL_SFT, rt5670_data_select);
430
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]431static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]432 RT5670_IF2_ADC_SEL_SFT, rt5670_data_select);
433
434static const struct snd_kcontrol_new rt5670_snd_controls[] = {
435 /* Headphone Output Volume */
436 SOC_DOUBLE("HP Playback Switch", RT5670_HP_VOL,
437 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
438 SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL,
439 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
440 39, 0, out_vol_tlv),
441 /* OUTPUT Control */
442 SOC_DOUBLE("OUT Channel Switch", RT5670_LOUT1,
443 RT5670_VOL_L_SFT, RT5670_VOL_R_SFT, 1, 1),
444 SOC_DOUBLE_TLV("OUT Playback Volume", RT5670_LOUT1,
445 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 39, 1, out_vol_tlv),
446 /* DAC Digital Volume */
447 SOC_DOUBLE("DAC2 Playback Switch", RT5670_DAC_CTRL,
448 RT5670_M_DAC_L2_VOL_SFT, RT5670_M_DAC_R2_VOL_SFT, 1, 1),
449 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5670_DAC1_DIG_VOL,
450 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
451 175, 0, dac_vol_tlv),
452 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5670_DAC2_DIG_VOL,
453 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
454 175, 0, dac_vol_tlv),
455 /* IN1/IN2 Control */
456 SOC_SINGLE_TLV("IN1 Boost Volume", RT5670_CJ_CTRL1,
457 RT5670_BST_SFT1, 8, 0, bst_tlv),
458 SOC_SINGLE_TLV("IN2 Boost Volume", RT5670_IN2,
459 RT5670_BST_SFT1, 8, 0, bst_tlv),
460 /* INL/INR Volume Control */
461 SOC_DOUBLE_TLV("IN Capture Volume", RT5670_INL1_INR1_VOL,
462 RT5670_INL_VOL_SFT, RT5670_INR_VOL_SFT,
463 31, 1, in_vol_tlv),
464 /* ADC Digital Volume Control */
465 SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL,
466 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
467 SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL,
468 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
469 127, 0, adc_vol_tlv),
470
471 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL,
472 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
473 127, 0, adc_vol_tlv),
474
475 /* ADC Boost Volume Control */
476 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
477 RT5670_STO1_ADC_L_BST_SFT, RT5670_STO1_ADC_R_BST_SFT,
478 3, 0, adc_bst_tlv),
479
480 SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
481 RT5670_STO2_ADC_L_BST_SFT, RT5670_STO2_ADC_R_BST_SFT,
482 3, 0, adc_bst_tlv),
483
484 SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum),
485 SOC_ENUM("DAC IF2 Data Switch", rt5670_if2_dac_enum),
486};
487
488/**
489 * set_dmic_clk - Set parameter of dmic.
490 *
491 * @w: DAPM widget.
492 * @kcontrol: The kcontrol of this widget.
493 * @event: Event id.
494 *
495 * Choose dmic clock between 1MHz and 3MHz.
496 * It is better for clock to approximate 3MHz.
497 */
498static int set_dmic_clk(struct snd_soc_dapm_widget *w,
499 struct snd_kcontrol *kcontrol, int event)
500{
501 struct snd_soc_codec *codec = w->codec;
502 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
503 int idx = -EINVAL;
504
505 idx = rl6231_calc_dmic_clk(rt5670->sysclk);
506
507 if (idx < 0)
508 dev_err(codec->dev, "Failed to set DMIC clock\n");
509 else
510 snd_soc_update_bits(codec, RT5670_DMIC_CTRL1,
511 RT5670_DMIC_CLK_MASK, idx << RT5670_DMIC_CLK_SFT);
512 return idx;
513}
514
515static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
516 struct snd_soc_dapm_widget *sink)
517{
518 unsigned int val;
519
520 val = snd_soc_read(source->codec, RT5670_GLB_CLK);
521 val &= RT5670_SCLK_SRC_MASK;
522 if (val == RT5670_SCLK_SRC_PLL1)
523 return 1;
524 else
525 return 0;
526}
527
528static int is_using_asrc(struct snd_soc_dapm_widget *source,
529 struct snd_soc_dapm_widget *sink)
530{
531 unsigned int reg, shift, val;
532
533 switch (source->shift) {
534 case 0:
535 reg = RT5670_ASRC_3;
536 shift = 0;
537 break;
538 case 1:
539 reg = RT5670_ASRC_3;
540 shift = 4;
541 break;
542 case 2:
543 reg = RT5670_ASRC_5;
544 shift = 12;
545 break;
546 case 3:
547 reg = RT5670_ASRC_2;
548 shift = 0;
549 break;
550 case 8:
551 reg = RT5670_ASRC_2;
552 shift = 4;
553 break;
554 case 9:
555 reg = RT5670_ASRC_2;
556 shift = 8;
557 break;
558 case 10:
559 reg = RT5670_ASRC_2;
560 shift = 12;
561 break;
562 default:
563 return 0;
564 }
565
566 val = (snd_soc_read(source->codec, reg) >> shift) & 0xf;
567 switch (val) {
568 case 1:
569 case 2:
570 case 3:
571 case 4:
572 return 1;
573 default:
574 return 0;
575 }
576
577}
578
579/* Digital Mixer */
580static const struct snd_kcontrol_new rt5670_sto1_adc_l_mix[] = {
581 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
582 RT5670_M_ADC_L1_SFT, 1, 1),
583 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
584 RT5670_M_ADC_L2_SFT, 1, 1),
585};
586
587static const struct snd_kcontrol_new rt5670_sto1_adc_r_mix[] = {
588 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
589 RT5670_M_ADC_R1_SFT, 1, 1),
590 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
591 RT5670_M_ADC_R2_SFT, 1, 1),
592};
593
594static const struct snd_kcontrol_new rt5670_sto2_adc_l_mix[] = {
595 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
596 RT5670_M_ADC_L1_SFT, 1, 1),
597 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
598 RT5670_M_ADC_L2_SFT, 1, 1),
599};
600
601static const struct snd_kcontrol_new rt5670_sto2_adc_r_mix[] = {
602 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
603 RT5670_M_ADC_R1_SFT, 1, 1),
604 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
605 RT5670_M_ADC_R2_SFT, 1, 1),
606};
607
608static const struct snd_kcontrol_new rt5670_mono_adc_l_mix[] = {
609 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
610 RT5670_M_MONO_ADC_L1_SFT, 1, 1),
611 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
612 RT5670_M_MONO_ADC_L2_SFT, 1, 1),
613};
614
615static const struct snd_kcontrol_new rt5670_mono_adc_r_mix[] = {
616 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
617 RT5670_M_MONO_ADC_R1_SFT, 1, 1),
618 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
619 RT5670_M_MONO_ADC_R2_SFT, 1, 1),
620};
621
622static const struct snd_kcontrol_new rt5670_dac_l_mix[] = {
623 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
624 RT5670_M_ADCMIX_L_SFT, 1, 1),
625 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
626 RT5670_M_DAC1_L_SFT, 1, 1),
627};
628
629static const struct snd_kcontrol_new rt5670_dac_r_mix[] = {
630 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
631 RT5670_M_ADCMIX_R_SFT, 1, 1),
632 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
633 RT5670_M_DAC1_R_SFT, 1, 1),
634};
635
636static const struct snd_kcontrol_new rt5670_sto_dac_l_mix[] = {
637 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
638 RT5670_M_DAC_L1_SFT, 1, 1),
639 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_STO_DAC_MIXER,
640 RT5670_M_DAC_L2_SFT, 1, 1),
641 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
642 RT5670_M_DAC_R1_STO_L_SFT, 1, 1),
643};
644
645static const struct snd_kcontrol_new rt5670_sto_dac_r_mix[] = {
646 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
647 RT5670_M_DAC_R1_SFT, 1, 1),
648 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_STO_DAC_MIXER,
649 RT5670_M_DAC_R2_SFT, 1, 1),
650 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
651 RT5670_M_DAC_L1_STO_R_SFT, 1, 1),
652};
653
654static const struct snd_kcontrol_new rt5670_mono_dac_l_mix[] = {
655 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_DD_MIXER,
656 RT5670_M_DAC_L1_MONO_L_SFT, 1, 1),
657 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
658 RT5670_M_DAC_L2_MONO_L_SFT, 1, 1),
659 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
660 RT5670_M_DAC_R2_MONO_L_SFT, 1, 1),
661};
662
663static const struct snd_kcontrol_new rt5670_mono_dac_r_mix[] = {
664 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_DD_MIXER,
665 RT5670_M_DAC_R1_MONO_R_SFT, 1, 1),
666 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
667 RT5670_M_DAC_R2_MONO_R_SFT, 1, 1),
668 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
669 RT5670_M_DAC_L2_MONO_R_SFT, 1, 1),
670};
671
672static const struct snd_kcontrol_new rt5670_dig_l_mix[] = {
673 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5670_DIG_MIXER,
674 RT5670_M_STO_L_DAC_L_SFT, 1, 1),
675 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
676 RT5670_M_DAC_L2_DAC_L_SFT, 1, 1),
677 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
678 RT5670_M_DAC_R2_DAC_L_SFT, 1, 1),
679};
680
681static const struct snd_kcontrol_new rt5670_dig_r_mix[] = {
682 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5670_DIG_MIXER,
683 RT5670_M_STO_R_DAC_R_SFT, 1, 1),
684 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
685 RT5670_M_DAC_R2_DAC_R_SFT, 1, 1),
686 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
687 RT5670_M_DAC_L2_DAC_R_SFT, 1, 1),
688};
689
690/* Analog Input Mixer */
691static const struct snd_kcontrol_new rt5670_rec_l_mix[] = {
692 SOC_DAPM_SINGLE("INL Switch", RT5670_REC_L2_MIXER,
693 RT5670_M_IN_L_RM_L_SFT, 1, 1),
694 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_L2_MIXER,
695 RT5670_M_BST2_RM_L_SFT, 1, 1),
696 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_L2_MIXER,
697 RT5670_M_BST1_RM_L_SFT, 1, 1),
698};
699
700static const struct snd_kcontrol_new rt5670_rec_r_mix[] = {
701 SOC_DAPM_SINGLE("INR Switch", RT5670_REC_R2_MIXER,
702 RT5670_M_IN_R_RM_R_SFT, 1, 1),
703 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_R2_MIXER,
704 RT5670_M_BST2_RM_R_SFT, 1, 1),
705 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_R2_MIXER,
706 RT5670_M_BST1_RM_R_SFT, 1, 1),
707};
708
709static const struct snd_kcontrol_new rt5670_out_l_mix[] = {
710 SOC_DAPM_SINGLE("BST1 Switch", RT5670_OUT_L1_MIXER,
711 RT5670_M_BST1_OM_L_SFT, 1, 1),
712 SOC_DAPM_SINGLE("INL Switch", RT5670_OUT_L1_MIXER,
713 RT5670_M_IN_L_OM_L_SFT, 1, 1),
714 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_OUT_L1_MIXER,
715 RT5670_M_DAC_L2_OM_L_SFT, 1, 1),
716 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_OUT_L1_MIXER,
717 RT5670_M_DAC_L1_OM_L_SFT, 1, 1),
718};
719
720static const struct snd_kcontrol_new rt5670_out_r_mix[] = {
721 SOC_DAPM_SINGLE("BST2 Switch", RT5670_OUT_R1_MIXER,
722 RT5670_M_BST2_OM_R_SFT, 1, 1),
723 SOC_DAPM_SINGLE("INR Switch", RT5670_OUT_R1_MIXER,
724 RT5670_M_IN_R_OM_R_SFT, 1, 1),
725 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_OUT_R1_MIXER,
726 RT5670_M_DAC_R2_OM_R_SFT, 1, 1),
727 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_OUT_R1_MIXER,
728 RT5670_M_DAC_R1_OM_R_SFT, 1, 1),
729};
730
731static const struct snd_kcontrol_new rt5670_hpo_mix[] = {
732 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
733 RT5670_M_DAC1_HM_SFT, 1, 1),
734 SOC_DAPM_SINGLE("HPVOL Switch", RT5670_HPO_MIXER,
735 RT5670_M_HPVOL_HM_SFT, 1, 1),
736};
737
738static const struct snd_kcontrol_new rt5670_hpvoll_mix[] = {
739 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
740 RT5670_M_DACL1_HML_SFT, 1, 1),
741 SOC_DAPM_SINGLE("INL Switch", RT5670_HPO_MIXER,
742 RT5670_M_INL1_HML_SFT, 1, 1),
743};
744
745static const struct snd_kcontrol_new rt5670_hpvolr_mix[] = {
746 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
747 RT5670_M_DACR1_HMR_SFT, 1, 1),
748 SOC_DAPM_SINGLE("INR Switch", RT5670_HPO_MIXER,
749 RT5670_M_INR1_HMR_SFT, 1, 1),
750};
751
752static const struct snd_kcontrol_new rt5670_lout_mix[] = {
753 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_LOUT_MIXER,
754 RT5670_M_DAC_L1_LM_SFT, 1, 1),
755 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_LOUT_MIXER,
756 RT5670_M_DAC_R1_LM_SFT, 1, 1),
757 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5670_LOUT_MIXER,
758 RT5670_M_OV_L_LM_SFT, 1, 1),
759 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5670_LOUT_MIXER,
760 RT5670_M_OV_R_LM_SFT, 1, 1),
761};
762
763static const struct snd_kcontrol_new rt5670_hpl_mix[] = {
764 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_HPO_MIXER,
765 RT5670_M_DACL1_HML_SFT, 1, 1),
766 SOC_DAPM_SINGLE("INL1 Switch", RT5670_HPO_MIXER,
767 RT5670_M_INL1_HML_SFT, 1, 1),
768};
769
770static const struct snd_kcontrol_new rt5670_hpr_mix[] = {
771 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_HPO_MIXER,
772 RT5670_M_DACR1_HMR_SFT, 1, 1),
773 SOC_DAPM_SINGLE("INR1 Switch", RT5670_HPO_MIXER,
774 RT5670_M_INR1_HMR_SFT, 1, 1),
775};
776
777static const struct snd_kcontrol_new lout_l_enable_control =
778 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
779 RT5670_L_MUTE_SFT, 1, 1);
780
781static const struct snd_kcontrol_new lout_r_enable_control =
782 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
783 RT5670_R_MUTE_SFT, 1, 1);
784
785/* DAC1 L/R source */ /* MX-29 [9:8] [11:10] */
786static const char * const rt5670_dac1_src[] = {
787 "IF1 DAC", "IF2 DAC"
788};
789
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]790static SOC_ENUM_SINGLE_DECL(rt5670_dac1l_enum, RT5670_AD_DA_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]791 RT5670_DAC1_L_SEL_SFT, rt5670_dac1_src);
792
793static const struct snd_kcontrol_new rt5670_dac1l_mux =
794 SOC_DAPM_ENUM("DAC1 L source", rt5670_dac1l_enum);
795
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]796static SOC_ENUM_SINGLE_DECL(rt5670_dac1r_enum, RT5670_AD_DA_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]797 RT5670_DAC1_R_SEL_SFT, rt5670_dac1_src);
798
799static const struct snd_kcontrol_new rt5670_dac1r_mux =
800 SOC_DAPM_ENUM("DAC1 R source", rt5670_dac1r_enum);
801
802/*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
803/* TODO Use SOC_VALUE_ENUM_SINGLE_DECL */
804static const char * const rt5670_dac12_src[] = {
805 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC",
806 "Bass", "VAD_ADC", "IF4 DAC"
807};
808
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]809static SOC_ENUM_SINGLE_DECL(rt5670_dac2l_enum, RT5670_DAC_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]810 RT5670_DAC2_L_SEL_SFT, rt5670_dac12_src);
811
812static const struct snd_kcontrol_new rt5670_dac_l2_mux =
813 SOC_DAPM_ENUM("DAC2 L source", rt5670_dac2l_enum);
814
815static const char * const rt5670_dacr2_src[] = {
816 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", "TxDP ADC", "IF4 DAC"
817};
818
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]819static SOC_ENUM_SINGLE_DECL(rt5670_dac2r_enum, RT5670_DAC_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]820 RT5670_DAC2_R_SEL_SFT, rt5670_dacr2_src);
821
822static const struct snd_kcontrol_new rt5670_dac_r2_mux =
823 SOC_DAPM_ENUM("DAC2 R source", rt5670_dac2r_enum);
824
825/*RxDP source*/ /* MX-2D [15:13] */
826static const char * const rt5670_rxdp_src[] = {
827 "IF2 DAC", "IF1 DAC", "STO1 ADC Mixer", "STO2 ADC Mixer",
828 "Mono ADC Mixer L", "Mono ADC Mixer R", "DAC1"
829};
830
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]831static SOC_ENUM_SINGLE_DECL(rt5670_rxdp_enum, RT5670_DSP_PATH1,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]832 RT5670_RXDP_SEL_SFT, rt5670_rxdp_src);
833
834static const struct snd_kcontrol_new rt5670_rxdp_mux =
835 SOC_DAPM_ENUM("DAC2 L source", rt5670_rxdp_enum);
836
837/* MX-2D [1] [0] */
838static const char * const rt5670_dsp_bypass_src[] = {
839 "DSP", "Bypass"
840};
841
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]842static SOC_ENUM_SINGLE_DECL(rt5670_dsp_ul_enum, RT5670_DSP_PATH1,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]843 RT5670_DSP_UL_SFT, rt5670_dsp_bypass_src);
844
845static const struct snd_kcontrol_new rt5670_dsp_ul_mux =
846 SOC_DAPM_ENUM("DSP UL source", rt5670_dsp_ul_enum);
847
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]848static SOC_ENUM_SINGLE_DECL(rt5670_dsp_dl_enum, RT5670_DSP_PATH1,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]849 RT5670_DSP_DL_SFT, rt5670_dsp_bypass_src);
850
851static const struct snd_kcontrol_new rt5670_dsp_dl_mux =
852 SOC_DAPM_ENUM("DSP DL source", rt5670_dsp_dl_enum);
853
854/* Stereo2 ADC source */
855/* MX-26 [15] */
856static const char * const rt5670_stereo2_adc_lr_src[] = {
857 "L", "LR"
858};
859
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]860static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_lr_enum, RT5670_STO2_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]861 RT5670_STO2_ADC_SRC_SFT, rt5670_stereo2_adc_lr_src);
862
863static const struct snd_kcontrol_new rt5670_sto2_adc_lr_mux =
864 SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5670_stereo2_adc_lr_enum);
865
866/* Stereo1 ADC source */
867/* MX-27 MX-26 [12] */
868static const char * const rt5670_stereo_adc1_src[] = {
869 "DAC MIX", "ADC"
870};
871
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]872static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc1_enum, RT5670_STO1_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]873 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
874
875static const struct snd_kcontrol_new rt5670_sto_adc_l1_mux =
876 SOC_DAPM_ENUM("Stereo1 ADC L1 source", rt5670_stereo1_adc1_enum);
877
878static const struct snd_kcontrol_new rt5670_sto_adc_r1_mux =
879 SOC_DAPM_ENUM("Stereo1 ADC R1 source", rt5670_stereo1_adc1_enum);
880
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]881static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc1_enum, RT5670_STO2_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]882 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
883
884static const struct snd_kcontrol_new rt5670_sto2_adc_l1_mux =
885 SOC_DAPM_ENUM("Stereo2 ADC L1 source", rt5670_stereo2_adc1_enum);
886
887static const struct snd_kcontrol_new rt5670_sto2_adc_r1_mux =
888 SOC_DAPM_ENUM("Stereo2 ADC R1 source", rt5670_stereo2_adc1_enum);
889
890/* MX-27 MX-26 [11] */
891static const char * const rt5670_stereo_adc2_src[] = {
892 "DAC MIX", "DMIC"
893};
894
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]895static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc2_enum, RT5670_STO1_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]896 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
897
898static const struct snd_kcontrol_new rt5670_sto_adc_l2_mux =
899 SOC_DAPM_ENUM("Stereo1 ADC L2 source", rt5670_stereo1_adc2_enum);
900
901static const struct snd_kcontrol_new rt5670_sto_adc_r2_mux =
902 SOC_DAPM_ENUM("Stereo1 ADC R2 source", rt5670_stereo1_adc2_enum);
903
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]904static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc2_enum, RT5670_STO2_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]905 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
906
907static const struct snd_kcontrol_new rt5670_sto2_adc_l2_mux =
908 SOC_DAPM_ENUM("Stereo2 ADC L2 source", rt5670_stereo2_adc2_enum);
909
910static const struct snd_kcontrol_new rt5670_sto2_adc_r2_mux =
911 SOC_DAPM_ENUM("Stereo2 ADC R2 source", rt5670_stereo2_adc2_enum);
912
913/* MX-27 MX26 [10] */
914static const char * const rt5670_stereo_adc_src[] = {
915 "ADC1L ADC2R", "ADC3"
916};
917
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]918static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc_enum, RT5670_STO1_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]919 RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src);
920
921static const struct snd_kcontrol_new rt5670_sto_adc_mux =
922 SOC_DAPM_ENUM("Stereo1 ADC source", rt5670_stereo1_adc_enum);
923
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]924static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_enum, RT5670_STO2_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]925 RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src);
926
927static const struct snd_kcontrol_new rt5670_sto2_adc_mux =
928 SOC_DAPM_ENUM("Stereo2 ADC source", rt5670_stereo2_adc_enum);
929
930/* MX-27 MX-26 [9:8] */
931static const char * const rt5670_stereo_dmic_src[] = {
932 "DMIC1", "DMIC2", "DMIC3"
933};
934
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]935static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_dmic_enum, RT5670_STO1_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]936 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
937
938static const struct snd_kcontrol_new rt5670_sto1_dmic_mux =
939 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5670_stereo1_dmic_enum);
940
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]941static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_dmic_enum, RT5670_STO2_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]942 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
943
944static const struct snd_kcontrol_new rt5670_sto2_dmic_mux =
945 SOC_DAPM_ENUM("Stereo2 DMIC source", rt5670_stereo2_dmic_enum);
946
947/* MX-27 [0] */
948static const char * const rt5670_stereo_dmic3_src[] = {
949 "DMIC3", "PDM ADC"
950};
951
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]952static SOC_ENUM_SINGLE_DECL(rt5670_stereo_dmic3_enum, RT5670_STO1_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]953 RT5670_DMIC3_SRC_SFT, rt5670_stereo_dmic3_src);
954
955static const struct snd_kcontrol_new rt5670_sto_dmic3_mux =
956 SOC_DAPM_ENUM("Stereo DMIC3 source", rt5670_stereo_dmic3_enum);
957
958/* Mono ADC source */
959/* MX-28 [12] */
960static const char * const rt5670_mono_adc_l1_src[] = {
961 "Mono DAC MIXL", "ADC1"
962};
963
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]964static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l1_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]965 RT5670_MONO_ADC_L1_SRC_SFT, rt5670_mono_adc_l1_src);
966
967static const struct snd_kcontrol_new rt5670_mono_adc_l1_mux =
968 SOC_DAPM_ENUM("Mono ADC1 left source", rt5670_mono_adc_l1_enum);
969/* MX-28 [11] */
970static const char * const rt5670_mono_adc_l2_src[] = {
971 "Mono DAC MIXL", "DMIC"
972};
973
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]974static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l2_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]975 RT5670_MONO_ADC_L2_SRC_SFT, rt5670_mono_adc_l2_src);
976
977static const struct snd_kcontrol_new rt5670_mono_adc_l2_mux =
978 SOC_DAPM_ENUM("Mono ADC2 left source", rt5670_mono_adc_l2_enum);
979
980/* MX-28 [9:8] */
981static const char * const rt5670_mono_dmic_src[] = {
982 "DMIC1", "DMIC2", "DMIC3"
983};
984
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]985static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_l_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]986 RT5670_MONO_DMIC_L_SRC_SFT, rt5670_mono_dmic_src);
987
988static const struct snd_kcontrol_new rt5670_mono_dmic_l_mux =
989 SOC_DAPM_ENUM("Mono DMIC left source", rt5670_mono_dmic_l_enum);
990/* MX-28 [1:0] */
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]991static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_r_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]992 RT5670_MONO_DMIC_R_SRC_SFT, rt5670_mono_dmic_src);
993
994static const struct snd_kcontrol_new rt5670_mono_dmic_r_mux =
995 SOC_DAPM_ENUM("Mono DMIC Right source", rt5670_mono_dmic_r_enum);
996/* MX-28 [4] */
997static const char * const rt5670_mono_adc_r1_src[] = {
998 "Mono DAC MIXR", "ADC2"
999};
1000
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1001static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r1_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1002 RT5670_MONO_ADC_R1_SRC_SFT, rt5670_mono_adc_r1_src);
1003
1004static const struct snd_kcontrol_new rt5670_mono_adc_r1_mux =
1005 SOC_DAPM_ENUM("Mono ADC1 right source", rt5670_mono_adc_r1_enum);
1006/* MX-28 [3] */
1007static const char * const rt5670_mono_adc_r2_src[] = {
1008 "Mono DAC MIXR", "DMIC"
1009};
1010
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1011static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r2_enum, RT5670_MONO_ADC_MIXER,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1012 RT5670_MONO_ADC_R2_SRC_SFT, rt5670_mono_adc_r2_src);
1013
1014static const struct snd_kcontrol_new rt5670_mono_adc_r2_mux =
1015 SOC_DAPM_ENUM("Mono ADC2 right source", rt5670_mono_adc_r2_enum);
1016
1017/* MX-2D [3:2] */
1018static const char * const rt5670_txdp_slot_src[] = {
1019 "Slot 0-1", "Slot 2-3", "Slot 4-5", "Slot 6-7"
1020};
1021
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1022static SOC_ENUM_SINGLE_DECL(rt5670_txdp_slot_enum, RT5670_DSP_PATH1,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1023 RT5670_TXDP_SLOT_SEL_SFT, rt5670_txdp_slot_src);
1024
1025static const struct snd_kcontrol_new rt5670_txdp_slot_mux =
1026 SOC_DAPM_ENUM("TxDP Slot source", rt5670_txdp_slot_enum);
1027
1028/* MX-2F [15] */
1029static const char * const rt5670_if1_adc2_in_src[] = {
1030 "IF_ADC2", "VAD_ADC"
1031};
1032
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1033static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in_enum, RT5670_DIG_INF1_DATA,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1034 RT5670_IF1_ADC2_IN_SFT, rt5670_if1_adc2_in_src);
1035
1036static const struct snd_kcontrol_new rt5670_if1_adc2_in_mux =
1037 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5670_if1_adc2_in_enum);
1038
1039/* MX-2F [14:12] */
1040static const char * const rt5670_if2_adc_in_src[] = {
1041 "IF_ADC1", "IF_ADC2", "IF_ADC3", "TxDC_DAC", "TxDP_ADC", "VAD_ADC"
1042};
1043
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1044static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_in_enum, RT5670_DIG_INF1_DATA,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1045 RT5670_IF2_ADC_IN_SFT, rt5670_if2_adc_in_src);
1046
1047static const struct snd_kcontrol_new rt5670_if2_adc_in_mux =
1048 SOC_DAPM_ENUM("IF2 ADC IN source", rt5670_if2_adc_in_enum);
1049
1050/* MX-30 [5:4] */
1051static const char * const rt5670_if4_adc_in_src[] = {
1052 "IF_ADC1", "IF_ADC2", "IF_ADC3"
1053};
1054
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1055static SOC_ENUM_SINGLE_DECL(rt5670_if4_adc_in_enum, RT5670_DIG_INF2_DATA,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1056 RT5670_IF4_ADC_IN_SFT, rt5670_if4_adc_in_src);
1057
1058static const struct snd_kcontrol_new rt5670_if4_adc_in_mux =
1059 SOC_DAPM_ENUM("IF4 ADC IN source", rt5670_if4_adc_in_enum);
1060
1061/* MX-31 [15] [13] [11] [9] */
1062static const char * const rt5670_pdm_src[] = {
1063 "Mono DAC", "Stereo DAC"
1064};
1065
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1066static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_l_enum, RT5670_PDM_OUT_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1067 RT5670_PDM1_L_SFT, rt5670_pdm_src);
1068
1069static const struct snd_kcontrol_new rt5670_pdm1_l_mux =
1070 SOC_DAPM_ENUM("PDM1 L source", rt5670_pdm1_l_enum);
1071
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1072static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_r_enum, RT5670_PDM_OUT_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1073 RT5670_PDM1_R_SFT, rt5670_pdm_src);
1074
1075static const struct snd_kcontrol_new rt5670_pdm1_r_mux =
1076 SOC_DAPM_ENUM("PDM1 R source", rt5670_pdm1_r_enum);
1077
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1078static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_l_enum, RT5670_PDM_OUT_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1079 RT5670_PDM2_L_SFT, rt5670_pdm_src);
1080
1081static const struct snd_kcontrol_new rt5670_pdm2_l_mux =
1082 SOC_DAPM_ENUM("PDM2 L source", rt5670_pdm2_l_enum);
1083
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1084static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_r_enum, RT5670_PDM_OUT_CTRL,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1085 RT5670_PDM2_R_SFT, rt5670_pdm_src);
1086
1087static const struct snd_kcontrol_new rt5670_pdm2_r_mux =
1088 SOC_DAPM_ENUM("PDM2 R source", rt5670_pdm2_r_enum);
1089
1090/* MX-FA [12] */
1091static const char * const rt5670_if1_adc1_in1_src[] = {
1092 "IF_ADC1", "IF1_ADC3"
1093};
1094
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1095static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in1_enum, RT5670_DIG_MISC,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1096 RT5670_IF1_ADC1_IN1_SFT, rt5670_if1_adc1_in1_src);
1097
1098static const struct snd_kcontrol_new rt5670_if1_adc1_in1_mux =
1099 SOC_DAPM_ENUM("IF1 ADC1 IN1 source", rt5670_if1_adc1_in1_enum);
1100
1101/* MX-FA [11] */
1102static const char * const rt5670_if1_adc1_in2_src[] = {
1103 "IF1_ADC1_IN1", "IF1_ADC4"
1104};
1105
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1106static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in2_enum, RT5670_DIG_MISC,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1107 RT5670_IF1_ADC1_IN2_SFT, rt5670_if1_adc1_in2_src);
1108
1109static const struct snd_kcontrol_new rt5670_if1_adc1_in2_mux =
1110 SOC_DAPM_ENUM("IF1 ADC1 IN2 source", rt5670_if1_adc1_in2_enum);
1111
1112/* MX-FA [10] */
1113static const char * const rt5670_if1_adc2_in1_src[] = {
1114 "IF1_ADC2_IN", "IF1_ADC4"
1115};
1116
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1117static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in1_enum, RT5670_DIG_MISC,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1118 RT5670_IF1_ADC2_IN1_SFT, rt5670_if1_adc2_in1_src);
1119
1120static const struct snd_kcontrol_new rt5670_if1_adc2_in1_mux =
1121 SOC_DAPM_ENUM("IF1 ADC2 IN1 source", rt5670_if1_adc2_in1_enum);
1122
1123/* MX-9D [9:8] */
1124static const char * const rt5670_vad_adc_src[] = {
1125 "Sto1 ADC L", "Mono ADC L", "Mono ADC R", "Sto2 ADC L"
1126};
1127
Mark Brown01957572014-08-01 17:30:38 +0100[diff] [blame]1128static SOC_ENUM_SINGLE_DECL(rt5670_vad_adc_enum, RT5670_VAD_CTRL4,
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1129 RT5670_VAD_SEL_SFT, rt5670_vad_adc_src);
1130
1131static const struct snd_kcontrol_new rt5670_vad_adc_mux =
1132 SOC_DAPM_ENUM("VAD ADC source", rt5670_vad_adc_enum);
1133
1134static int rt5670_hp_power_event(struct snd_soc_dapm_widget *w,
1135 struct snd_kcontrol *kcontrol, int event)
1136{
1137 struct snd_soc_codec *codec = w->codec;
1138 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
1139
1140 switch (event) {
1141 case SND_SOC_DAPM_POST_PMU:
1142 regmap_update_bits(rt5670->regmap, RT5670_CHARGE_PUMP,
1143 RT5670_PM_HP_MASK, RT5670_PM_HP_HV);
1144 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
1145 0x0400, 0x0400);
1146 /* headphone amp power on */
1147 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
1148 RT5670_PWR_HA | RT5670_PWR_FV1 |
1149 RT5670_PWR_FV2, RT5670_PWR_HA |
1150 RT5670_PWR_FV1 | RT5670_PWR_FV2);
1151 /* depop parameters */
1152 regmap_write(rt5670->regmap, RT5670_DEPOP_M2, 0x3100);
1153 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8009);
1154 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1155 RT5670_HP_DCC_INT1, 0x9f00);
1156 mdelay(20);
1157 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1158 break;
1159 case SND_SOC_DAPM_PRE_PMD:
1160 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x0004);
1161 msleep(30);
1162 break;
1163 default:
1164 return 0;
1165 }
1166
1167 return 0;
1168}
1169
1170static int rt5670_hp_event(struct snd_soc_dapm_widget *w,
1171 struct snd_kcontrol *kcontrol, int event)
1172{
1173 struct snd_soc_codec *codec = w->codec;
1174 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
1175
1176 switch (event) {
1177 case SND_SOC_DAPM_POST_PMU:
1178 /* headphone unmute sequence */
1179 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1180 RT5670_MAMP_INT_REG2, 0xb400);
1181 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
1182 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x805d);
1183 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
1184 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
1185 0x0300, 0x0300);
1186 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
1187 RT5670_L_MUTE | RT5670_R_MUTE, 0);
1188 msleep(80);
1189 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1190 break;
1191
1192 case SND_SOC_DAPM_PRE_PMD:
1193 /* headphone mute sequence */
1194 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1195 RT5670_MAMP_INT_REG2, 0xb400);
1196 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
1197 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x803d);
1198 mdelay(10);
1199 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
1200 mdelay(10);
1201 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
1202 RT5670_L_MUTE | RT5670_R_MUTE,
1203 RT5670_L_MUTE | RT5670_R_MUTE);
1204 msleep(20);
1205 regmap_update_bits(rt5670->regmap,
1206 RT5670_GEN_CTRL2, 0x0300, 0x0);
1207 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1208 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0707);
1209 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1210 RT5670_MAMP_INT_REG2, 0xfc00);
1211 break;
1212
1213 default:
1214 return 0;
1215 }
1216
1217 return 0;
1218}
1219
1220static int rt5670_bst1_event(struct snd_soc_dapm_widget *w,
1221 struct snd_kcontrol *kcontrol, int event)
1222{
1223 struct snd_soc_codec *codec = w->codec;
1224
1225 switch (event) {
1226 case SND_SOC_DAPM_POST_PMU:
1227 snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1228 RT5670_PWR_BST1_P, RT5670_PWR_BST1_P);
1229 break;
1230
1231 case SND_SOC_DAPM_PRE_PMD:
1232 snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1233 RT5670_PWR_BST1_P, 0);
1234 break;
1235
1236 default:
1237 return 0;
1238 }
1239
1240 return 0;
1241}
1242
1243static int rt5670_bst2_event(struct snd_soc_dapm_widget *w,
1244 struct snd_kcontrol *kcontrol, int event)
1245{
1246 struct snd_soc_codec *codec = w->codec;
1247
1248 switch (event) {
1249 case SND_SOC_DAPM_POST_PMU:
1250 snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1251 RT5670_PWR_BST2_P, RT5670_PWR_BST2_P);
1252 break;
1253
1254 case SND_SOC_DAPM_PRE_PMD:
1255 snd_soc_update_bits(codec, RT5670_PWR_ANLG2,
1256 RT5670_PWR_BST2_P, 0);
1257 break;
1258
1259 default:
1260 return 0;
1261 }
1262
1263 return 0;
1264}
1265
1266static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = {
1267 SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2,
1268 RT5670_PWR_PLL_BIT, 0, NULL, 0),
1269 SND_SOC_DAPM_SUPPLY("I2S DSP", RT5670_PWR_DIG2,
1270 RT5670_PWR_I2S_DSP_BIT, 0, NULL, 0),
1271 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5670_PWR_VOL,
1272 RT5670_PWR_MIC_DET_BIT, 0, NULL, 0),
1273
1274 /* ASRC */
1275 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5670_ASRC_1,
1276 11, 0, NULL, 0),
1277 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5670_ASRC_1,
1278 12, 0, NULL, 0),
1279 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5670_ASRC_1,
1280 10, 0, NULL, 0),
1281 SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5670_ASRC_1,
1282 9, 0, NULL, 0),
1283 SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5670_ASRC_1,
1284 8, 0, NULL, 0),
1285 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5670_ASRC_1,
1286 3, 0, NULL, 0),
1287 SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5670_ASRC_1,
1288 2, 0, NULL, 0),
1289 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5670_ASRC_1,
1290 1, 0, NULL, 0),
1291 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5670_ASRC_1,
1292 0, 0, NULL, 0),
1293
1294 /* Input Side */
1295 /* micbias */
1296 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5670_PWR_ANLG2,
1297 RT5670_PWR_MB1_BIT, 0, NULL, 0),
1298
1299 /* Input Lines */
1300 SND_SOC_DAPM_INPUT("DMIC L1"),
1301 SND_SOC_DAPM_INPUT("DMIC R1"),
1302 SND_SOC_DAPM_INPUT("DMIC L2"),
1303 SND_SOC_DAPM_INPUT("DMIC R2"),
1304 SND_SOC_DAPM_INPUT("DMIC L3"),
1305 SND_SOC_DAPM_INPUT("DMIC R3"),
1306
1307 SND_SOC_DAPM_INPUT("IN1P"),
1308 SND_SOC_DAPM_INPUT("IN1N"),
1309 SND_SOC_DAPM_INPUT("IN2P"),
1310 SND_SOC_DAPM_INPUT("IN2N"),
1311
1312 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1313 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1314 SND_SOC_DAPM_PGA("DMIC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1315
1316 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1317 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1318 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5670_DMIC_CTRL1,
1319 RT5670_DMIC_1_EN_SFT, 0, NULL, 0),
1320 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5670_DMIC_CTRL1,
1321 RT5670_DMIC_2_EN_SFT, 0, NULL, 0),
1322 SND_SOC_DAPM_SUPPLY("DMIC3 Power", RT5670_DMIC_CTRL1,
1323 RT5670_DMIC_3_EN_SFT, 0, NULL, 0),
1324 /* Boost */
1325 SND_SOC_DAPM_PGA_E("BST1", RT5670_PWR_ANLG2, RT5670_PWR_BST1_BIT,
1326 0, NULL, 0, rt5670_bst1_event,
1327 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1328 SND_SOC_DAPM_PGA_E("BST2", RT5670_PWR_ANLG2, RT5670_PWR_BST2_BIT,
1329 0, NULL, 0, rt5670_bst2_event,
1330 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1331 /* Input Volume */
1332 SND_SOC_DAPM_PGA("INL VOL", RT5670_PWR_VOL,
1333 RT5670_PWR_IN_L_BIT, 0, NULL, 0),
1334 SND_SOC_DAPM_PGA("INR VOL", RT5670_PWR_VOL,
1335 RT5670_PWR_IN_R_BIT, 0, NULL, 0),
1336
1337 /* REC Mixer */
1338 SND_SOC_DAPM_MIXER("RECMIXL", RT5670_PWR_MIXER, RT5670_PWR_RM_L_BIT, 0,
1339 rt5670_rec_l_mix, ARRAY_SIZE(rt5670_rec_l_mix)),
1340 SND_SOC_DAPM_MIXER("RECMIXR", RT5670_PWR_MIXER, RT5670_PWR_RM_R_BIT, 0,
1341 rt5670_rec_r_mix, ARRAY_SIZE(rt5670_rec_r_mix)),
1342 /* ADCs */
1343 SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
1344 SND_SOC_DAPM_ADC("ADC 2", NULL, SND_SOC_NOPM, 0, 0),
1345
1346 SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0),
1347
1348 SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5670_PWR_DIG1,
1349 RT5670_PWR_ADC_L_BIT, 0, NULL, 0),
1350 SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5670_PWR_DIG1,
1351 RT5670_PWR_ADC_R_BIT, 0, NULL, 0),
1352 SND_SOC_DAPM_SUPPLY("ADC clock", RT5670_PR_BASE +
1353 RT5670_CHOP_DAC_ADC, 12, 0, NULL, 0),
1354 /* ADC Mux */
1355 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1356 &rt5670_sto1_dmic_mux),
1357 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1358 &rt5670_sto_adc_l2_mux),
1359 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1360 &rt5670_sto_adc_r2_mux),
1361 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1362 &rt5670_sto_adc_l1_mux),
1363 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1364 &rt5670_sto_adc_r1_mux),
1365 SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0,
1366 &rt5670_sto2_dmic_mux),
1367 SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1368 &rt5670_sto2_adc_l2_mux),
1369 SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1370 &rt5670_sto2_adc_r2_mux),
1371 SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1372 &rt5670_sto2_adc_l1_mux),
1373 SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1374 &rt5670_sto2_adc_r1_mux),
1375 SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0,
1376 &rt5670_sto2_adc_lr_mux),
1377 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1378 &rt5670_mono_dmic_l_mux),
1379 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1380 &rt5670_mono_dmic_r_mux),
1381 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1382 &rt5670_mono_adc_l2_mux),
1383 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1384 &rt5670_mono_adc_l1_mux),
1385 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1386 &rt5670_mono_adc_r1_mux),
1387 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1388 &rt5670_mono_adc_r2_mux),
1389 /* ADC Mixer */
1390 SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5670_PWR_DIG2,
1391 RT5670_PWR_ADC_S1F_BIT, 0, NULL, 0),
1392 SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5670_PWR_DIG2,
1393 RT5670_PWR_ADC_S2F_BIT, 0, NULL, 0),
1394 SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", RT5670_STO1_ADC_DIG_VOL,
1395 RT5670_L_MUTE_SFT, 1, rt5670_sto1_adc_l_mix,
1396 ARRAY_SIZE(rt5670_sto1_adc_l_mix)),
1397 SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", RT5670_STO1_ADC_DIG_VOL,
1398 RT5670_R_MUTE_SFT, 1, rt5670_sto1_adc_r_mix,
1399 ARRAY_SIZE(rt5670_sto1_adc_r_mix)),
1400 SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0,
1401 rt5670_sto2_adc_l_mix,
1402 ARRAY_SIZE(rt5670_sto2_adc_l_mix)),
1403 SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0,
1404 rt5670_sto2_adc_r_mix,
1405 ARRAY_SIZE(rt5670_sto2_adc_r_mix)),
1406 SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5670_PWR_DIG2,
1407 RT5670_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1408 SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5670_MONO_ADC_DIG_VOL,
1409 RT5670_L_MUTE_SFT, 1, rt5670_mono_adc_l_mix,
1410 ARRAY_SIZE(rt5670_mono_adc_l_mix)),
1411 SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5670_PWR_DIG2,
1412 RT5670_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1413 SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5670_MONO_ADC_DIG_VOL,
1414 RT5670_R_MUTE_SFT, 1, rt5670_mono_adc_r_mix,
1415 ARRAY_SIZE(rt5670_mono_adc_r_mix)),
1416
1417 /* ADC PGA */
1418 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1419 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1420 SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1421 SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1422 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1423 SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1424 SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1425 SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1426 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1427 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1428 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1429 SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1430 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1431 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1432 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1433 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1434
1435 /* DSP */
1436 SND_SOC_DAPM_PGA("TxDP_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1437 SND_SOC_DAPM_PGA("TxDP_ADC_L", SND_SOC_NOPM, 0, 0, NULL, 0),
1438 SND_SOC_DAPM_PGA("TxDP_ADC_R", SND_SOC_NOPM, 0, 0, NULL, 0),
1439 SND_SOC_DAPM_PGA("TxDC_DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1440
1441 SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0,
1442 &rt5670_txdp_slot_mux),
1443
1444 SND_SOC_DAPM_MUX("DSP UL Mux", SND_SOC_NOPM, 0, 0,
1445 &rt5670_dsp_ul_mux),
1446 SND_SOC_DAPM_MUX("DSP DL Mux", SND_SOC_NOPM, 0, 0,
1447 &rt5670_dsp_dl_mux),
1448
1449 SND_SOC_DAPM_MUX("RxDP Mux", SND_SOC_NOPM, 0, 0,
1450 &rt5670_rxdp_mux),
1451
1452 /* IF2 Mux */
1453 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0,
1454 &rt5670_if2_adc_in_mux),
1455
1456 /* Digital Interface */
1457 SND_SOC_DAPM_SUPPLY("I2S1", RT5670_PWR_DIG1,
1458 RT5670_PWR_I2S1_BIT, 0, NULL, 0),
1459 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1460 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1461 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1462 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1463 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1464 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1465 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1466 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1467 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1468 SND_SOC_DAPM_SUPPLY("I2S2", RT5670_PWR_DIG1,
1469 RT5670_PWR_I2S2_BIT, 0, NULL, 0),
1470 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1471 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1472 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1473 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1474 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1475 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1476
1477 /* Digital Interface Select */
1478 SND_SOC_DAPM_MUX("IF1 ADC1 IN1 Mux", SND_SOC_NOPM, 0, 0,
1479 &rt5670_if1_adc1_in1_mux),
1480 SND_SOC_DAPM_MUX("IF1 ADC1 IN2 Mux", SND_SOC_NOPM, 0, 0,
1481 &rt5670_if1_adc1_in2_mux),
1482 SND_SOC_DAPM_MUX("IF1 ADC2 IN Mux", SND_SOC_NOPM, 0, 0,
1483 &rt5670_if1_adc2_in_mux),
1484 SND_SOC_DAPM_MUX("IF1 ADC2 IN1 Mux", SND_SOC_NOPM, 0, 0,
1485 &rt5670_if1_adc2_in1_mux),
1486 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0,
1487 &rt5670_vad_adc_mux),
1488
1489 /* Audio Interface */
1490 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1491 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1492 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1493 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0,
1494 RT5670_GPIO_CTRL1, RT5670_I2S2_PIN_SFT, 1),
1495
1496 /* Audio DSP */
1497 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1498
1499 /* Output Side */
1500 /* DAC mixer before sound effect */
1501 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1502 rt5670_dac_l_mix, ARRAY_SIZE(rt5670_dac_l_mix)),
1503 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1504 rt5670_dac_r_mix, ARRAY_SIZE(rt5670_dac_r_mix)),
1505 SND_SOC_DAPM_PGA("DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1506
1507 /* DAC2 channel Mux */
1508 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1509 &rt5670_dac_l2_mux),
1510 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1511 &rt5670_dac_r2_mux),
1512 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5670_PWR_DIG1,
1513 RT5670_PWR_DAC_L2_BIT, 0, NULL, 0),
1514 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5670_PWR_DIG1,
1515 RT5670_PWR_DAC_R2_BIT, 0, NULL, 0),
1516
1517 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1l_mux),
1518 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1r_mux),
1519
1520 /* DAC Mixer */
1521 SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5670_PWR_DIG2,
1522 RT5670_PWR_DAC_S1F_BIT, 0, NULL, 0),
1523 SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5670_PWR_DIG2,
1524 RT5670_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1525 SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5670_PWR_DIG2,
1526 RT5670_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1527 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1528 rt5670_sto_dac_l_mix,
1529 ARRAY_SIZE(rt5670_sto_dac_l_mix)),
1530 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1531 rt5670_sto_dac_r_mix,
1532 ARRAY_SIZE(rt5670_sto_dac_r_mix)),
1533 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1534 rt5670_mono_dac_l_mix,
1535 ARRAY_SIZE(rt5670_mono_dac_l_mix)),
1536 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1537 rt5670_mono_dac_r_mix,
1538 ARRAY_SIZE(rt5670_mono_dac_r_mix)),
1539 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1540 rt5670_dig_l_mix,
1541 ARRAY_SIZE(rt5670_dig_l_mix)),
1542 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1543 rt5670_dig_r_mix,
1544 ARRAY_SIZE(rt5670_dig_r_mix)),
1545
1546 /* DACs */
1547 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5670_PWR_DIG1,
1548 RT5670_PWR_DAC_L1_BIT, 0, NULL, 0),
1549 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5670_PWR_DIG1,
1550 RT5670_PWR_DAC_R1_BIT, 0, NULL, 0),
1551 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
1552 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
1553 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5670_PWR_DIG1,
1554 RT5670_PWR_DAC_L2_BIT, 0),
1555
1556 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5670_PWR_DIG1,
1557 RT5670_PWR_DAC_R2_BIT, 0),
1558 /* OUT Mixer */
1559
1560 SND_SOC_DAPM_MIXER("OUT MIXL", RT5670_PWR_MIXER, RT5670_PWR_OM_L_BIT,
1561 0, rt5670_out_l_mix, ARRAY_SIZE(rt5670_out_l_mix)),
1562 SND_SOC_DAPM_MIXER("OUT MIXR", RT5670_PWR_MIXER, RT5670_PWR_OM_R_BIT,
1563 0, rt5670_out_r_mix, ARRAY_SIZE(rt5670_out_r_mix)),
1564 /* Ouput Volume */
1565 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5670_PWR_VOL,
1566 RT5670_PWR_HV_L_BIT, 0,
1567 rt5670_hpvoll_mix, ARRAY_SIZE(rt5670_hpvoll_mix)),
1568 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5670_PWR_VOL,
1569 RT5670_PWR_HV_R_BIT, 0,
1570 rt5670_hpvolr_mix, ARRAY_SIZE(rt5670_hpvolr_mix)),
1571 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1572 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1573 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1574
1575 /* HPO/LOUT/Mono Mixer */
1576 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
1577 rt5670_hpo_mix, ARRAY_SIZE(rt5670_hpo_mix)),
1578 SND_SOC_DAPM_MIXER("LOUT MIX", RT5670_PWR_ANLG1, RT5670_PWR_LM_BIT,
1579 0, rt5670_lout_mix, ARRAY_SIZE(rt5670_lout_mix)),
1580 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, 0, 0,
1581 rt5670_hp_power_event, SND_SOC_DAPM_POST_PMU |
1582 SND_SOC_DAPM_PRE_PMD),
1583 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5670_PWR_ANLG1,
1584 RT5670_PWR_HP_L_BIT, 0, NULL, 0),
1585 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5670_PWR_ANLG1,
1586 RT5670_PWR_HP_R_BIT, 0, NULL, 0),
1587 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
1588 rt5670_hp_event, SND_SOC_DAPM_PRE_PMD |
1589 SND_SOC_DAPM_POST_PMU),
1590 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
1591 &lout_l_enable_control),
1592 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
1593 &lout_r_enable_control),
1594 SND_SOC_DAPM_PGA("LOUT Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
1595
1596 /* PDM */
1597 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5670_PWR_DIG2,
1598 RT5670_PWR_PDM1_BIT, 0, NULL, 0),
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1599
1600 SND_SOC_DAPM_MUX("PDM1 L Mux", RT5670_PDM_OUT_CTRL,
1601 RT5670_M_PDM1_L_SFT, 1, &rt5670_pdm1_l_mux),
1602 SND_SOC_DAPM_MUX("PDM1 R Mux", RT5670_PDM_OUT_CTRL,
1603 RT5670_M_PDM1_R_SFT, 1, &rt5670_pdm1_r_mux),
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1604
1605 /* Output Lines */
1606 SND_SOC_DAPM_OUTPUT("HPOL"),
1607 SND_SOC_DAPM_OUTPUT("HPOR"),
1608 SND_SOC_DAPM_OUTPUT("LOUTL"),
1609 SND_SOC_DAPM_OUTPUT("LOUTR"),
Bard Liao0cf18632014-11-11 17:59:50 +0800[diff] [blame]1610};
1611
1612static const struct snd_soc_dapm_widget rt5670_specific_dapm_widgets[] = {
1613 SND_SOC_DAPM_SUPPLY("PDM2 Power", RT5670_PWR_DIG2,
1614 RT5670_PWR_PDM2_BIT, 0, NULL, 0),
1615 SND_SOC_DAPM_MUX("PDM2 L Mux", RT5670_PDM_OUT_CTRL,
1616 RT5670_M_PDM2_L_SFT, 1, &rt5670_pdm2_l_mux),
1617 SND_SOC_DAPM_MUX("PDM2 R Mux", RT5670_PDM_OUT_CTRL,
1618 RT5670_M_PDM2_R_SFT, 1, &rt5670_pdm2_r_mux),
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1619 SND_SOC_DAPM_OUTPUT("PDM1L"),
1620 SND_SOC_DAPM_OUTPUT("PDM1R"),
1621 SND_SOC_DAPM_OUTPUT("PDM2L"),
1622 SND_SOC_DAPM_OUTPUT("PDM2R"),
1623};
1624
Bard Liao0cf18632014-11-11 17:59:50 +0800[diff] [blame]1625static const struct snd_soc_dapm_widget rt5672_specific_dapm_widgets[] = {
1626 SND_SOC_DAPM_PGA("SPO Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
1627 SND_SOC_DAPM_OUTPUT("SPOLP"),
1628 SND_SOC_DAPM_OUTPUT("SPOLN"),
1629 SND_SOC_DAPM_OUTPUT("SPORP"),
1630 SND_SOC_DAPM_OUTPUT("SPORN"),
1631};
1632
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1633static const struct snd_soc_dapm_route rt5670_dapm_routes[] = {
1634 { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
1635 { "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc },
1636 { "ADC Mono Left Filter", NULL, "ADC MONO L ASRC", is_using_asrc },
1637 { "ADC Mono Right Filter", NULL, "ADC MONO R ASRC", is_using_asrc },
1638 { "DAC Mono Left Filter", NULL, "DAC MONO L ASRC", is_using_asrc },
1639 { "DAC Mono Right Filter", NULL, "DAC MONO R ASRC", is_using_asrc },
1640 { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
1641
1642 { "I2S1", NULL, "I2S1 ASRC" },
1643 { "I2S2", NULL, "I2S2 ASRC" },
1644
1645 { "DMIC1", NULL, "DMIC L1" },
1646 { "DMIC1", NULL, "DMIC R1" },
1647 { "DMIC2", NULL, "DMIC L2" },
1648 { "DMIC2", NULL, "DMIC R2" },
1649 { "DMIC3", NULL, "DMIC L3" },
1650 { "DMIC3", NULL, "DMIC R3" },
1651
1652 { "BST1", NULL, "IN1P" },
1653 { "BST1", NULL, "IN1N" },
1654 { "BST1", NULL, "Mic Det Power" },
1655 { "BST2", NULL, "IN2P" },
1656 { "BST2", NULL, "IN2N" },
1657
1658 { "INL VOL", NULL, "IN2P" },
1659 { "INR VOL", NULL, "IN2N" },
1660
1661 { "RECMIXL", "INL Switch", "INL VOL" },
1662 { "RECMIXL", "BST2 Switch", "BST2" },
1663 { "RECMIXL", "BST1 Switch", "BST1" },
1664
1665 { "RECMIXR", "INR Switch", "INR VOL" },
1666 { "RECMIXR", "BST2 Switch", "BST2" },
1667 { "RECMIXR", "BST1 Switch", "BST1" },
1668
1669 { "ADC 1", NULL, "RECMIXL" },
1670 { "ADC 1", NULL, "ADC 1 power" },
1671 { "ADC 1", NULL, "ADC clock" },
1672 { "ADC 2", NULL, "RECMIXR" },
1673 { "ADC 2", NULL, "ADC 2 power" },
1674 { "ADC 2", NULL, "ADC clock" },
1675
1676 { "DMIC L1", NULL, "DMIC CLK" },
1677 { "DMIC L1", NULL, "DMIC1 Power" },
1678 { "DMIC R1", NULL, "DMIC CLK" },
1679 { "DMIC R1", NULL, "DMIC1 Power" },
1680 { "DMIC L2", NULL, "DMIC CLK" },
1681 { "DMIC L2", NULL, "DMIC2 Power" },
1682 { "DMIC R2", NULL, "DMIC CLK" },
1683 { "DMIC R2", NULL, "DMIC2 Power" },
1684 { "DMIC L3", NULL, "DMIC CLK" },
1685 { "DMIC L3", NULL, "DMIC3 Power" },
1686 { "DMIC R3", NULL, "DMIC CLK" },
1687 { "DMIC R3", NULL, "DMIC3 Power" },
1688
1689 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
1690 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
1691 { "Stereo1 DMIC Mux", "DMIC3", "DMIC3" },
1692
1693 { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" },
1694 { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" },
1695 { "Stereo2 DMIC Mux", "DMIC3", "DMIC3" },
1696
1697 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
1698 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
1699 { "Mono DMIC L Mux", "DMIC3", "DMIC L3" },
1700
1701 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
1702 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
1703 { "Mono DMIC R Mux", "DMIC3", "DMIC R3" },
1704
1705 { "ADC 1_2", NULL, "ADC 1" },
1706 { "ADC 1_2", NULL, "ADC 2" },
1707
1708 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1709 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1710 { "Stereo1 ADC L1 Mux", "ADC", "ADC 1_2" },
1711 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1712
1713 { "Stereo1 ADC R1 Mux", "ADC", "ADC 1_2" },
1714 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1715 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1716 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1717
1718 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
1719 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1720 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1721 { "Mono ADC L1 Mux", "ADC1", "ADC 1" },
1722
1723 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1724 { "Mono ADC R1 Mux", "ADC2", "ADC 2" },
1725 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
1726 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1727
1728 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
1729 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
1730 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
1731 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
1732
1733 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
1734 { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" },
1735 { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
1736
1737 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
1738 { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" },
1739 { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
1740
1741 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
1742 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
1743 { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
1744 { "ADC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
1745
1746 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
1747 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
1748 { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
1749 { "ADC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
1750
1751 { "Stereo2 ADC L2 Mux", "DMIC", "Stereo2 DMIC Mux" },
1752 { "Stereo2 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1753 { "Stereo2 ADC L1 Mux", "ADC", "ADC 1_2" },
1754 { "Stereo2 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1755
1756 { "Stereo2 ADC R1 Mux", "ADC", "ADC 1_2" },
1757 { "Stereo2 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1758 { "Stereo2 ADC R2 Mux", "DMIC", "Stereo2 DMIC Mux" },
1759 { "Stereo2 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1760
1761 { "Sto2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux" },
1762 { "Sto2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux" },
1763 { "Sto2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux" },
1764 { "Sto2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux" },
1765
1766 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXL" },
1767 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXR" },
1768
1769 { "Stereo2 ADC LR Mux", "L", "Sto2 ADC MIXL" },
1770 { "Stereo2 ADC LR Mux", "LR", "Sto2 ADC LR MIX" },
1771
1772 { "Stereo2 ADC MIXL", NULL, "Stereo2 ADC LR Mux" },
1773 { "Stereo2 ADC MIXL", NULL, "ADC Stereo2 Filter" },
1774 { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll },
1775
1776 { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" },
1777 { "Stereo2 ADC MIXR", NULL, "ADC Stereo2 Filter" },
1778 { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll },
1779
1780 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
1781 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
1782 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
1783 { "VAD ADC Mux", "Sto2 ADC L", "Sto2 ADC MIXL" },
1784
1785 { "VAD_ADC", NULL, "VAD ADC Mux" },
1786
1787 { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
1788 { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
1789 { "IF_ADC2", NULL, "Mono ADC MIXL" },
1790 { "IF_ADC2", NULL, "Mono ADC MIXR" },
1791 { "IF_ADC3", NULL, "Stereo2 ADC MIXL" },
1792 { "IF_ADC3", NULL, "Stereo2 ADC MIXR" },
1793
1794 { "IF1 ADC1 IN1 Mux", "IF_ADC1", "IF_ADC1" },
1795 { "IF1 ADC1 IN1 Mux", "IF1_ADC3", "IF1_ADC3" },
1796
1797 { "IF1 ADC1 IN2 Mux", "IF1_ADC1_IN1", "IF1 ADC1 IN1 Mux" },
1798 { "IF1 ADC1 IN2 Mux", "IF1_ADC4", "IF1_ADC4" },
1799
1800 { "IF1 ADC2 IN Mux", "IF_ADC2", "IF_ADC2" },
1801 { "IF1 ADC2 IN Mux", "VAD_ADC", "VAD_ADC" },
1802
1803 { "IF1 ADC2 IN1 Mux", "IF1_ADC2_IN", "IF1 ADC2 IN Mux" },
1804 { "IF1 ADC2 IN1 Mux", "IF1_ADC4", "IF1_ADC4" },
1805
1806 { "IF1_ADC1" , NULL, "IF1 ADC1 IN2 Mux" },
1807 { "IF1_ADC2" , NULL, "IF1 ADC2 IN1 Mux" },
1808
1809 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" },
1810 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" },
1811 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXL" },
1812 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXR" },
1813 { "Mono ADC MIX", NULL, "Mono ADC MIXL" },
1814 { "Mono ADC MIX", NULL, "Mono ADC MIXR" },
1815
1816 { "RxDP Mux", "IF2 DAC", "IF2 DAC" },
1817 { "RxDP Mux", "IF1 DAC", "IF1 DAC2" },
1818 { "RxDP Mux", "STO1 ADC Mixer", "Stereo1 ADC MIX" },
1819 { "RxDP Mux", "STO2 ADC Mixer", "Stereo2 ADC MIX" },
1820 { "RxDP Mux", "Mono ADC Mixer L", "Mono ADC MIXL" },
1821 { "RxDP Mux", "Mono ADC Mixer R", "Mono ADC MIXR" },
1822 { "RxDP Mux", "DAC1", "DAC MIX" },
1823
1824 { "TDM Data Mux", "Slot 0-1", "Stereo1 ADC MIX" },
1825 { "TDM Data Mux", "Slot 2-3", "Mono ADC MIX" },
1826 { "TDM Data Mux", "Slot 4-5", "Stereo2 ADC MIX" },
1827 { "TDM Data Mux", "Slot 6-7", "IF2 DAC" },
1828
1829 { "DSP UL Mux", "Bypass", "TDM Data Mux" },
1830 { "DSP UL Mux", NULL, "I2S DSP" },
1831 { "DSP DL Mux", "Bypass", "RxDP Mux" },
1832 { "DSP DL Mux", NULL, "I2S DSP" },
1833
1834 { "TxDP_ADC_L", NULL, "DSP UL Mux" },
1835 { "TxDP_ADC_R", NULL, "DSP UL Mux" },
1836 { "TxDC_DAC", NULL, "DSP DL Mux" },
1837
1838 { "TxDP_ADC", NULL, "TxDP_ADC_L" },
1839 { "TxDP_ADC", NULL, "TxDP_ADC_R" },
1840
1841 { "IF1 ADC", NULL, "I2S1" },
1842 { "IF1 ADC", NULL, "IF1_ADC1" },
1843 { "IF1 ADC", NULL, "IF1_ADC2" },
1844 { "IF1 ADC", NULL, "IF_ADC3" },
1845 { "IF1 ADC", NULL, "TxDP_ADC" },
1846
1847 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
1848 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
1849 { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" },
1850 { "IF2 ADC Mux", "TxDC_DAC", "TxDC_DAC" },
1851 { "IF2 ADC Mux", "TxDP_ADC", "TxDP_ADC" },
1852 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
1853
1854 { "IF2 ADC L", NULL, "IF2 ADC Mux" },
1855 { "IF2 ADC R", NULL, "IF2 ADC Mux" },
1856
1857 { "IF2 ADC", NULL, "I2S2" },
1858 { "IF2 ADC", NULL, "IF2 ADC L" },
1859 { "IF2 ADC", NULL, "IF2 ADC R" },
1860
1861 { "AIF1TX", NULL, "IF1 ADC" },
1862 { "AIF2TX", NULL, "IF2 ADC" },
1863
1864 { "IF1 DAC1", NULL, "AIF1RX" },
1865 { "IF1 DAC2", NULL, "AIF1RX" },
1866 { "IF2 DAC", NULL, "AIF2RX" },
1867
1868 { "IF1 DAC1", NULL, "I2S1" },
1869 { "IF1 DAC2", NULL, "I2S1" },
1870 { "IF2 DAC", NULL, "I2S2" },
1871
1872 { "IF1 DAC2 L", NULL, "IF1 DAC2" },
1873 { "IF1 DAC2 R", NULL, "IF1 DAC2" },
1874 { "IF1 DAC1 L", NULL, "IF1 DAC1" },
1875 { "IF1 DAC1 R", NULL, "IF1 DAC1" },
1876 { "IF2 DAC L", NULL, "IF2 DAC" },
1877 { "IF2 DAC R", NULL, "IF2 DAC" },
1878
1879 { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
1880 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
1881
1882 { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
1883 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
1884
1885 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
1886 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
1887 { "DAC1 MIXL", NULL, "DAC Stereo1 Filter" },
1888 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
1889 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
1890 { "DAC1 MIXR", NULL, "DAC Stereo1 Filter" },
1891
1892 { "DAC MIX", NULL, "DAC1 MIXL" },
1893 { "DAC MIX", NULL, "DAC1 MIXR" },
1894
1895 { "Audio DSP", NULL, "DAC1 MIXL" },
1896 { "Audio DSP", NULL, "DAC1 MIXR" },
1897
1898 { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
1899 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
1900 { "DAC L2 Mux", "TxDC DAC", "TxDC_DAC" },
1901 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
1902 { "DAC L2 Volume", NULL, "DAC L2 Mux" },
1903 { "DAC L2 Volume", NULL, "DAC Mono Left Filter" },
1904
1905 { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
1906 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
1907 { "DAC R2 Mux", "TxDC DAC", "TxDC_DAC" },
1908 { "DAC R2 Mux", "TxDP ADC", "TxDP_ADC" },
1909 { "DAC R2 Volume", NULL, "DAC R2 Mux" },
1910 { "DAC R2 Volume", NULL, "DAC Mono Right Filter" },
1911
1912 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1913 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
1914 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1915 { "Stereo DAC MIXL", NULL, "DAC Stereo1 Filter" },
1916 { "Stereo DAC MIXL", NULL, "DAC L1 Power" },
1917 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1918 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
1919 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1920 { "Stereo DAC MIXR", NULL, "DAC Stereo1 Filter" },
1921 { "Stereo DAC MIXR", NULL, "DAC R1 Power" },
1922
1923 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1924 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1925 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1926 { "Mono DAC MIXL", NULL, "DAC Mono Left Filter" },
1927 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1928 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1929 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1930 { "Mono DAC MIXR", NULL, "DAC Mono Right Filter" },
1931
1932 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
1933 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1934 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1935 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
1936 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1937 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1938
1939 { "DAC L1", NULL, "DAC L1 Power" },
1940 { "DAC L1", NULL, "Stereo DAC MIXL" },
1941 { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
1942 { "DAC R1", NULL, "DAC R1 Power" },
1943 { "DAC R1", NULL, "Stereo DAC MIXR" },
1944 { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
1945 { "DAC L2", NULL, "Mono DAC MIXL" },
1946 { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
1947 { "DAC R2", NULL, "Mono DAC MIXR" },
1948 { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
1949
1950 { "OUT MIXL", "BST1 Switch", "BST1" },
1951 { "OUT MIXL", "INL Switch", "INL VOL" },
1952 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
1953 { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
1954
1955 { "OUT MIXR", "BST2 Switch", "BST2" },
1956 { "OUT MIXR", "INR Switch", "INR VOL" },
1957 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
1958 { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
1959
1960 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
1961 { "HPOVOL MIXL", "INL Switch", "INL VOL" },
1962 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
1963 { "HPOVOL MIXR", "INR Switch", "INR VOL" },
1964
1965 { "DAC 2", NULL, "DAC L2" },
1966 { "DAC 2", NULL, "DAC R2" },
1967 { "DAC 1", NULL, "DAC L1" },
1968 { "DAC 1", NULL, "DAC R1" },
1969 { "HPOVOL", NULL, "HPOVOL MIXL" },
1970 { "HPOVOL", NULL, "HPOVOL MIXR" },
1971 { "HPO MIX", "DAC1 Switch", "DAC 1" },
1972 { "HPO MIX", "HPVOL Switch", "HPOVOL" },
1973
1974 { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
1975 { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
1976 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
1977 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
1978
1979 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
1980 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
1981 { "PDM1 L Mux", NULL, "PDM1 Power" },
1982 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
1983 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
1984 { "PDM1 R Mux", NULL, "PDM1 Power" },
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]1985
1986 { "HP Amp", NULL, "HPO MIX" },
1987 { "HP Amp", NULL, "Mic Det Power" },
1988 { "HPOL", NULL, "HP Amp" },
1989 { "HPOL", NULL, "HP L Amp" },
1990 { "HPOL", NULL, "Improve HP Amp Drv" },
1991 { "HPOR", NULL, "HP Amp" },
1992 { "HPOR", NULL, "HP R Amp" },
1993 { "HPOR", NULL, "Improve HP Amp Drv" },
1994
1995 { "LOUT Amp", NULL, "LOUT MIX" },
1996 { "LOUT L Playback", "Switch", "LOUT Amp" },
1997 { "LOUT R Playback", "Switch", "LOUT Amp" },
1998 { "LOUTL", NULL, "LOUT L Playback" },
1999 { "LOUTR", NULL, "LOUT R Playback" },
2000 { "LOUTL", NULL, "Improve HP Amp Drv" },
2001 { "LOUTR", NULL, "Improve HP Amp Drv" },
Bard Liao0cf18632014-11-11 17:59:50 +0800[diff] [blame]2002};
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2003
Bard Liao0cf18632014-11-11 17:59:50 +0800[diff] [blame]2004static const struct snd_soc_dapm_route rt5670_specific_dapm_routes[] = {
2005 { "PDM2 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2006 { "PDM2 L Mux", "Mono DAC", "Mono DAC MIXL" },
2007 { "PDM2 L Mux", NULL, "PDM2 Power" },
2008 { "PDM2 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2009 { "PDM2 R Mux", "Mono DAC", "Mono DAC MIXR" },
2010 { "PDM2 R Mux", NULL, "PDM2 Power" },
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2011 { "PDM1L", NULL, "PDM1 L Mux" },
2012 { "PDM1R", NULL, "PDM1 R Mux" },
2013 { "PDM2L", NULL, "PDM2 L Mux" },
2014 { "PDM2R", NULL, "PDM2 R Mux" },
2015};
2016
Bard Liao0cf18632014-11-11 17:59:50 +0800[diff] [blame]2017static const struct snd_soc_dapm_route rt5672_specific_dapm_routes[] = {
2018 { "SPO Amp", NULL, "PDM1 L Mux" },
2019 { "SPO Amp", NULL, "PDM1 R Mux" },
2020 { "SPOLP", NULL, "SPO Amp" },
2021 { "SPOLN", NULL, "SPO Amp" },
2022 { "SPORP", NULL, "SPO Amp" },
2023 { "SPORN", NULL, "SPO Amp" },
2024};
2025
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2026static int rt5670_hw_params(struct snd_pcm_substream *substream,
2027 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2028{
2029 struct snd_soc_codec *codec = dai->codec;
2030 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2031 unsigned int val_len = 0, val_clk, mask_clk;
2032 int pre_div, bclk_ms, frame_size;
2033
2034 rt5670->lrck[dai->id] = params_rate(params);
2035 pre_div = rl6231_get_clk_info(rt5670->sysclk, rt5670->lrck[dai->id]);
2036 if (pre_div < 0) {
2037 dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n",
2038 rt5670->lrck[dai->id], dai->id);
2039 return -EINVAL;
2040 }
2041 frame_size = snd_soc_params_to_frame_size(params);
2042 if (frame_size < 0) {
2043 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
2044 return -EINVAL;
2045 }
2046 bclk_ms = frame_size > 32;
2047 rt5670->bclk[dai->id] = rt5670->lrck[dai->id] * (32 << bclk_ms);
2048
2049 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2050 rt5670->bclk[dai->id], rt5670->lrck[dai->id]);
2051 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2052 bclk_ms, pre_div, dai->id);
2053
2054 switch (params_width(params)) {
2055 case 16:
2056 break;
2057 case 20:
2058 val_len |= RT5670_I2S_DL_20;
2059 break;
2060 case 24:
2061 val_len |= RT5670_I2S_DL_24;
2062 break;
2063 case 8:
2064 val_len |= RT5670_I2S_DL_8;
2065 break;
2066 default:
2067 return -EINVAL;
2068 }
2069
2070 switch (dai->id) {
2071 case RT5670_AIF1:
2072 mask_clk = RT5670_I2S_BCLK_MS1_MASK | RT5670_I2S_PD1_MASK;
2073 val_clk = bclk_ms << RT5670_I2S_BCLK_MS1_SFT |
2074 pre_div << RT5670_I2S_PD1_SFT;
2075 snd_soc_update_bits(codec, RT5670_I2S1_SDP,
2076 RT5670_I2S_DL_MASK, val_len);
2077 snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk);
2078 break;
2079 case RT5670_AIF2:
2080 mask_clk = RT5670_I2S_BCLK_MS2_MASK | RT5670_I2S_PD2_MASK;
2081 val_clk = bclk_ms << RT5670_I2S_BCLK_MS2_SFT |
2082 pre_div << RT5670_I2S_PD2_SFT;
2083 snd_soc_update_bits(codec, RT5670_I2S2_SDP,
2084 RT5670_I2S_DL_MASK, val_len);
2085 snd_soc_update_bits(codec, RT5670_ADDA_CLK1, mask_clk, val_clk);
2086 break;
2087 default:
2088 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2089 return -EINVAL;
2090 }
2091
2092 return 0;
2093}
2094
2095static int rt5670_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2096{
2097 struct snd_soc_codec *codec = dai->codec;
2098 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2099 unsigned int reg_val = 0;
2100
2101 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2102 case SND_SOC_DAIFMT_CBM_CFM:
2103 rt5670->master[dai->id] = 1;
2104 break;
2105 case SND_SOC_DAIFMT_CBS_CFS:
2106 reg_val |= RT5670_I2S_MS_S;
2107 rt5670->master[dai->id] = 0;
2108 break;
2109 default:
2110 return -EINVAL;
2111 }
2112
2113 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2114 case SND_SOC_DAIFMT_NB_NF:
2115 break;
2116 case SND_SOC_DAIFMT_IB_NF:
2117 reg_val |= RT5670_I2S_BP_INV;
2118 break;
2119 default:
2120 return -EINVAL;
2121 }
2122
2123 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2124 case SND_SOC_DAIFMT_I2S:
2125 break;
2126 case SND_SOC_DAIFMT_LEFT_J:
2127 reg_val |= RT5670_I2S_DF_LEFT;
2128 break;
2129 case SND_SOC_DAIFMT_DSP_A:
2130 reg_val |= RT5670_I2S_DF_PCM_A;
2131 break;
2132 case SND_SOC_DAIFMT_DSP_B:
2133 reg_val |= RT5670_I2S_DF_PCM_B;
2134 break;
2135 default:
2136 return -EINVAL;
2137 }
2138
2139 switch (dai->id) {
2140 case RT5670_AIF1:
2141 snd_soc_update_bits(codec, RT5670_I2S1_SDP,
2142 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
2143 RT5670_I2S_DF_MASK, reg_val);
2144 break;
2145 case RT5670_AIF2:
2146 snd_soc_update_bits(codec, RT5670_I2S2_SDP,
2147 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
2148 RT5670_I2S_DF_MASK, reg_val);
2149 break;
2150 default:
2151 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2152 return -EINVAL;
2153 }
2154 return 0;
2155}
2156
2157static int rt5670_set_dai_sysclk(struct snd_soc_dai *dai,
2158 int clk_id, unsigned int freq, int dir)
2159{
2160 struct snd_soc_codec *codec = dai->codec;
2161 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2162 unsigned int reg_val = 0;
2163
2164 if (freq == rt5670->sysclk && clk_id == rt5670->sysclk_src)
2165 return 0;
2166
2167 switch (clk_id) {
2168 case RT5670_SCLK_S_MCLK:
2169 reg_val |= RT5670_SCLK_SRC_MCLK;
2170 break;
2171 case RT5670_SCLK_S_PLL1:
2172 reg_val |= RT5670_SCLK_SRC_PLL1;
2173 break;
2174 case RT5670_SCLK_S_RCCLK:
2175 reg_val |= RT5670_SCLK_SRC_RCCLK;
2176 break;
2177 default:
2178 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
2179 return -EINVAL;
2180 }
2181 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2182 RT5670_SCLK_SRC_MASK, reg_val);
2183 rt5670->sysclk = freq;
2184 rt5670->sysclk_src = clk_id;
2185
2186 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
2187
2188 return 0;
2189}
2190
2191static int rt5670_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2192 unsigned int freq_in, unsigned int freq_out)
2193{
2194 struct snd_soc_codec *codec = dai->codec;
2195 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2196 struct rl6231_pll_code pll_code;
2197 int ret;
2198
2199 if (source == rt5670->pll_src && freq_in == rt5670->pll_in &&
2200 freq_out == rt5670->pll_out)
2201 return 0;
2202
2203 if (!freq_in || !freq_out) {
2204 dev_dbg(codec->dev, "PLL disabled\n");
2205
2206 rt5670->pll_in = 0;
2207 rt5670->pll_out = 0;
2208 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2209 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_MCLK);
2210 return 0;
2211 }
2212
2213 switch (source) {
2214 case RT5670_PLL1_S_MCLK:
2215 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2216 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_MCLK);
2217 break;
2218 case RT5670_PLL1_S_BCLK1:
2219 case RT5670_PLL1_S_BCLK2:
2220 case RT5670_PLL1_S_BCLK3:
2221 case RT5670_PLL1_S_BCLK4:
2222 switch (dai->id) {
2223 case RT5670_AIF1:
2224 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2225 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK1);
2226 break;
2227 case RT5670_AIF2:
2228 snd_soc_update_bits(codec, RT5670_GLB_CLK,
2229 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK2);
2230 break;
2231 default:
2232 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2233 return -EINVAL;
2234 }
2235 break;
2236 default:
2237 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2238 return -EINVAL;
2239 }
2240
2241 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2242 if (ret < 0) {
2243 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2244 return ret;
2245 }
2246
2247 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
2248 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2249 pll_code.n_code, pll_code.k_code);
2250
2251 snd_soc_write(codec, RT5670_PLL_CTRL1,
2252 pll_code.n_code << RT5670_PLL_N_SFT | pll_code.k_code);
2253 snd_soc_write(codec, RT5670_PLL_CTRL2,
2254 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5670_PLL_M_SFT |
2255 pll_code.m_bp << RT5670_PLL_M_BP_SFT);
2256
2257 rt5670->pll_in = freq_in;
2258 rt5670->pll_out = freq_out;
2259 rt5670->pll_src = source;
2260
2261 return 0;
2262}
2263
2264static int rt5670_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2265 unsigned int rx_mask, int slots, int slot_width)
2266{
2267 struct snd_soc_codec *codec = dai->codec;
2268 unsigned int val = 0;
2269
2270 if (rx_mask || tx_mask)
2271 val |= (1 << 14);
2272
2273 switch (slots) {
2274 case 4:
2275 val |= (1 << 12);
2276 break;
2277 case 6:
2278 val |= (2 << 12);
2279 break;
2280 case 8:
2281 val |= (3 << 12);
2282 break;
2283 case 2:
2284 break;
2285 default:
2286 return -EINVAL;
2287 }
2288
2289 switch (slot_width) {
2290 case 20:
2291 val |= (1 << 10);
2292 break;
2293 case 24:
2294 val |= (2 << 10);
2295 break;
2296 case 32:
2297 val |= (3 << 10);
2298 break;
2299 case 16:
2300 break;
2301 default:
2302 return -EINVAL;
2303 }
2304
2305 snd_soc_update_bits(codec, RT5670_TDM_CTRL_1, 0x7c00, val);
2306
2307 return 0;
2308}
2309
2310static int rt5670_set_bias_level(struct snd_soc_codec *codec,
2311 enum snd_soc_bias_level level)
2312{
Bard Liao044b7242014-11-12 19:54:30 +0800[diff] [blame^]2313 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2314
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2315 switch (level) {
2316 case SND_SOC_BIAS_PREPARE:
2317 if (SND_SOC_BIAS_STANDBY == codec->dapm.bias_level) {
2318 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2319 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2320 RT5670_PWR_BG | RT5670_PWR_VREF2,
2321 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2322 RT5670_PWR_BG | RT5670_PWR_VREF2);
2323 mdelay(10);
2324 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2325 RT5670_PWR_FV1 | RT5670_PWR_FV2,
2326 RT5670_PWR_FV1 | RT5670_PWR_FV2);
2327 snd_soc_update_bits(codec, RT5670_CHARGE_PUMP,
2328 RT5670_OSW_L_MASK | RT5670_OSW_R_MASK,
2329 RT5670_OSW_L_DIS | RT5670_OSW_R_DIS);
2330 snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x1);
2331 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2332 RT5670_LDO_SEL_MASK, 0x3);
2333 }
2334 break;
2335 case SND_SOC_BIAS_STANDBY:
Bard Liao044b7242014-11-12 19:54:30 +0800[diff] [blame^]2336 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2337 RT5670_PWR_VREF1 | RT5670_PWR_VREF2 |
2338 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2339 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2340 RT5670_LDO_SEL_MASK, 0x1);
2341 break;
Bard Liao044b7242014-11-12 19:54:30 +0800[diff] [blame^]2342 case SND_SOC_BIAS_OFF:
2343 if (rt5670->pdata.jd_mode)
2344 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2345 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2346 RT5670_PWR_BG | RT5670_PWR_VREF2 |
2347 RT5670_PWR_FV1 | RT5670_PWR_FV2,
2348 RT5670_PWR_MB | RT5670_PWR_BG);
2349 else
2350 snd_soc_update_bits(codec, RT5670_PWR_ANLG1,
2351 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2352 RT5670_PWR_BG | RT5670_PWR_VREF2 |
2353 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
2354
2355 snd_soc_update_bits(codec, RT5670_DIG_MISC, 0x1, 0x0);
2356 break;
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2357
2358 default:
2359 break;
2360 }
2361 codec->dapm.bias_level = level;
2362
2363 return 0;
2364}
2365
2366static int rt5670_probe(struct snd_soc_codec *codec)
2367{
2368 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2369
Bard Liao0cf18632014-11-11 17:59:50 +0800[diff] [blame]2370 switch (snd_soc_read(codec, RT5670_RESET) & RT5670_ID_MASK) {
2371 case RT5670_ID_5670:
2372 case RT5670_ID_5671:
2373 snd_soc_dapm_new_controls(&codec->dapm,
2374 rt5670_specific_dapm_widgets,
2375 ARRAY_SIZE(rt5670_specific_dapm_widgets));
2376 snd_soc_dapm_add_routes(&codec->dapm,
2377 rt5670_specific_dapm_routes,
2378 ARRAY_SIZE(rt5670_specific_dapm_routes));
2379 break;
2380 case RT5670_ID_5672:
2381 snd_soc_dapm_new_controls(&codec->dapm,
2382 rt5672_specific_dapm_widgets,
2383 ARRAY_SIZE(rt5672_specific_dapm_widgets));
2384 snd_soc_dapm_add_routes(&codec->dapm,
2385 rt5672_specific_dapm_routes,
2386 ARRAY_SIZE(rt5672_specific_dapm_routes));
2387 break;
2388 default:
2389 dev_err(codec->dev,
2390 "The driver is for RT5670 RT5671 or RT5672 only\n");
2391 return -ENODEV;
2392 }
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2393 rt5670->codec = codec;
2394
2395 return 0;
2396}
2397
2398static int rt5670_remove(struct snd_soc_codec *codec)
2399{
2400 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2401
2402 regmap_write(rt5670->regmap, RT5670_RESET, 0);
2403 return 0;
2404}
2405
2406#ifdef CONFIG_PM
2407static int rt5670_suspend(struct snd_soc_codec *codec)
2408{
2409 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2410
2411 regcache_cache_only(rt5670->regmap, true);
2412 regcache_mark_dirty(rt5670->regmap);
2413 return 0;
2414}
2415
2416static int rt5670_resume(struct snd_soc_codec *codec)
2417{
2418 struct rt5670_priv *rt5670 = snd_soc_codec_get_drvdata(codec);
2419
2420 regcache_cache_only(rt5670->regmap, false);
2421 regcache_sync(rt5670->regmap);
2422
2423 return 0;
2424}
2425#else
2426#define rt5670_suspend NULL
2427#define rt5670_resume NULL
2428#endif
2429
2430#define RT5670_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2431#define RT5670_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2432 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2433
Mark Brownff62b952014-08-01 17:22:19 +0100[diff] [blame]2434static struct snd_soc_dai_ops rt5670_aif_dai_ops = {
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2435 .hw_params = rt5670_hw_params,
2436 .set_fmt = rt5670_set_dai_fmt,
2437 .set_sysclk = rt5670_set_dai_sysclk,
2438 .set_tdm_slot = rt5670_set_tdm_slot,
2439 .set_pll = rt5670_set_dai_pll,
2440};
2441
Mark Brownff62b952014-08-01 17:22:19 +0100[diff] [blame]2442static struct snd_soc_dai_driver rt5670_dai[] = {
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2443 {
2444 .name = "rt5670-aif1",
2445 .id = RT5670_AIF1,
2446 .playback = {
2447 .stream_name = "AIF1 Playback",
2448 .channels_min = 1,
2449 .channels_max = 2,
2450 .rates = RT5670_STEREO_RATES,
2451 .formats = RT5670_FORMATS,
2452 },
2453 .capture = {
2454 .stream_name = "AIF1 Capture",
2455 .channels_min = 1,
2456 .channels_max = 2,
2457 .rates = RT5670_STEREO_RATES,
2458 .formats = RT5670_FORMATS,
2459 },
2460 .ops = &rt5670_aif_dai_ops,
2461 },
2462 {
2463 .name = "rt5670-aif2",
2464 .id = RT5670_AIF2,
2465 .playback = {
2466 .stream_name = "AIF2 Playback",
2467 .channels_min = 1,
2468 .channels_max = 2,
2469 .rates = RT5670_STEREO_RATES,
2470 .formats = RT5670_FORMATS,
2471 },
2472 .capture = {
2473 .stream_name = "AIF2 Capture",
2474 .channels_min = 1,
2475 .channels_max = 2,
2476 .rates = RT5670_STEREO_RATES,
2477 .formats = RT5670_FORMATS,
2478 },
2479 .ops = &rt5670_aif_dai_ops,
2480 },
2481};
2482
2483static struct snd_soc_codec_driver soc_codec_dev_rt5670 = {
2484 .probe = rt5670_probe,
2485 .remove = rt5670_remove,
2486 .suspend = rt5670_suspend,
2487 .resume = rt5670_resume,
2488 .set_bias_level = rt5670_set_bias_level,
2489 .idle_bias_off = true,
2490 .controls = rt5670_snd_controls,
2491 .num_controls = ARRAY_SIZE(rt5670_snd_controls),
2492 .dapm_widgets = rt5670_dapm_widgets,
2493 .num_dapm_widgets = ARRAY_SIZE(rt5670_dapm_widgets),
2494 .dapm_routes = rt5670_dapm_routes,
2495 .num_dapm_routes = ARRAY_SIZE(rt5670_dapm_routes),
2496};
2497
2498static const struct regmap_config rt5670_regmap = {
2499 .reg_bits = 8,
2500 .val_bits = 16,
2501 .max_register = RT5670_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5670_ranges) *
2502 RT5670_PR_SPACING),
2503 .volatile_reg = rt5670_volatile_register,
2504 .readable_reg = rt5670_readable_register,
2505 .cache_type = REGCACHE_RBTREE,
2506 .reg_defaults = rt5670_reg,
2507 .num_reg_defaults = ARRAY_SIZE(rt5670_reg),
2508 .ranges = rt5670_ranges,
2509 .num_ranges = ARRAY_SIZE(rt5670_ranges),
2510};
2511
2512static const struct i2c_device_id rt5670_i2c_id[] = {
2513 { "rt5670", 0 },
Bard Liao0cf18632014-11-11 17:59:50 +0800[diff] [blame]2514 { "rt5671", 0 },
2515 { "rt5672", 0 },
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2516 { }
2517};
2518MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id);
2519
Mengdong Lin06058152014-11-14 15:51:34 +0800[diff] [blame]2520#ifdef CONFIG_ACPI
2521static struct acpi_device_id rt5670_acpi_match[] = {
2522 { "10EC5670", 0},
2523 { },
2524};
2525MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match);
2526#endif
2527
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2528static int rt5670_i2c_probe(struct i2c_client *i2c,
2529 const struct i2c_device_id *id)
2530{
2531 struct rt5670_platform_data *pdata = dev_get_platdata(&i2c->dev);
2532 struct rt5670_priv *rt5670;
2533 int ret;
2534 unsigned int val;
2535
2536 rt5670 = devm_kzalloc(&i2c->dev,
2537 sizeof(struct rt5670_priv),
2538 GFP_KERNEL);
2539 if (NULL == rt5670)
2540 return -ENOMEM;
2541
2542 i2c_set_clientdata(i2c, rt5670);
2543
2544 if (pdata)
2545 rt5670->pdata = *pdata;
2546
2547 rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap);
2548 if (IS_ERR(rt5670->regmap)) {
2549 ret = PTR_ERR(rt5670->regmap);
2550 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2551 ret);
2552 return ret;
2553 }
2554
2555 regmap_read(rt5670->regmap, RT5670_VENDOR_ID2, &val);
2556 if (val != RT5670_DEVICE_ID) {
2557 dev_err(&i2c->dev,
2558 "Device with ID register %x is not rt5670/72\n", val);
2559 return -ENODEV;
2560 }
2561
2562 regmap_write(rt5670->regmap, RT5670_RESET, 0);
2563 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
2564 RT5670_PWR_HP_L | RT5670_PWR_HP_R |
2565 RT5670_PWR_VREF2, RT5670_PWR_VREF2);
2566 msleep(100);
2567
2568 regmap_write(rt5670->regmap, RT5670_RESET, 0);
2569
2570 ret = regmap_register_patch(rt5670->regmap, init_list,
2571 ARRAY_SIZE(init_list));
2572 if (ret != 0)
2573 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2574
2575 if (rt5670->pdata.in2_diff)
2576 regmap_update_bits(rt5670->regmap, RT5670_IN2,
2577 RT5670_IN_DF2, RT5670_IN_DF2);
2578
2579 if (i2c->irq) {
2580 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2581 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ);
2582 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
2583 RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT);
2584
2585 }
2586
2587 if (rt5670->pdata.jd_mode) {
2588 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
2589 RT5670_PWR_MB, RT5670_PWR_MB);
2590 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2,
2591 RT5670_PWR_JD1, RT5670_PWR_JD1);
2592 regmap_update_bits(rt5670->regmap, RT5670_IRQ_CTRL1,
2593 RT5670_JD1_1_EN_MASK, RT5670_JD1_1_EN);
2594 regmap_update_bits(rt5670->regmap, RT5670_JD_CTRL3,
2595 RT5670_JD_TRI_CBJ_SEL_MASK |
2596 RT5670_JD_TRI_HPO_SEL_MASK,
2597 RT5670_JD_CBJ_JD1_1 | RT5670_JD_HPO_JD1_1);
2598 switch (rt5670->pdata.jd_mode) {
2599 case 1:
2600 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
2601 RT5670_JD1_MODE_MASK,
2602 RT5670_JD1_MODE_0);
2603 break;
2604 case 2:
2605 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
2606 RT5670_JD1_MODE_MASK,
2607 RT5670_JD1_MODE_1);
2608 break;
2609 case 3:
2610 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
2611 RT5670_JD1_MODE_MASK,
2612 RT5670_JD1_MODE_2);
2613 break;
2614 default:
2615 break;
2616 }
2617 }
2618
2619 if (rt5670->pdata.dmic_en) {
2620 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2621 RT5670_GP2_PIN_MASK,
2622 RT5670_GP2_PIN_DMIC1_SCL);
2623
2624 switch (rt5670->pdata.dmic1_data_pin) {
2625 case RT5670_DMIC_DATA_IN2P:
2626 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2627 RT5670_DMIC_1_DP_MASK,
2628 RT5670_DMIC_1_DP_IN2P);
2629 break;
2630
2631 case RT5670_DMIC_DATA_GPIO6:
2632 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2633 RT5670_DMIC_1_DP_MASK,
2634 RT5670_DMIC_1_DP_GPIO6);
2635 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2636 RT5670_GP6_PIN_MASK,
2637 RT5670_GP6_PIN_DMIC1_SDA);
2638 break;
2639
2640 case RT5670_DMIC_DATA_GPIO7:
2641 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2642 RT5670_DMIC_1_DP_MASK,
2643 RT5670_DMIC_1_DP_GPIO7);
2644 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2645 RT5670_GP7_PIN_MASK,
2646 RT5670_GP7_PIN_DMIC1_SDA);
2647 break;
2648
2649 default:
2650 break;
2651 }
2652
2653 switch (rt5670->pdata.dmic2_data_pin) {
2654 case RT5670_DMIC_DATA_IN3N:
2655 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2656 RT5670_DMIC_2_DP_MASK,
2657 RT5670_DMIC_2_DP_IN3N);
2658 break;
2659
2660 case RT5670_DMIC_DATA_GPIO8:
2661 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
2662 RT5670_DMIC_2_DP_MASK,
2663 RT5670_DMIC_2_DP_GPIO8);
2664 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2665 RT5670_GP8_PIN_MASK,
2666 RT5670_GP8_PIN_DMIC2_SDA);
2667 break;
2668
2669 default:
2670 break;
2671 }
2672
2673 switch (rt5670->pdata.dmic3_data_pin) {
2674 case RT5670_DMIC_DATA_GPIO5:
2675 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL2,
2676 RT5670_DMIC_3_DP_MASK,
2677 RT5670_DMIC_3_DP_GPIO5);
2678 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
2679 RT5670_GP5_PIN_MASK,
2680 RT5670_GP5_PIN_DMIC3_SDA);
2681 break;
2682
2683 case RT5670_DMIC_DATA_GPIO9:
2684 case RT5670_DMIC_DATA_GPIO10:
2685 dev_err(&i2c->dev,
2686 "Always use GPIO5 as DMIC3 data pin\n");
2687 break;
2688
2689 default:
2690 break;
2691 }
2692
2693 }
2694
2695 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5670,
2696 rt5670_dai, ARRAY_SIZE(rt5670_dai));
2697 if (ret < 0)
2698 goto err;
2699
2700 return 0;
2701err:
2702 return ret;
2703}
2704
2705static int rt5670_i2c_remove(struct i2c_client *i2c)
2706{
2707 snd_soc_unregister_codec(&i2c->dev);
2708
2709 return 0;
2710}
2711
Mark Brownff62b952014-08-01 17:22:19 +0100[diff] [blame]2712static struct i2c_driver rt5670_i2c_driver = {
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2713 .driver = {
2714 .name = "rt5670",
2715 .owner = THIS_MODULE,
Mengdong Lin06058152014-11-14 15:51:34 +0800[diff] [blame]2716 .acpi_match_table = ACPI_PTR(rt5670_acpi_match),
Bard Liao5e8351d2014-06-30 20:31:13 +0800[diff] [blame]2717 },
2718 .probe = rt5670_i2c_probe,
2719 .remove = rt5670_i2c_remove,
2720 .id_table = rt5670_i2c_id,
2721};
2722
2723module_i2c_driver(rt5670_i2c_driver);
2724
2725MODULE_DESCRIPTION("ASoC RT5670 driver");
2726MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
2727MODULE_LICENSE("GPL v2");