blob: da7b9887ec488a575276d2cb1d7e2558c9ce723d [file] [log] [blame]
Erich Chen1c57e862006-07-12 08:59:32 -07001/*
2*******************************************************************************
3** O.S : Linux
4** FILE NAME : arcmsr_hba.c
NickCheng97b99122011-01-06 17:32:41 +08005** BY : Nick Cheng
Erich Chen1c57e862006-07-12 08:59:32 -07006** Description: SCSI RAID Device Driver for
7** ARECA RAID Host adapter
8*******************************************************************************
9** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved
10**
11** Web site: www.areca.com.tw
Nick Cheng1a4f5502007-09-13 17:26:40 +080012** E-mail: support@areca.com.tw
Erich Chen1c57e862006-07-12 08:59:32 -070013**
14** This program is free software; you can redistribute it and/or modify
15** it under the terms of the GNU General Public License version 2 as
16** published by the Free Software Foundation.
17** This program is distributed in the hope that it will be useful,
18** but WITHOUT ANY WARRANTY; without even the implied warranty of
19** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20** GNU General Public License for more details.
21*******************************************************************************
22** Redistribution and use in source and binary forms, with or without
23** modification, are permitted provided that the following conditions
24** are met:
25** 1. Redistributions of source code must retain the above copyright
26** notice, this list of conditions and the following disclaimer.
27** 2. Redistributions in binary form must reproduce the above copyright
28** notice, this list of conditions and the following disclaimer in the
29** documentation and/or other materials provided with the distribution.
30** 3. The name of the author may not be used to endorse or promote products
31** derived from this software without specific prior written permission.
32**
33** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
34** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
35** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
36** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
37** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
38** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
39** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
40** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
41** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
42** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43*******************************************************************************
44** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
45** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt
46*******************************************************************************
47*/
48#include <linux/module.h>
49#include <linux/reboot.h>
50#include <linux/spinlock.h>
51#include <linux/pci_ids.h>
52#include <linux/interrupt.h>
53#include <linux/moduleparam.h>
54#include <linux/errno.h>
55#include <linux/types.h>
56#include <linux/delay.h>
57#include <linux/dma-mapping.h>
58#include <linux/timer.h>
David Millera7c89622010-08-16 21:20:07 -070059#include <linux/slab.h>
Erich Chen1c57e862006-07-12 08:59:32 -070060#include <linux/pci.h>
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +080061#include <linux/aer.h>
Erich Chen1c57e862006-07-12 08:59:32 -070062#include <asm/dma.h>
63#include <asm/io.h>
64#include <asm/system.h>
65#include <asm/uaccess.h>
66#include <scsi/scsi_host.h>
67#include <scsi/scsi.h>
68#include <scsi/scsi_cmnd.h>
69#include <scsi/scsi_tcq.h>
70#include <scsi/scsi_device.h>
71#include <scsi/scsi_transport.h>
72#include <scsi/scsicam.h>
73#include "arcmsr.h"
Nick Chengae52e7f02010-06-18 15:39:12 +080074MODULE_AUTHOR("Nick Cheng <support@areca.com.tw>");
Nick Chengcdd3cb12010-07-13 20:03:04 +080075MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/16xx/1880) SATA/SAS RAID Host Bus Adapter");
Erich Chen1c57e862006-07-12 08:59:32 -070076MODULE_LICENSE("Dual BSD/GPL");
77MODULE_VERSION(ARCMSR_DRIVER_VERSION);
Nick Chengcdd3cb12010-07-13 20:03:04 +080078static int sleeptime = 10;
NickCheng97b99122011-01-06 17:32:41 +080079static int retrycount = 12;
Nick Chengae52e7f02010-06-18 15:39:12 +080080wait_queue_head_t wait_q;
Nick Cheng1a4f5502007-09-13 17:26:40 +080081static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
82 struct scsi_cmnd *cmd);
83static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
Erich Chen1c57e862006-07-12 08:59:32 -070084static int arcmsr_abort(struct scsi_cmnd *);
85static int arcmsr_bus_reset(struct scsi_cmnd *);
86static int arcmsr_bios_param(struct scsi_device *sdev,
Nick Cheng1a4f5502007-09-13 17:26:40 +080087 struct block_device *bdev, sector_t capacity, int *info);
Jeff Garzikf2812332010-11-16 02:10:29 -050088static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
Erich Chen1c57e862006-07-12 08:59:32 -070089static int arcmsr_probe(struct pci_dev *pdev,
90 const struct pci_device_id *id);
91static void arcmsr_remove(struct pci_dev *pdev);
92static void arcmsr_shutdown(struct pci_dev *pdev);
93static void arcmsr_iop_init(struct AdapterControlBlock *acb);
94static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +080095static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
Erich Chen1c57e862006-07-12 08:59:32 -070096static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +080097static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb);
98static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb);
Nick Cheng36b83de2010-05-17 11:22:42 +080099static void arcmsr_request_device_map(unsigned long pacb);
100static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb);
101static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800102static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb);
Nick Cheng36b83de2010-05-17 11:22:42 +0800103static void arcmsr_message_isr_bh_fn(struct work_struct *work);
Nick Chengae52e7f02010-06-18 15:39:12 +0800104static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
Nick Cheng36b83de2010-05-17 11:22:42 +0800105static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800106static void arcmsr_hbc_message_isr(struct AdapterControlBlock *pACB);
107static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700108static const char *arcmsr_info(struct Scsi_Host *);
109static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800110static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev,
Mike Christiee881a172009-10-15 17:46:39 -0700111 int queue_depth, int reason)
Erich Chen1c57e862006-07-12 08:59:32 -0700112{
Mike Christiee881a172009-10-15 17:46:39 -0700113 if (reason != SCSI_QDEPTH_DEFAULT)
114 return -EOPNOTSUPP;
115
Erich Chen1c57e862006-07-12 08:59:32 -0700116 if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
117 queue_depth = ARCMSR_MAX_CMD_PERLUN;
118 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth);
119 return queue_depth;
120}
121
122static struct scsi_host_template arcmsr_scsi_host_template = {
123 .module = THIS_MODULE,
Nick Chengcdd3cb12010-07-13 20:03:04 +0800124 .name = "ARCMSR ARECA SATA/SAS RAID Controller"
125 ARCMSR_DRIVER_VERSION,
Erich Chen1c57e862006-07-12 08:59:32 -0700126 .info = arcmsr_info,
127 .queuecommand = arcmsr_queue_command,
Nick Chengcdd3cb12010-07-13 20:03:04 +0800128 .eh_abort_handler = arcmsr_abort,
Erich Chen1c57e862006-07-12 08:59:32 -0700129 .eh_bus_reset_handler = arcmsr_bus_reset,
130 .bios_param = arcmsr_bios_param,
131 .change_queue_depth = arcmsr_adjust_disk_queue_depth,
Nick Chengae52e7f02010-06-18 15:39:12 +0800132 .can_queue = ARCMSR_MAX_FREECCB_NUM,
Nick Chengcdd3cb12010-07-13 20:03:04 +0800133 .this_id = ARCMSR_SCSI_INITIATOR_ID,
134 .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES,
135 .max_sectors = ARCMSR_MAX_XFER_SECTORS_C,
Erich Chen1c57e862006-07-12 08:59:32 -0700136 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN,
137 .use_clustering = ENABLE_CLUSTERING,
138 .shost_attrs = arcmsr_host_attrs,
139};
Erich Chen1c57e862006-07-12 08:59:32 -0700140static struct pci_device_id arcmsr_device_id_table[] = {
141 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)},
142 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)},
143 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)},
144 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)},
145 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)},
Nick Cheng1a4f5502007-09-13 17:26:40 +0800146 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)},
147 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)},
148 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)},
Erich Chen1c57e862006-07-12 08:59:32 -0700149 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)},
150 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)},
151 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)},
152 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)},
153 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)},
154 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)},
155 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)},
156 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)},
157 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)},
158 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)},
Nick Chengae52e7f02010-06-18 15:39:12 +0800159 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880)},
Erich Chen1c57e862006-07-12 08:59:32 -0700160 {0, 0}, /* Terminating entry */
161};
162MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
163static struct pci_driver arcmsr_pci_driver = {
164 .name = "arcmsr",
Nick Chengcdd3cb12010-07-13 20:03:04 +0800165 .id_table = arcmsr_device_id_table,
Erich Chen1c57e862006-07-12 08:59:32 -0700166 .probe = arcmsr_probe,
167 .remove = arcmsr_remove,
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +0800168 .shutdown = arcmsr_shutdown,
Erich Chen1c57e862006-07-12 08:59:32 -0700169};
Nick Chengcdd3cb12010-07-13 20:03:04 +0800170/*
171****************************************************************************
172****************************************************************************
173*/
174int arcmsr_sleep_for_bus_reset(struct scsi_cmnd *cmd)
175{
176 struct Scsi_Host *shost = NULL;
177 int i, isleep;
178 shost = cmd->device->host;
179 isleep = sleeptime / 10;
180 if (isleep > 0) {
181 for (i = 0; i < isleep; i++) {
182 msleep(10000);
183 }
184 }
Erich Chen1c57e862006-07-12 08:59:32 -0700185
Nick Chengcdd3cb12010-07-13 20:03:04 +0800186 isleep = sleeptime % 10;
187 if (isleep > 0) {
188 msleep(isleep*1000);
189 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800190 return 0;
191}
192
193static void arcmsr_free_hbb_mu(struct AdapterControlBlock *acb)
Nick Chengae52e7f02010-06-18 15:39:12 +0800194{
195 switch (acb->adapter_type) {
196 case ACB_ADAPTER_TYPE_A:
Nick Chengcdd3cb12010-07-13 20:03:04 +0800197 case ACB_ADAPTER_TYPE_C:
Nick Chengae52e7f02010-06-18 15:39:12 +0800198 break;
199 case ACB_ADAPTER_TYPE_B:{
Nick Chengcdd3cb12010-07-13 20:03:04 +0800200 dma_free_coherent(&acb->pdev->dev,
201 sizeof(struct MessageUnit_B),
202 acb->pmuB, acb->dma_coherent_handle_hbb_mu);
Nick Chengae52e7f02010-06-18 15:39:12 +0800203 }
204 }
205}
206
207static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
208{
209 struct pci_dev *pdev = acb->pdev;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800210 switch (acb->adapter_type){
Nick Chengae52e7f02010-06-18 15:39:12 +0800211 case ACB_ADAPTER_TYPE_A:{
Nick Chengcdd3cb12010-07-13 20:03:04 +0800212 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0));
Nick Chengae52e7f02010-06-18 15:39:12 +0800213 if (!acb->pmuA) {
214 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
215 return false;
216 }
217 break;
218 }
219 case ACB_ADAPTER_TYPE_B:{
220 void __iomem *mem_base0, *mem_base1;
221 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
222 if (!mem_base0) {
223 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
224 return false;
225 }
226 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
227 if (!mem_base1) {
228 iounmap(mem_base0);
229 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
230 return false;
231 }
232 acb->mem_base0 = mem_base0;
233 acb->mem_base1 = mem_base1;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800234 break;
235 }
236 case ACB_ADAPTER_TYPE_C:{
237 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
238 if (!acb->pmuC) {
239 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
240 return false;
241 }
242 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
243 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/
244 return true;
245 }
246 break;
Nick Chengae52e7f02010-06-18 15:39:12 +0800247 }
248 }
249 return true;
250}
251
252static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
253{
254 switch (acb->adapter_type) {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800255 case ACB_ADAPTER_TYPE_A:{
256 iounmap(acb->pmuA);
257 }
258 break;
259 case ACB_ADAPTER_TYPE_B:{
260 iounmap(acb->mem_base0);
261 iounmap(acb->mem_base1);
262 }
263
264 break;
265 case ACB_ADAPTER_TYPE_C:{
266 iounmap(acb->pmuC);
267 }
Nick Chengae52e7f02010-06-18 15:39:12 +0800268 }
269}
270
David Howells7d12e782006-10-05 14:55:46 +0100271static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
Erich Chen1c57e862006-07-12 08:59:32 -0700272{
273 irqreturn_t handle_state;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800274 struct AdapterControlBlock *acb = dev_id;
Erich Chen1c57e862006-07-12 08:59:32 -0700275
Erich Chen1c57e862006-07-12 08:59:32 -0700276 handle_state = arcmsr_interrupt(acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700277 return handle_state;
278}
279
280static int arcmsr_bios_param(struct scsi_device *sdev,
281 struct block_device *bdev, sector_t capacity, int *geom)
282{
283 int ret, heads, sectors, cylinders, total_capacity;
284 unsigned char *buffer;/* return copy of block device's partition table */
285
286 buffer = scsi_bios_ptable(bdev);
287 if (buffer) {
288 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
289 kfree(buffer);
290 if (ret != -1)
291 return ret;
292 }
293 total_capacity = capacity;
294 heads = 64;
295 sectors = 32;
296 cylinders = total_capacity / (heads * sectors);
297 if (cylinders > 1024) {
298 heads = 255;
299 sectors = 63;
300 cylinders = total_capacity / (heads * sectors);
301 }
302 geom[0] = heads;
303 geom[1] = sectors;
304 geom[2] = cylinders;
305 return 0;
306}
307
Nick Cheng1a4f5502007-09-13 17:26:40 +0800308static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -0700309{
310 struct pci_dev *pdev = acb->pdev;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800311 u16 dev_id;
312 pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
Nick Chengae52e7f02010-06-18 15:39:12 +0800313 acb->dev_id = dev_id;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800314 switch (dev_id) {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800315 case 0x1880: {
316 acb->adapter_type = ACB_ADAPTER_TYPE_C;
317 }
318 break;
319 case 0x1201: {
Nick Cheng1a4f5502007-09-13 17:26:40 +0800320 acb->adapter_type = ACB_ADAPTER_TYPE_B;
321 }
322 break;
Erich Chen1c57e862006-07-12 08:59:32 -0700323
Nick Chengcdd3cb12010-07-13 20:03:04 +0800324 default: acb->adapter_type = ACB_ADAPTER_TYPE_A;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800325 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800326}
Nick Cheng1a4f5502007-09-13 17:26:40 +0800327
Nick Chengae52e7f02010-06-18 15:39:12 +0800328static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800329{
Nick Chengae52e7f02010-06-18 15:39:12 +0800330 struct MessageUnit_A __iomem *reg = acb->pmuA;
331 uint32_t Index;
332 uint8_t Retries = 0x00;
Nick Chengae52e7f02010-06-18 15:39:12 +0800333 do {
334 for (Index = 0; Index < 100; Index++) {
335 if (readl(&reg->outbound_intstatus) &
336 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
337 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
338 &reg->outbound_intstatus);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800339 return true;
Nick Chengae52e7f02010-06-18 15:39:12 +0800340 }
341 msleep(10);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800342 }/*max 1 seconds*/
Nick Chengae52e7f02010-06-18 15:39:12 +0800343
344 } while (Retries++ < 20);/*max 20 sec*/
Nick Chengcdd3cb12010-07-13 20:03:04 +0800345 return false;
Nick Chengae52e7f02010-06-18 15:39:12 +0800346}
347
348static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb)
349{
350 struct MessageUnit_B *reg = acb->pmuB;
351 uint32_t Index;
352 uint8_t Retries = 0x00;
Nick Chengae52e7f02010-06-18 15:39:12 +0800353 do {
354 for (Index = 0; Index < 100; Index++) {
355 if (readl(reg->iop2drv_doorbell)
356 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
357 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN
358 , reg->iop2drv_doorbell);
359 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800360 return true;
Nick Chengae52e7f02010-06-18 15:39:12 +0800361 }
362 msleep(10);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800363 }/*max 1 seconds*/
Nick Chengae52e7f02010-06-18 15:39:12 +0800364
365 } while (Retries++ < 20);/*max 20 sec*/
Nick Chengcdd3cb12010-07-13 20:03:04 +0800366 return false;
Nick Chengae52e7f02010-06-18 15:39:12 +0800367}
368
Nick Chengcdd3cb12010-07-13 20:03:04 +0800369static uint8_t arcmsr_hbc_wait_msgint_ready(struct AdapterControlBlock *pACB)
370{
371 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
372 unsigned char Retries = 0x00;
373 uint32_t Index;
374 do {
375 for (Index = 0; Index < 100; Index++) {
376 if (readl(&phbcmu->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
377 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &phbcmu->outbound_doorbell_clear);/*clear interrupt*/
378 return true;
379 }
380 /* one us delay */
381 msleep(10);
382 } /*max 1 seconds*/
383 } while (Retries++ < 20); /*max 20 sec*/
384 return false;
385}
Nick Chengae52e7f02010-06-18 15:39:12 +0800386static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb)
387{
388 struct MessageUnit_A __iomem *reg = acb->pmuA;
389 int retry_count = 30;
Nick Chengae52e7f02010-06-18 15:39:12 +0800390 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
391 do {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800392 if (arcmsr_hba_wait_msgint_ready(acb))
Nick Chengae52e7f02010-06-18 15:39:12 +0800393 break;
394 else {
395 retry_count--;
396 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
397 timeout, retry count down = %d \n", acb->host->host_no, retry_count);
398 }
399 } while (retry_count != 0);
400}
401
402static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb)
403{
404 struct MessageUnit_B *reg = acb->pmuB;
405 int retry_count = 30;
Nick Chengae52e7f02010-06-18 15:39:12 +0800406 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
407 do {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800408 if (arcmsr_hbb_wait_msgint_ready(acb))
Nick Chengae52e7f02010-06-18 15:39:12 +0800409 break;
410 else {
411 retry_count--;
412 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
413 timeout,retry count down = %d \n", acb->host->host_no, retry_count);
414 }
415 } while (retry_count != 0);
416}
417
Nick Chengcdd3cb12010-07-13 20:03:04 +0800418static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *pACB)
419{
420 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
421 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
422 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
423 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
424 do {
425 if (arcmsr_hbc_wait_msgint_ready(pACB)) {
426 break;
427 } else {
428 retry_count--;
429 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
430 timeout,retry count down = %d \n", pACB->host->host_no, retry_count);
431 }
432 } while (retry_count != 0);
433 return;
434}
Nick Chengae52e7f02010-06-18 15:39:12 +0800435static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
436{
Nick Cheng1a4f5502007-09-13 17:26:40 +0800437 switch (acb->adapter_type) {
438
439 case ACB_ADAPTER_TYPE_A: {
Nick Chengae52e7f02010-06-18 15:39:12 +0800440 arcmsr_flush_hba_cache(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800441 }
442 break;
443
444 case ACB_ADAPTER_TYPE_B: {
Nick Chengae52e7f02010-06-18 15:39:12 +0800445 arcmsr_flush_hbb_cache(acb);
446 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800447 break;
448 case ACB_ADAPTER_TYPE_C: {
449 arcmsr_flush_hbc_cache(acb);
450 }
Nick Chengae52e7f02010-06-18 15:39:12 +0800451 }
452}
Nick Cheng1a4f5502007-09-13 17:26:40 +0800453
Nick Chengae52e7f02010-06-18 15:39:12 +0800454static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
455{
Nick Chengcdd3cb12010-07-13 20:03:04 +0800456 struct pci_dev *pdev = acb->pdev;
457 void *dma_coherent;
458 dma_addr_t dma_coherent_handle;
459 struct CommandControlBlock *ccb_tmp;
460 int i = 0, j = 0;
461 dma_addr_t cdb_phyaddr;
462 unsigned long roundup_ccbsize = 0, offset;
463 unsigned long max_xfer_len;
464 unsigned long max_sg_entrys;
465 uint32_t firm_config_version;
466 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
467 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
468 acb->devstate[i][j] = ARECA_RAID_GONE;
Nick Chengae52e7f02010-06-18 15:39:12 +0800469
Nick Chengcdd3cb12010-07-13 20:03:04 +0800470 max_xfer_len = ARCMSR_MAX_XFER_LEN;
471 max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
472 firm_config_version = acb->firm_cfg_version;
473 if((firm_config_version & 0xFF) >= 3){
474 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */
475 max_sg_entrys = (max_xfer_len/4096);
476 }
477 acb->host->max_sectors = max_xfer_len/512;
478 acb->host->sg_tablesize = max_sg_entrys;
479 roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
480 acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM + 32;
481 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
482 if(!dma_coherent){
483 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error \n", acb->host->host_no);
484 return -ENOMEM;
485 }
486 acb->dma_coherent = dma_coherent;
487 acb->dma_coherent_handle = dma_coherent_handle;
488 memset(dma_coherent, 0, acb->uncache_size);
489 offset = roundup((unsigned long)dma_coherent, 32) - (unsigned long)dma_coherent;
490 dma_coherent_handle = dma_coherent_handle + offset;
491 dma_coherent = (struct CommandControlBlock *)dma_coherent + offset;
492 ccb_tmp = dma_coherent;
493 acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
494 for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){
495 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
496 ccb_tmp->cdb_phyaddr_pattern = ((acb->adapter_type == ACB_ADAPTER_TYPE_C) ? cdb_phyaddr : (cdb_phyaddr >> 5));
497 acb->pccb_pool[i] = ccb_tmp;
498 ccb_tmp->acb = acb;
499 INIT_LIST_HEAD(&ccb_tmp->list);
500 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
501 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
502 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize;
Erich Chen1c57e862006-07-12 08:59:32 -0700503 }
Erich Chen1c57e862006-07-12 08:59:32 -0700504 return 0;
505}
Nick Cheng36b83de2010-05-17 11:22:42 +0800506
Nick Chengcdd3cb12010-07-13 20:03:04 +0800507static void arcmsr_message_isr_bh_fn(struct work_struct *work)
508{
509 struct AdapterControlBlock *acb = container_of(work,struct AdapterControlBlock, arcmsr_do_message_isr_bh);
Nick Cheng36b83de2010-05-17 11:22:42 +0800510 switch (acb->adapter_type) {
511 case ACB_ADAPTER_TYPE_A: {
512
513 struct MessageUnit_A __iomem *reg = acb->pmuA;
514 char *acb_dev_map = (char *)acb->device_map;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800515 uint32_t __iomem *signature = (uint32_t __iomem*) (&reg->message_rwbuffer[0]);
516 char __iomem *devicemap = (char __iomem*) (&reg->message_rwbuffer[21]);
Nick Cheng36b83de2010-05-17 11:22:42 +0800517 int target, lun;
518 struct scsi_device *psdev;
519 char diff;
520
521 atomic_inc(&acb->rq_map_token);
522 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800523 for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) {
Nick Cheng36b83de2010-05-17 11:22:42 +0800524 diff = (*acb_dev_map)^readb(devicemap);
525 if (diff != 0) {
526 char temp;
527 *acb_dev_map = readb(devicemap);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800528 temp =*acb_dev_map;
529 for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
530 if((temp & 0x01)==1 && (diff & 0x01) == 1) {
Nick Cheng36b83de2010-05-17 11:22:42 +0800531 scsi_add_device(acb->host, 0, target, lun);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800532 }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) {
Nick Cheng36b83de2010-05-17 11:22:42 +0800533 psdev = scsi_device_lookup(acb->host, 0, target, lun);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800534 if (psdev != NULL ) {
Nick Cheng36b83de2010-05-17 11:22:42 +0800535 scsi_remove_device(psdev);
536 scsi_device_put(psdev);
537 }
538 }
539 temp >>= 1;
540 diff >>= 1;
541 }
542 }
543 devicemap++;
544 acb_dev_map++;
545 }
546 }
547 break;
548 }
549
550 case ACB_ADAPTER_TYPE_B: {
551 struct MessageUnit_B *reg = acb->pmuB;
552 char *acb_dev_map = (char *)acb->device_map;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800553 uint32_t __iomem *signature = (uint32_t __iomem*)(&reg->message_rwbuffer[0]);
554 char __iomem *devicemap = (char __iomem*)(&reg->message_rwbuffer[21]);
555 int target, lun;
556 struct scsi_device *psdev;
557 char diff;
558
559 atomic_inc(&acb->rq_map_token);
560 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
561 for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) {
562 diff = (*acb_dev_map)^readb(devicemap);
563 if (diff != 0) {
564 char temp;
565 *acb_dev_map = readb(devicemap);
566 temp =*acb_dev_map;
567 for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
568 if((temp & 0x01)==1 && (diff & 0x01) == 1) {
569 scsi_add_device(acb->host, 0, target, lun);
570 }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) {
571 psdev = scsi_device_lookup(acb->host, 0, target, lun);
572 if (psdev != NULL ) {
573 scsi_remove_device(psdev);
574 scsi_device_put(psdev);
575 }
576 }
577 temp >>= 1;
578 diff >>= 1;
579 }
580 }
581 devicemap++;
582 acb_dev_map++;
583 }
584 }
585 }
586 break;
587 case ACB_ADAPTER_TYPE_C: {
588 struct MessageUnit_C *reg = acb->pmuC;
589 char *acb_dev_map = (char *)acb->device_map;
590 uint32_t __iomem *signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
591 char __iomem *devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
Nick Cheng36b83de2010-05-17 11:22:42 +0800592 int target, lun;
593 struct scsi_device *psdev;
594 char diff;
595
596 atomic_inc(&acb->rq_map_token);
597 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) {
598 for (target = 0; target < ARCMSR_MAX_TARGETID - 1; target++) {
599 diff = (*acb_dev_map)^readb(devicemap);
600 if (diff != 0) {
601 char temp;
602 *acb_dev_map = readb(devicemap);
603 temp = *acb_dev_map;
604 for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) {
605 if ((temp & 0x01) == 1 && (diff & 0x01) == 1) {
606 scsi_add_device(acb->host, 0, target, lun);
607 } else if ((temp & 0x01) == 0 && (diff & 0x01) == 1) {
608 psdev = scsi_device_lookup(acb->host, 0, target, lun);
609 if (psdev != NULL) {
610 scsi_remove_device(psdev);
611 scsi_device_put(psdev);
612 }
613 }
614 temp >>= 1;
615 diff >>= 1;
616 }
617 }
618 devicemap++;
619 acb_dev_map++;
620 }
621 }
622 }
623 }
624}
Erich Chen1c57e862006-07-12 08:59:32 -0700625
Nick Chengae52e7f02010-06-18 15:39:12 +0800626static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
Erich Chen1c57e862006-07-12 08:59:32 -0700627{
628 struct Scsi_Host *host;
629 struct AdapterControlBlock *acb;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800630 uint8_t bus,dev_fun;
Erich Chen1c57e862006-07-12 08:59:32 -0700631 int error;
Erich Chen1c57e862006-07-12 08:59:32 -0700632 error = pci_enable_device(pdev);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800633 if(error){
Nick Chengae52e7f02010-06-18 15:39:12 +0800634 return -ENODEV;
Erich Chen1c57e862006-07-12 08:59:32 -0700635 }
Nick Chengae52e7f02010-06-18 15:39:12 +0800636 host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800637 if(!host){
638 goto pci_disable_dev;
Nick Chengae52e7f02010-06-18 15:39:12 +0800639 }
Yang Hongyang6a355282009-04-06 19:01:13 -0700640 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800641 if(error){
Yang Hongyang284901a2009-04-06 19:01:15 -0700642 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800643 if(error){
Erich Chen1c57e862006-07-12 08:59:32 -0700644 printk(KERN_WARNING
645 "scsi%d: No suitable DMA mask available\n",
646 host->host_no);
Nick Chengae52e7f02010-06-18 15:39:12 +0800647 goto scsi_host_release;
Erich Chen1c57e862006-07-12 08:59:32 -0700648 }
649 }
Nick Chengae52e7f02010-06-18 15:39:12 +0800650 init_waitqueue_head(&wait_q);
Erich Chen1c57e862006-07-12 08:59:32 -0700651 bus = pdev->bus->number;
652 dev_fun = pdev->devfn;
Nick Chengae52e7f02010-06-18 15:39:12 +0800653 acb = (struct AdapterControlBlock *) host->hostdata;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800654 memset(acb,0,sizeof(struct AdapterControlBlock));
Erich Chen1c57e862006-07-12 08:59:32 -0700655 acb->pdev = pdev;
Nick Chengae52e7f02010-06-18 15:39:12 +0800656 acb->host = host;
Erich Chen1c57e862006-07-12 08:59:32 -0700657 host->max_lun = ARCMSR_MAX_TARGETLUN;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800658 host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/
659 host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/
660 host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */
661 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN;
Erich Chen1c57e862006-07-12 08:59:32 -0700662 host->this_id = ARCMSR_SCSI_INITIATOR_ID;
663 host->unique_id = (bus << 8) | dev_fun;
Nick Chengae52e7f02010-06-18 15:39:12 +0800664 pci_set_drvdata(pdev, host);
665 pci_set_master(pdev);
Erich Chen1c57e862006-07-12 08:59:32 -0700666 error = pci_request_regions(pdev, "arcmsr");
Nick Chengcdd3cb12010-07-13 20:03:04 +0800667 if(error){
Nick Chengae52e7f02010-06-18 15:39:12 +0800668 goto scsi_host_release;
Erich Chen1c57e862006-07-12 08:59:32 -0700669 }
Nick Chengae52e7f02010-06-18 15:39:12 +0800670 spin_lock_init(&acb->eh_lock);
671 spin_lock_init(&acb->ccblist_lock);
Erich Chen1c57e862006-07-12 08:59:32 -0700672 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
Nick Chengcdd3cb12010-07-13 20:03:04 +0800673 ACB_F_MESSAGE_RQBUFFER_CLEARED |
674 ACB_F_MESSAGE_WQBUFFER_READED);
Erich Chen1c57e862006-07-12 08:59:32 -0700675 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
676 INIT_LIST_HEAD(&acb->ccb_free_list);
Nick Chengae52e7f02010-06-18 15:39:12 +0800677 arcmsr_define_adapter_type(acb);
678 error = arcmsr_remap_pciregion(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800679 if(!error){
Nick Chengae52e7f02010-06-18 15:39:12 +0800680 goto pci_release_regs;
681 }
682 error = arcmsr_get_firmware_spec(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800683 if(!error){
Nick Chengae52e7f02010-06-18 15:39:12 +0800684 goto unmap_pci_region;
685 }
Erich Chen1c57e862006-07-12 08:59:32 -0700686 error = arcmsr_alloc_ccb_pool(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800687 if(error){
Nick Chengae52e7f02010-06-18 15:39:12 +0800688 goto free_hbb_mu;
689 }
Nick Cheng36b83de2010-05-17 11:22:42 +0800690 arcmsr_iop_init(acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700691 error = scsi_add_host(host, &pdev->dev);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800692 if(error){
Nick Chengae52e7f02010-06-18 15:39:12 +0800693 goto RAID_controller_stop;
694 }
695 error = request_irq(pdev->irq, arcmsr_do_interrupt, IRQF_SHARED, "arcmsr", acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800696 if(error){
Nick Chengae52e7f02010-06-18 15:39:12 +0800697 goto scsi_host_remove;
698 }
699 host->irq = pdev->irq;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800700 scsi_scan_host(host);
Nick Chengae52e7f02010-06-18 15:39:12 +0800701 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
Nick Cheng36b83de2010-05-17 11:22:42 +0800702 atomic_set(&acb->rq_map_token, 16);
Nick Chengae52e7f02010-06-18 15:39:12 +0800703 atomic_set(&acb->ante_token_value, 16);
704 acb->fw_flag = FW_NORMAL;
Nick Cheng36b83de2010-05-17 11:22:42 +0800705 init_timer(&acb->eternal_timer);
Nick Chengae52e7f02010-06-18 15:39:12 +0800706 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
Nick Cheng36b83de2010-05-17 11:22:42 +0800707 acb->eternal_timer.data = (unsigned long) acb;
708 acb->eternal_timer.function = &arcmsr_request_device_map;
709 add_timer(&acb->eternal_timer);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800710 if(arcmsr_alloc_sysfs_attr(acb))
Nick Chengae52e7f02010-06-18 15:39:12 +0800711 goto out_free_sysfs;
Erich Chen1c57e862006-07-12 08:59:32 -0700712 return 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800713out_free_sysfs:
Nick Chengae52e7f02010-06-18 15:39:12 +0800714scsi_host_remove:
715 scsi_remove_host(host);
716RAID_controller_stop:
717 arcmsr_stop_adapter_bgrb(acb);
718 arcmsr_flush_adapter_cache(acb);
Erich Chen1c57e862006-07-12 08:59:32 -0700719 arcmsr_free_ccb_pool(acb);
Nick Chengae52e7f02010-06-18 15:39:12 +0800720free_hbb_mu:
Nick Chengcdd3cb12010-07-13 20:03:04 +0800721 arcmsr_free_hbb_mu(acb);
Nick Chengae52e7f02010-06-18 15:39:12 +0800722unmap_pci_region:
723 arcmsr_unmap_pciregion(acb);
724pci_release_regs:
Erich Chen1c57e862006-07-12 08:59:32 -0700725 pci_release_regions(pdev);
Nick Chengae52e7f02010-06-18 15:39:12 +0800726scsi_host_release:
Erich Chen1c57e862006-07-12 08:59:32 -0700727 scsi_host_put(host);
Nick Chengae52e7f02010-06-18 15:39:12 +0800728pci_disable_dev:
Erich Chen1c57e862006-07-12 08:59:32 -0700729 pci_disable_device(pdev);
Nick Chengae52e7f02010-06-18 15:39:12 +0800730 return -ENODEV;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800731}
732
Nick Cheng36b83de2010-05-17 11:22:42 +0800733static uint8_t arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800734{
Al Viro80da1ad2007-10-29 05:08:28 +0000735 struct MessageUnit_A __iomem *reg = acb->pmuA;
Erich Chen1c57e862006-07-12 08:59:32 -0700736 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800737 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Erich Chen1c57e862006-07-12 08:59:32 -0700738 printk(KERN_NOTICE
739 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
740 , acb->host->host_no);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800741 return false;
Nick Cheng36b83de2010-05-17 11:22:42 +0800742 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800743 return true;
Erich Chen1c57e862006-07-12 08:59:32 -0700744}
745
Nick Cheng36b83de2010-05-17 11:22:42 +0800746static uint8_t arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800747{
Al Viro80da1ad2007-10-29 05:08:28 +0000748 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800749
Nick Chengae52e7f02010-06-18 15:39:12 +0800750 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800751 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +0800752 printk(KERN_NOTICE
753 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
754 , acb->host->host_no);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800755 return false;
Nick Cheng36b83de2010-05-17 11:22:42 +0800756 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800757 return true;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800758}
Nick Chengcdd3cb12010-07-13 20:03:04 +0800759static uint8_t arcmsr_abort_hbc_allcmd(struct AdapterControlBlock *pACB)
760{
761 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
762 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
763 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
764 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
765 printk(KERN_NOTICE
766 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
767 , pACB->host->host_no);
768 return false;
769 }
770 return true;
771}
Nick Cheng36b83de2010-05-17 11:22:42 +0800772static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800773{
Nick Cheng36b83de2010-05-17 11:22:42 +0800774 uint8_t rtnval = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800775 switch (acb->adapter_type) {
776 case ACB_ADAPTER_TYPE_A: {
Nick Cheng36b83de2010-05-17 11:22:42 +0800777 rtnval = arcmsr_abort_hba_allcmd(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800778 }
779 break;
780
781 case ACB_ADAPTER_TYPE_B: {
Nick Cheng36b83de2010-05-17 11:22:42 +0800782 rtnval = arcmsr_abort_hbb_allcmd(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800783 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800784 break;
785
786 case ACB_ADAPTER_TYPE_C: {
787 rtnval = arcmsr_abort_hbc_allcmd(acb);
788 }
Nick Cheng1a4f5502007-09-13 17:26:40 +0800789 }
Nick Cheng36b83de2010-05-17 11:22:42 +0800790 return rtnval;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800791}
792
Nick Chengae52e7f02010-06-18 15:39:12 +0800793static bool arcmsr_hbb_enable_driver_mode(struct AdapterControlBlock *pacb)
794{
795 struct MessageUnit_B *reg = pacb->pmuB;
Nick Chengae52e7f02010-06-18 15:39:12 +0800796 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800797 if (!arcmsr_hbb_wait_msgint_ready(pacb)) {
Nick Chengae52e7f02010-06-18 15:39:12 +0800798 printk(KERN_ERR "arcmsr%d: can't set driver mode. \n", pacb->host->host_no);
799 return false;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800800 }
801 return true;
Nick Chengae52e7f02010-06-18 15:39:12 +0800802}
803
Erich Chen1c57e862006-07-12 08:59:32 -0700804static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
805{
Erich Chen1c57e862006-07-12 08:59:32 -0700806 struct scsi_cmnd *pcmd = ccb->pcmd;
807
FUJITA Tomonorideff2622007-05-14 19:25:56 +0900808 scsi_dma_unmap(pcmd);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800809}
Erich Chen1c57e862006-07-12 08:59:32 -0700810
Nick Chengae52e7f02010-06-18 15:39:12 +0800811static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
Erich Chen1c57e862006-07-12 08:59:32 -0700812{
813 struct AdapterControlBlock *acb = ccb->acb;
814 struct scsi_cmnd *pcmd = ccb->pcmd;
Nick Chengae52e7f02010-06-18 15:39:12 +0800815 unsigned long flags;
Nick Chengae52e7f02010-06-18 15:39:12 +0800816 atomic_dec(&acb->ccboutstandingcount);
Erich Chen1c57e862006-07-12 08:59:32 -0700817 arcmsr_pci_unmap_dma(ccb);
Erich Chen1c57e862006-07-12 08:59:32 -0700818 ccb->startdone = ARCMSR_CCB_DONE;
Nick Chengae52e7f02010-06-18 15:39:12 +0800819 spin_lock_irqsave(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -0700820 list_add_tail(&ccb->list, &acb->ccb_free_list);
Nick Chengae52e7f02010-06-18 15:39:12 +0800821 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -0700822 pcmd->scsi_done(pcmd);
823}
824
Nick Cheng1a4f5502007-09-13 17:26:40 +0800825static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
826{
827
828 struct scsi_cmnd *pcmd = ccb->pcmd;
829 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800830 pcmd->result = DID_OK << 16;
831 if (sensebuffer) {
832 int sense_data_length =
FUJITA Tomonorib80ca4f2008-01-13 15:46:13 +0900833 sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE
834 ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE;
835 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800836 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
837 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
838 sensebuffer->Valid = 1;
839 }
840}
841
842static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
843{
844 u32 orig_mask = 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800845 switch (acb->adapter_type) {
Nick Cheng1a4f5502007-09-13 17:26:40 +0800846 case ACB_ADAPTER_TYPE_A : {
Al Viro80da1ad2007-10-29 05:08:28 +0000847 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng36b83de2010-05-17 11:22:42 +0800848 orig_mask = readl(&reg->outbound_intmask);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800849 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
850 &reg->outbound_intmask);
851 }
852 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800853 case ACB_ADAPTER_TYPE_B : {
Al Viro80da1ad2007-10-29 05:08:28 +0000854 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f02010-06-18 15:39:12 +0800855 orig_mask = readl(reg->iop2drv_doorbell_mask);
856 writel(0, reg->iop2drv_doorbell_mask);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800857 }
858 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800859 case ACB_ADAPTER_TYPE_C:{
860 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
861 /* disable all outbound interrupt */
862 orig_mask = readl(&reg->host_int_mask); /* disable outbound message0 int */
863 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
864 }
865 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800866 }
867 return orig_mask;
868}
869
Nick Chengcdd3cb12010-07-13 20:03:04 +0800870static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb,
871 struct CommandControlBlock *ccb, bool error)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800872{
Nick Cheng1a4f5502007-09-13 17:26:40 +0800873 uint8_t id, lun;
874 id = ccb->pcmd->device->id;
875 lun = ccb->pcmd->device->lun;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800876 if (!error) {
Nick Cheng1a4f5502007-09-13 17:26:40 +0800877 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
878 acb->devstate[id][lun] = ARECA_RAID_GOOD;
Julia Lawall7968f192010-08-05 22:19:36 +0200879 ccb->pcmd->result = DID_OK << 16;
880 arcmsr_ccb_complete(ccb);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800881 }else{
Nick Cheng1a4f5502007-09-13 17:26:40 +0800882 switch (ccb->arcmsr_cdb.DeviceStatus) {
883 case ARCMSR_DEV_SELECT_TIMEOUT: {
884 acb->devstate[id][lun] = ARECA_RAID_GONE;
885 ccb->pcmd->result = DID_NO_CONNECT << 16;
Nick Chengae52e7f02010-06-18 15:39:12 +0800886 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800887 }
888 break;
889
890 case ARCMSR_DEV_ABORTED:
891
892 case ARCMSR_DEV_INIT_FAIL: {
893 acb->devstate[id][lun] = ARECA_RAID_GONE;
894 ccb->pcmd->result = DID_BAD_TARGET << 16;
Nick Chengae52e7f02010-06-18 15:39:12 +0800895 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800896 }
897 break;
898
899 case ARCMSR_DEV_CHECK_CONDITION: {
900 acb->devstate[id][lun] = ARECA_RAID_GOOD;
901 arcmsr_report_sense_info(ccb);
Nick Chengae52e7f02010-06-18 15:39:12 +0800902 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800903 }
904 break;
905
906 default:
Nick Chengcdd3cb12010-07-13 20:03:04 +0800907 printk(KERN_NOTICE
908 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \
909 but got unknown DeviceStatus = 0x%x \n"
910 , acb->host->host_no
911 , id
912 , lun
913 , ccb->arcmsr_cdb.DeviceStatus);
914 acb->devstate[id][lun] = ARECA_RAID_GONE;
915 ccb->pcmd->result = DID_NO_CONNECT << 16;
916 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800917 break;
918 }
919 }
920}
921
Nick Chengcdd3cb12010-07-13 20:03:04 +0800922static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800923{
Nick Chengae52e7f02010-06-18 15:39:12 +0800924 int id, lun;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800925 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
926 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
927 struct scsi_cmnd *abortcmd = pCCB->pcmd;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800928 if (abortcmd) {
Nick Chengae52e7f02010-06-18 15:39:12 +0800929 id = abortcmd->device->id;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800930 lun = abortcmd->device->lun;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800931 abortcmd->result |= DID_ABORT << 16;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800932 arcmsr_ccb_complete(pCCB);
933 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n",
934 acb->host->host_no, pCCB);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800935 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800936 return;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800937 }
938 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
939 done acb = '0x%p'"
940 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
941 " ccboutstandingcount = %d \n"
942 , acb->host->host_no
943 , acb
Nick Chengcdd3cb12010-07-13 20:03:04 +0800944 , pCCB
945 , pCCB->acb
946 , pCCB->startdone
Nick Cheng1a4f5502007-09-13 17:26:40 +0800947 , atomic_read(&acb->ccboutstandingcount));
Nick Chengcdd3cb12010-07-13 20:03:04 +0800948 return;
NickCheng97b99122011-01-06 17:32:41 +0800949 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800950 arcmsr_report_ccb_state(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800951}
952
953static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
954{
955 int i = 0;
956 uint32_t flag_ccb;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800957 struct ARCMSR_CDB *pARCMSR_CDB;
958 bool error;
959 struct CommandControlBlock *pCCB;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800960 switch (acb->adapter_type) {
961
962 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +0000963 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800964 uint32_t outbound_intstatus;
Al Viro80da1ad2007-10-29 05:08:28 +0000965 outbound_intstatus = readl(&reg->outbound_intstatus) &
Nick Cheng1a4f5502007-09-13 17:26:40 +0800966 acb->outbound_int_enable;
967 /*clear and abort all outbound posted Q*/
968 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
Nick Chengcdd3cb12010-07-13 20:03:04 +0800969 while(((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF)
Nick Cheng1a4f5502007-09-13 17:26:40 +0800970 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
Nick Chengcdd3cb12010-07-13 20:03:04 +0800971 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
972 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
973 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
974 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800975 }
976 }
977 break;
978
979 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +0000980 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800981 /*clear all outbound posted Q*/
NickCheng97b99122011-01-06 17:32:41 +0800982 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */
Nick Cheng1a4f5502007-09-13 17:26:40 +0800983 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
984 if ((flag_ccb = readl(&reg->done_qbuffer[i])) != 0) {
985 writel(0, &reg->done_qbuffer[i]);
Nick Chengcdd3cb12010-07-13 20:03:04 +0800986 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
987 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
988 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
989 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +0800990 }
Nick Chengcdd3cb12010-07-13 20:03:04 +0800991 reg->post_qbuffer[i] = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +0800992 }
993 reg->doneq_index = 0;
994 reg->postq_index = 0;
995 }
996 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +0800997 case ACB_ADAPTER_TYPE_C: {
998 struct MessageUnit_C *reg = acb->pmuC;
999 struct ARCMSR_CDB *pARCMSR_CDB;
1000 uint32_t flag_ccb, ccb_cdb_phy;
1001 bool error;
1002 struct CommandControlBlock *pCCB;
1003 while ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
1004 /*need to do*/
1005 flag_ccb = readl(&reg->outbound_queueport_low);
1006 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
1007 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/
1008 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1009 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1010 arcmsr_drain_donequeue(acb, pCCB, error);
1011 }
1012 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001013 }
1014}
Erich Chen1c57e862006-07-12 08:59:32 -07001015static void arcmsr_remove(struct pci_dev *pdev)
1016{
1017 struct Scsi_Host *host = pci_get_drvdata(pdev);
1018 struct AdapterControlBlock *acb =
1019 (struct AdapterControlBlock *) host->hostdata;
Erich Chen1c57e862006-07-12 08:59:32 -07001020 int poll_count = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001021 arcmsr_free_sysfs_attr(acb);
1022 scsi_remove_host(host);
Tejun Heoa684b8d2011-01-24 14:57:28 +01001023 flush_work_sync(&acb->arcmsr_do_message_isr_bh);
Nick Cheng36b83de2010-05-17 11:22:42 +08001024 del_timer_sync(&acb->eternal_timer);
1025 arcmsr_disable_outbound_ints(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001026 arcmsr_stop_adapter_bgrb(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001027 arcmsr_flush_adapter_cache(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001028 acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
1029 acb->acb_flags &= ~ACB_F_IOP_INITED;
1030
Nick Chengcdd3cb12010-07-13 20:03:04 +08001031 for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++){
Erich Chen1c57e862006-07-12 08:59:32 -07001032 if (!atomic_read(&acb->ccboutstandingcount))
1033 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001034 arcmsr_interrupt(acb);/* FIXME: need spinlock */
Erich Chen1c57e862006-07-12 08:59:32 -07001035 msleep(25);
1036 }
1037
1038 if (atomic_read(&acb->ccboutstandingcount)) {
1039 int i;
1040
1041 arcmsr_abort_allcmd(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001042 arcmsr_done4abort_postqueue(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001043 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
1044 struct CommandControlBlock *ccb = acb->pccb_pool[i];
1045 if (ccb->startdone == ARCMSR_CCB_START) {
1046 ccb->startdone = ARCMSR_CCB_ABORTED;
1047 ccb->pcmd->result = DID_ABORT << 16;
Nick Chengae52e7f02010-06-18 15:39:12 +08001048 arcmsr_ccb_complete(ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07001049 }
1050 }
1051 }
Erich Chen1c57e862006-07-12 08:59:32 -07001052 free_irq(pdev->irq, acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001053 arcmsr_free_ccb_pool(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001054 arcmsr_free_hbb_mu(acb);
1055 arcmsr_unmap_pciregion(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001056 pci_release_regions(pdev);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001057 scsi_host_put(host);
Erich Chen1c57e862006-07-12 08:59:32 -07001058 pci_disable_device(pdev);
1059 pci_set_drvdata(pdev, NULL);
1060}
1061
1062static void arcmsr_shutdown(struct pci_dev *pdev)
1063{
1064 struct Scsi_Host *host = pci_get_drvdata(pdev);
1065 struct AdapterControlBlock *acb =
1066 (struct AdapterControlBlock *)host->hostdata;
Nick Cheng36b83de2010-05-17 11:22:42 +08001067 del_timer_sync(&acb->eternal_timer);
1068 arcmsr_disable_outbound_ints(acb);
Tejun Heoa684b8d2011-01-24 14:57:28 +01001069 flush_work_sync(&acb->arcmsr_do_message_isr_bh);
Erich Chen1c57e862006-07-12 08:59:32 -07001070 arcmsr_stop_adapter_bgrb(acb);
1071 arcmsr_flush_adapter_cache(acb);
1072}
1073
1074static int arcmsr_module_init(void)
1075{
1076 int error = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001077 error = pci_register_driver(&arcmsr_pci_driver);
1078 return error;
1079}
1080
1081static void arcmsr_module_exit(void)
1082{
1083 pci_unregister_driver(&arcmsr_pci_driver);
1084}
1085module_init(arcmsr_module_init);
1086module_exit(arcmsr_module_exit);
1087
Nick Cheng36b83de2010-05-17 11:22:42 +08001088static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08001089 u32 intmask_org)
Erich Chen1c57e862006-07-12 08:59:32 -07001090{
Erich Chen1c57e862006-07-12 08:59:32 -07001091 u32 mask;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001092 switch (acb->adapter_type) {
1093
Nick Chengcdd3cb12010-07-13 20:03:04 +08001094 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001095 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001096 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
Nick Cheng36b83de2010-05-17 11:22:42 +08001097 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|
1098 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001099 writel(mask, &reg->outbound_intmask);
1100 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
1101 }
1102 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001103
Nick Chengcdd3cb12010-07-13 20:03:04 +08001104 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001105 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng36b83de2010-05-17 11:22:42 +08001106 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
1107 ARCMSR_IOP2DRV_DATA_READ_OK |
1108 ARCMSR_IOP2DRV_CDB_DONE |
1109 ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
Nick Chengae52e7f02010-06-18 15:39:12 +08001110 writel(mask, reg->iop2drv_doorbell_mask);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001111 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
1112 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001113 break;
1114 case ACB_ADAPTER_TYPE_C: {
1115 struct MessageUnit_C *reg = acb->pmuC;
1116 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
1117 writel(intmask_org & mask, &reg->host_int_mask);
1118 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1119 }
Erich Chen1c57e862006-07-12 08:59:32 -07001120 }
1121}
1122
Nick Cheng76d78302008-02-04 23:53:24 -08001123static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
Erich Chen1c57e862006-07-12 08:59:32 -07001124 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
1125{
1126 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1127 int8_t *psge = (int8_t *)&arcmsr_cdb->u;
Al Viro80da1ad2007-10-29 05:08:28 +00001128 __le32 address_lo, address_hi;
Erich Chen1c57e862006-07-12 08:59:32 -07001129 int arccdbsize = 0x30;
Nick Chengae52e7f02010-06-18 15:39:12 +08001130 __le32 length = 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001131 int i;
Nick Chengae52e7f02010-06-18 15:39:12 +08001132 struct scatterlist *sg;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001133 int nseg;
Erich Chen1c57e862006-07-12 08:59:32 -07001134 ccb->pcmd = pcmd;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001135 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
Erich Chen1c57e862006-07-12 08:59:32 -07001136 arcmsr_cdb->TargetID = pcmd->device->id;
1137 arcmsr_cdb->LUN = pcmd->device->lun;
1138 arcmsr_cdb->Function = 1;
Nick Chengae52e7f02010-06-18 15:39:12 +08001139 arcmsr_cdb->Context = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001140 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
Erich Chen1c57e862006-07-12 08:59:32 -07001141
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001142 nseg = scsi_dma_map(pcmd);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001143 if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0))
Nick Cheng76d78302008-02-04 23:53:24 -08001144 return FAILED;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001145 scsi_for_each_sg(pcmd, sg, nseg, i) {
1146 /* Get the physical address of the current data pointer */
1147 length = cpu_to_le32(sg_dma_len(sg));
1148 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
1149 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
1150 if (address_hi == 0) {
1151 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
Erich Chen1c57e862006-07-12 08:59:32 -07001152
Nick Chengcdd3cb12010-07-13 20:03:04 +08001153 pdma_sg->address = address_lo;
1154 pdma_sg->length = length;
1155 psge += sizeof (struct SG32ENTRY);
1156 arccdbsize += sizeof (struct SG32ENTRY);
1157 } else {
1158 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
Erich Chen1c57e862006-07-12 08:59:32 -07001159
Nick Chengcdd3cb12010-07-13 20:03:04 +08001160 pdma_sg->addresshigh = address_hi;
1161 pdma_sg->address = address_lo;
1162 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
1163 psge += sizeof (struct SG64ENTRY);
1164 arccdbsize += sizeof (struct SG64ENTRY);
Erich Chen1c57e862006-07-12 08:59:32 -07001165 }
Erich Chen1c57e862006-07-12 08:59:32 -07001166 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001167 arcmsr_cdb->sgcount = (uint8_t)nseg;
1168 arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1169 arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
1170 if ( arccdbsize > 256)
1171 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
roel kluinc32e0612011-01-01 19:40:23 +01001172 if (pcmd->sc_data_direction == DMA_TO_DEVICE)
Nick Chengcdd3cb12010-07-13 20:03:04 +08001173 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001174 ccb->arc_cdb_size = arccdbsize;
Nick Cheng76d78302008-02-04 23:53:24 -08001175 return SUCCESS;
Erich Chen1c57e862006-07-12 08:59:32 -07001176}
1177
1178static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
1179{
Nick Chengcdd3cb12010-07-13 20:03:04 +08001180 uint32_t cdb_phyaddr_pattern = ccb->cdb_phyaddr_pattern;
Erich Chen1c57e862006-07-12 08:59:32 -07001181 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
Erich Chen1c57e862006-07-12 08:59:32 -07001182 atomic_inc(&acb->ccboutstandingcount);
1183 ccb->startdone = ARCMSR_CCB_START;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001184 switch (acb->adapter_type) {
1185 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001186 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001187
1188 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
Nick Chengcdd3cb12010-07-13 20:03:04 +08001189 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
Erich Chen1c57e862006-07-12 08:59:32 -07001190 &reg->inbound_queueport);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001191 else {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001192 writel(cdb_phyaddr_pattern, &reg->inbound_queueport);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001193 }
1194 }
1195 break;
1196
1197 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001198 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001199 uint32_t ending_index, index = reg->postq_index;
1200
1201 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
1202 writel(0, &reg->post_qbuffer[ending_index]);
1203 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001204 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\
Nick Cheng1a4f5502007-09-13 17:26:40 +08001205 &reg->post_qbuffer[index]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001206 } else {
1207 writel(cdb_phyaddr_pattern, &reg->post_qbuffer[index]);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001208 }
1209 index++;
1210 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
1211 reg->postq_index = index;
Nick Chengae52e7f02010-06-18 15:39:12 +08001212 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001213 }
1214 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001215 case ACB_ADAPTER_TYPE_C: {
1216 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC;
1217 uint32_t ccb_post_stamp, arc_cdb_size;
1218
1219 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1220 ccb_post_stamp = (cdb_phyaddr_pattern | ((arc_cdb_size - 1) >> 6) | 1);
1221 if (acb->cdb_phyaddr_hi32) {
1222 writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high);
1223 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1224 } else {
1225 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1226 }
1227 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001228 }
Erich Chen1c57e862006-07-12 08:59:32 -07001229}
1230
Nick Cheng1a4f5502007-09-13 17:26:40 +08001231static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07001232{
Al Viro80da1ad2007-10-29 05:08:28 +00001233 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001234 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1235 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001236 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001237 printk(KERN_NOTICE
1238 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1239 , acb->host->host_no);
1240 }
1241}
1242
1243static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb)
1244{
Al Viro80da1ad2007-10-29 05:08:28 +00001245 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001246 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
Nick Chengae52e7f02010-06-18 15:39:12 +08001247 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001248
Nick Chengcdd3cb12010-07-13 20:03:04 +08001249 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001250 printk(KERN_NOTICE
1251 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1252 , acb->host->host_no);
Erich Chen1c57e862006-07-12 08:59:32 -07001253 }
1254}
1255
Nick Chengcdd3cb12010-07-13 20:03:04 +08001256static void arcmsr_stop_hbc_bgrb(struct AdapterControlBlock *pACB)
1257{
1258 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
1259 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1260 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1261 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1262 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
1263 printk(KERN_NOTICE
1264 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1265 , pACB->host->host_no);
1266 }
1267 return;
1268}
Erich Chen1c57e862006-07-12 08:59:32 -07001269static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
1270{
Nick Cheng1a4f5502007-09-13 17:26:40 +08001271 switch (acb->adapter_type) {
1272 case ACB_ADAPTER_TYPE_A: {
1273 arcmsr_stop_hba_bgrb(acb);
1274 }
1275 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001276
Nick Cheng1a4f5502007-09-13 17:26:40 +08001277 case ACB_ADAPTER_TYPE_B: {
1278 arcmsr_stop_hbb_bgrb(acb);
1279 }
1280 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001281 case ACB_ADAPTER_TYPE_C: {
1282 arcmsr_stop_hbc_bgrb(acb);
1283 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001284 }
Erich Chen1c57e862006-07-12 08:59:32 -07001285}
1286
1287static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
1288{
Nick Chengcdd3cb12010-07-13 20:03:04 +08001289 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
Erich Chen1c57e862006-07-12 08:59:32 -07001290}
1291
Nick Cheng1a4f5502007-09-13 17:26:40 +08001292void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07001293{
Nick Cheng1a4f5502007-09-13 17:26:40 +08001294 switch (acb->adapter_type) {
1295 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001296 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001297 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
1298 }
1299 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001300
Nick Cheng1a4f5502007-09-13 17:26:40 +08001301 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001302 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f02010-06-18 15:39:12 +08001303 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001304 }
1305 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001306 case ACB_ADAPTER_TYPE_C: {
1307 struct MessageUnit_C __iomem *reg = acb->pmuC;
1308 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
1309 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001310 }
1311}
1312
1313static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
1314{
1315 switch (acb->adapter_type) {
1316 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001317 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001318 /*
1319 ** push inbound doorbell tell iop, driver data write ok
1320 ** and wait reply on next hwinterrupt for next Qbuffer post
1321 */
1322 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
1323 }
1324 break;
1325
1326 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001327 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001328 /*
1329 ** push inbound doorbell tell iop, driver data write ok
1330 ** and wait reply on next hwinterrupt for next Qbuffer post
1331 */
Nick Chengae52e7f02010-06-18 15:39:12 +08001332 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001333 }
1334 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001335 case ACB_ADAPTER_TYPE_C: {
1336 struct MessageUnit_C __iomem *reg = acb->pmuC;
1337 /*
1338 ** push inbound doorbell tell iop, driver data write ok
1339 ** and wait reply on next hwinterrupt for next Qbuffer post
1340 */
1341 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, &reg->inbound_doorbell);
1342 }
1343 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001344 }
1345}
1346
Al Viro80da1ad2007-10-29 05:08:28 +00001347struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001348{
Al Viro0c7eb2e2007-10-29 05:08:58 +00001349 struct QBUFFER __iomem *qbuffer = NULL;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001350 switch (acb->adapter_type) {
1351
1352 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001353 struct MessageUnit_A __iomem *reg = acb->pmuA;
1354 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001355 }
1356 break;
1357
1358 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001359 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f02010-06-18 15:39:12 +08001360 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001361 }
1362 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001363 case ACB_ADAPTER_TYPE_C: {
1364 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC;
1365 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
1366 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001367 }
1368 return qbuffer;
1369}
1370
Al Viro80da1ad2007-10-29 05:08:28 +00001371static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08001372{
Al Viro0c7eb2e2007-10-29 05:08:58 +00001373 struct QBUFFER __iomem *pqbuffer = NULL;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001374 switch (acb->adapter_type) {
1375
1376 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00001377 struct MessageUnit_A __iomem *reg = acb->pmuA;
1378 pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001379 }
1380 break;
1381
1382 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00001383 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f02010-06-18 15:39:12 +08001384 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001385 }
1386 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001387 case ACB_ADAPTER_TYPE_C: {
1388 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
1389 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
1390 }
1391
Nick Cheng1a4f5502007-09-13 17:26:40 +08001392 }
1393 return pqbuffer;
1394}
1395
1396static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
1397{
Al Viro80da1ad2007-10-29 05:08:28 +00001398 struct QBUFFER __iomem *prbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001399 struct QBUFFER *pQbuffer;
Al Viro80da1ad2007-10-29 05:08:28 +00001400 uint8_t __iomem *iop_data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001401 int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001402 rqbuf_lastindex = acb->rqbuf_lastindex;
1403 rqbuf_firstindex = acb->rqbuf_firstindex;
1404 prbuffer = arcmsr_get_iop_rqbuffer(acb);
Al Viro80da1ad2007-10-29 05:08:28 +00001405 iop_data = (uint8_t __iomem *)prbuffer->data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001406 iop_len = prbuffer->data_len;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001407 my_empty_len = (rqbuf_firstindex - rqbuf_lastindex - 1) & (ARCMSR_MAX_QBUFFER - 1);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001408
1409 if (my_empty_len >= iop_len)
1410 {
1411 while (iop_len > 0) {
1412 pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex];
Nick Chengcdd3cb12010-07-13 20:03:04 +08001413 memcpy(pQbuffer, iop_data, 1);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001414 rqbuf_lastindex++;
1415 rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1416 iop_data++;
1417 iop_len--;
1418 }
1419 acb->rqbuf_lastindex = rqbuf_lastindex;
1420 arcmsr_iop_message_read(acb);
1421 }
1422
1423 else {
1424 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
1425 }
1426}
1427
1428static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
1429{
1430 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
1431 if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) {
1432 uint8_t *pQbuffer;
Al Viro80da1ad2007-10-29 05:08:28 +00001433 struct QBUFFER __iomem *pwbuffer;
1434 uint8_t __iomem *iop_data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001435 int32_t allxfer_len = 0;
1436
1437 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1438 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1439 iop_data = (uint8_t __iomem *)pwbuffer->data;
1440
1441 while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \
1442 (allxfer_len < 124)) {
1443 pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex];
1444 memcpy(iop_data, pQbuffer, 1);
1445 acb->wqbuf_firstindex++;
1446 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1447 iop_data++;
1448 allxfer_len++;
1449 }
1450 pwbuffer->data_len = allxfer_len;
1451
1452 arcmsr_iop_message_wrote(acb);
1453 }
1454
1455 if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) {
1456 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
1457 }
1458}
1459
1460static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb)
1461{
1462 uint32_t outbound_doorbell;
Al Viro80da1ad2007-10-29 05:08:28 +00001463 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001464 outbound_doorbell = readl(&reg->outbound_doorbell);
1465 writel(outbound_doorbell, &reg->outbound_doorbell);
1466 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) {
1467 arcmsr_iop2drv_data_wrote_handle(acb);
1468 }
1469
Nick Chengcdd3cb12010-07-13 20:03:04 +08001470 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001471 arcmsr_iop2drv_data_read_handle(acb);
1472 }
1473}
Nick Chengcdd3cb12010-07-13 20:03:04 +08001474static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *pACB)
1475{
1476 uint32_t outbound_doorbell;
1477 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC;
1478 /*
1479 *******************************************************************
1480 ** Maybe here we need to check wrqbuffer_lock is lock or not
1481 ** DOORBELL: din! don!
1482 ** check if there are any mail need to pack from firmware
1483 *******************************************************************
1484 */
1485 outbound_doorbell = readl(&reg->outbound_doorbell);
1486 writel(outbound_doorbell, &reg->outbound_doorbell_clear);/*clear interrupt*/
1487 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
1488 arcmsr_iop2drv_data_wrote_handle(pACB);
1489 }
1490 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) {
1491 arcmsr_iop2drv_data_read_handle(pACB);
1492 }
1493 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
1494 arcmsr_hbc_message_isr(pACB); /* messenger of "driver to iop commands" */
1495 }
1496 return;
1497}
Nick Cheng1a4f5502007-09-13 17:26:40 +08001498static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb)
1499{
1500 uint32_t flag_ccb;
Al Viro80da1ad2007-10-29 05:08:28 +00001501 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001502 struct ARCMSR_CDB *pARCMSR_CDB;
1503 struct CommandControlBlock *pCCB;
1504 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001505 while ((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001506 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
1507 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1508 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1509 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001510 }
1511}
Nick Cheng1a4f5502007-09-13 17:26:40 +08001512static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb)
1513{
1514 uint32_t index;
1515 uint32_t flag_ccb;
Al Viro80da1ad2007-10-29 05:08:28 +00001516 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001517 struct ARCMSR_CDB *pARCMSR_CDB;
1518 struct CommandControlBlock *pCCB;
1519 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001520 index = reg->doneq_index;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001521 while ((flag_ccb = readl(&reg->done_qbuffer[index])) != 0) {
1522 writel(0, &reg->done_qbuffer[index]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001523 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
1524 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1525 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1526 arcmsr_drain_donequeue(acb, pCCB, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001527 index++;
1528 index %= ARCMSR_MAX_HBB_POSTQUEUE;
1529 reg->doneq_index = index;
1530 }
1531}
Nick Chengcdd3cb12010-07-13 20:03:04 +08001532
1533static void arcmsr_hbc_postqueue_isr(struct AdapterControlBlock *acb)
1534{
1535 struct MessageUnit_C *phbcmu;
1536 struct ARCMSR_CDB *arcmsr_cdb;
1537 struct CommandControlBlock *ccb;
1538 uint32_t flag_ccb, ccb_cdb_phy, throttling = 0;
1539 int error;
1540
1541 phbcmu = (struct MessageUnit_C *)acb->pmuC;
1542 /* areca cdb command done */
1543 /* Use correct offset and size for syncing */
1544
1545 while (readl(&phbcmu->host_int_status) &
1546 ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR){
1547 /* check if command done with no error*/
1548 flag_ccb = readl(&phbcmu->outbound_queueport_low);
1549 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);/*frame must be 32 bytes aligned*/
1550 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);
1551 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
1552 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1553 /* check if command done with no error */
1554 arcmsr_drain_donequeue(acb, ccb, error);
1555 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
1556 writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING, &phbcmu->inbound_doorbell);
1557 break;
1558 }
1559 throttling++;
1560 }
1561}
Nick Cheng36b83de2010-05-17 11:22:42 +08001562/*
1563**********************************************************************************
1564** Handle a message interrupt
1565**
Nick Chengcdd3cb12010-07-13 20:03:04 +08001566** The only message interrupt we expect is in response to a query for the current adapter config.
Nick Cheng36b83de2010-05-17 11:22:42 +08001567** We want this in order to compare the drivemap so that we can detect newly-attached drives.
1568**********************************************************************************
1569*/
1570static void arcmsr_hba_message_isr(struct AdapterControlBlock *acb)
1571{
1572 struct MessageUnit_A *reg = acb->pmuA;
Nick Cheng36b83de2010-05-17 11:22:42 +08001573 /*clear interrupt and message state*/
1574 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, &reg->outbound_intstatus);
1575 schedule_work(&acb->arcmsr_do_message_isr_bh);
1576}
1577static void arcmsr_hbb_message_isr(struct AdapterControlBlock *acb)
1578{
1579 struct MessageUnit_B *reg = acb->pmuB;
1580
1581 /*clear interrupt and message state*/
Nick Chengae52e7f02010-06-18 15:39:12 +08001582 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
Nick Cheng36b83de2010-05-17 11:22:42 +08001583 schedule_work(&acb->arcmsr_do_message_isr_bh);
1584}
Nick Chengcdd3cb12010-07-13 20:03:04 +08001585/*
1586**********************************************************************************
1587** Handle a message interrupt
1588**
1589** The only message interrupt we expect is in response to a query for the
1590** current adapter config.
1591** We want this in order to compare the drivemap so that we can detect newly-attached drives.
1592**********************************************************************************
1593*/
1594static void arcmsr_hbc_message_isr(struct AdapterControlBlock *acb)
1595{
1596 struct MessageUnit_C *reg = acb->pmuC;
1597 /*clear interrupt and message state*/
1598 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);
1599 schedule_work(&acb->arcmsr_do_message_isr_bh);
1600}
1601
Nick Cheng1a4f5502007-09-13 17:26:40 +08001602static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb)
1603{
1604 uint32_t outbound_intstatus;
Al Viro80da1ad2007-10-29 05:08:28 +00001605 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng36b83de2010-05-17 11:22:42 +08001606 outbound_intstatus = readl(&reg->outbound_intstatus) &
Nick Chengcdd3cb12010-07-13 20:03:04 +08001607 acb->outbound_int_enable;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001608 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) {
1609 return 1;
1610 }
Erich Chen1c57e862006-07-12 08:59:32 -07001611 writel(outbound_intstatus, &reg->outbound_intstatus);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001612 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) {
1613 arcmsr_hba_doorbell_isr(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001614 }
1615 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001616 arcmsr_hba_postqueue_isr(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001617 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001618 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001619 /* messenger of "driver to iop commands" */
1620 arcmsr_hba_message_isr(acb);
1621 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001622 return 0;
1623}
1624
1625static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb)
1626{
1627 uint32_t outbound_doorbell;
Al Viro80da1ad2007-10-29 05:08:28 +00001628 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f02010-06-18 15:39:12 +08001629 outbound_doorbell = readl(reg->iop2drv_doorbell) &
Nick Chengcdd3cb12010-07-13 20:03:04 +08001630 acb->outbound_int_enable;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001631 if (!outbound_doorbell)
1632 return 1;
1633
Nick Chengae52e7f02010-06-18 15:39:12 +08001634 writel(~outbound_doorbell, reg->iop2drv_doorbell);
Nick Cheng36b83de2010-05-17 11:22:42 +08001635 /*in case the last action of doorbell interrupt clearance is cached,
1636 this action can push HW to write down the clear bit*/
Nick Chengae52e7f02010-06-18 15:39:12 +08001637 readl(reg->iop2drv_doorbell);
1638 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001639 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001640 arcmsr_iop2drv_data_wrote_handle(acb);
1641 }
1642 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) {
1643 arcmsr_iop2drv_data_read_handle(acb);
1644 }
1645 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) {
1646 arcmsr_hbb_postqueue_isr(acb);
1647 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001648 if(outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001649 /* messenger of "driver to iop commands" */
1650 arcmsr_hbb_message_isr(acb);
1651 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001652 return 0;
1653}
1654
Nick Chengcdd3cb12010-07-13 20:03:04 +08001655static int arcmsr_handle_hbc_isr(struct AdapterControlBlock *pACB)
1656{
1657 uint32_t host_interrupt_status;
1658 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
1659 /*
1660 *********************************************
1661 ** check outbound intstatus
1662 *********************************************
1663 */
1664 host_interrupt_status = readl(&phbcmu->host_int_status);
1665 if (!host_interrupt_status) {
1666 /*it must be share irq*/
1667 return 1;
1668 }
1669 /* MU ioctl transfer doorbell interrupts*/
1670 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) {
1671 arcmsr_hbc_doorbell_isr(pACB); /* messenger of "ioctl message read write" */
1672 }
1673 /* MU post queue interrupts*/
1674 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) {
1675 arcmsr_hbc_postqueue_isr(pACB); /* messenger of "scsi commands" */
1676 }
1677 return 0;
1678}
Nick Cheng1a4f5502007-09-13 17:26:40 +08001679static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
1680{
1681 switch (acb->adapter_type) {
1682 case ACB_ADAPTER_TYPE_A: {
1683 if (arcmsr_handle_hba_isr(acb)) {
1684 return IRQ_NONE;
1685 }
1686 }
1687 break;
1688
1689 case ACB_ADAPTER_TYPE_B: {
1690 if (arcmsr_handle_hbb_isr(acb)) {
1691 return IRQ_NONE;
1692 }
1693 }
1694 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001695 case ACB_ADAPTER_TYPE_C: {
1696 if (arcmsr_handle_hbc_isr(acb)) {
1697 return IRQ_NONE;
1698 }
1699 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001700 }
Erich Chen1c57e862006-07-12 08:59:32 -07001701 return IRQ_HANDLED;
1702}
1703
1704static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
1705{
1706 if (acb) {
1707 /* stop adapter background rebuild */
1708 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001709 uint32_t intmask_org;
Erich Chen1c57e862006-07-12 08:59:32 -07001710 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001711 intmask_org = arcmsr_disable_outbound_ints(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07001712 arcmsr_stop_adapter_bgrb(acb);
1713 arcmsr_flush_adapter_cache(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001714 arcmsr_enable_outbound_ints(acb, intmask_org);
Erich Chen1c57e862006-07-12 08:59:32 -07001715 }
1716 }
1717}
1718
Nick Cheng1a4f5502007-09-13 17:26:40 +08001719void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07001720{
Nick Cheng1a4f5502007-09-13 17:26:40 +08001721 int32_t wqbuf_firstindex, wqbuf_lastindex;
1722 uint8_t *pQbuffer;
Al Viro80da1ad2007-10-29 05:08:28 +00001723 struct QBUFFER __iomem *pwbuffer;
1724 uint8_t __iomem *iop_data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001725 int32_t allxfer_len = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001726 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1727 iop_data = (uint8_t __iomem *)pwbuffer->data;
1728 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
1729 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1730 wqbuf_firstindex = acb->wqbuf_firstindex;
1731 wqbuf_lastindex = acb->wqbuf_lastindex;
1732 while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) {
1733 pQbuffer = &acb->wqbuffer[wqbuf_firstindex];
1734 memcpy(iop_data, pQbuffer, 1);
1735 wqbuf_firstindex++;
1736 wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1737 iop_data++;
1738 allxfer_len++;
1739 }
1740 acb->wqbuf_firstindex = wqbuf_firstindex;
1741 pwbuffer->data_len = allxfer_len;
1742 arcmsr_iop_message_wrote(acb);
1743 }
1744}
1745
Nick Cheng36b83de2010-05-17 11:22:42 +08001746static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08001747 struct scsi_cmnd *cmd)
1748{
Erich Chen1c57e862006-07-12 08:59:32 -07001749 struct CMD_MESSAGE_FIELD *pcmdmessagefld;
1750 int retvalue = 0, transfer_len = 0;
1751 char *buffer;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001752 struct scatterlist *sg;
Erich Chen1c57e862006-07-12 08:59:32 -07001753 uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 |
1754 (uint32_t ) cmd->cmnd[6] << 16 |
1755 (uint32_t ) cmd->cmnd[7] << 8 |
1756 (uint32_t ) cmd->cmnd[8];
Nick Cheng1a4f5502007-09-13 17:26:40 +08001757 /* 4 bytes: Areca io control code */
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001758 sg = scsi_sglist(cmd);
Jens Axboe45711f12007-10-22 21:19:53 +02001759 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001760 if (scsi_sg_count(cmd) > 1) {
1761 retvalue = ARCMSR_MESSAGE_FAIL;
1762 goto message_out;
Erich Chen1c57e862006-07-12 08:59:32 -07001763 }
FUJITA Tomonorideff2622007-05-14 19:25:56 +09001764 transfer_len += sg->length;
1765
Erich Chen1c57e862006-07-12 08:59:32 -07001766 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
1767 retvalue = ARCMSR_MESSAGE_FAIL;
1768 goto message_out;
1769 }
1770 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer;
1771 switch(controlcode) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001772
Erich Chen1c57e862006-07-12 08:59:32 -07001773 case ARCMSR_MESSAGE_READ_RQBUFFER: {
Daniel Drake69e562c2008-02-20 13:29:05 +00001774 unsigned char *ver_addr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001775 uint8_t *pQbuffer, *ptmpQbuffer;
1776 int32_t allxfer_len = 0;
Erich Chen1c57e862006-07-12 08:59:32 -07001777
Daniel Drake69e562c2008-02-20 13:29:05 +00001778 ver_addr = kmalloc(1032, GFP_ATOMIC);
1779 if (!ver_addr) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001780 retvalue = ARCMSR_MESSAGE_FAIL;
1781 goto message_out;
1782 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001783
Daniel Drake69e562c2008-02-20 13:29:05 +00001784 ptmpQbuffer = ver_addr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001785 while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex)
1786 && (allxfer_len < 1031)) {
1787 pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex];
1788 memcpy(ptmpQbuffer, pQbuffer, 1);
1789 acb->rqbuf_firstindex++;
1790 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1791 ptmpQbuffer++;
1792 allxfer_len++;
1793 }
1794 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
Erich Chen1c57e862006-07-12 08:59:32 -07001795
Al Viro80da1ad2007-10-29 05:08:28 +00001796 struct QBUFFER __iomem *prbuffer;
1797 uint8_t __iomem *iop_data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001798 int32_t iop_len;
1799
1800 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1801 prbuffer = arcmsr_get_iop_rqbuffer(acb);
Al Viro80da1ad2007-10-29 05:08:28 +00001802 iop_data = prbuffer->data;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001803 iop_len = readl(&prbuffer->data_len);
1804 while (iop_len > 0) {
1805 acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data);
1806 acb->rqbuf_lastindex++;
1807 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1808 iop_data++;
1809 iop_len--;
Erich Chen1c57e862006-07-12 08:59:32 -07001810 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001811 arcmsr_iop_message_read(acb);
1812 }
Daniel Drake69e562c2008-02-20 13:29:05 +00001813 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len);
Nick Cheng1a4f5502007-09-13 17:26:40 +08001814 pcmdmessagefld->cmdmessage.Length = allxfer_len;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001815 if(acb->fw_flag == FW_DEADLOCK) {
Nick Chengae52e7f02010-06-18 15:39:12 +08001816 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001817 }else{
1818 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
Nick Chengae52e7f02010-06-18 15:39:12 +08001819 }
Daniel Drake69e562c2008-02-20 13:29:05 +00001820 kfree(ver_addr);
Erich Chen1c57e862006-07-12 08:59:32 -07001821 }
1822 break;
Erich Chen1c57e862006-07-12 08:59:32 -07001823
Nick Cheng1a4f5502007-09-13 17:26:40 +08001824 case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
Daniel Drake69e562c2008-02-20 13:29:05 +00001825 unsigned char *ver_addr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001826 int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex;
1827 uint8_t *pQbuffer, *ptmpuserbuffer;
1828
Daniel Drake69e562c2008-02-20 13:29:05 +00001829 ver_addr = kmalloc(1032, GFP_ATOMIC);
1830 if (!ver_addr) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001831 retvalue = ARCMSR_MESSAGE_FAIL;
1832 goto message_out;
1833 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08001834 if(acb->fw_flag == FW_DEADLOCK) {
1835 pcmdmessagefld->cmdmessage.ReturnCode =
Nick Cheng36b83de2010-05-17 11:22:42 +08001836 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001837 }else{
1838 pcmdmessagefld->cmdmessage.ReturnCode =
Nick Chengae52e7f02010-06-18 15:39:12 +08001839 ARCMSR_MESSAGE_RETURNCODE_OK;
Nick Cheng36b83de2010-05-17 11:22:42 +08001840 }
Daniel Drake69e562c2008-02-20 13:29:05 +00001841 ptmpuserbuffer = ver_addr;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001842 user_len = pcmdmessagefld->cmdmessage.Length;
1843 memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len);
1844 wqbuf_lastindex = acb->wqbuf_lastindex;
1845 wqbuf_firstindex = acb->wqbuf_firstindex;
1846 if (wqbuf_lastindex != wqbuf_firstindex) {
1847 struct SENSE_DATA *sensebuffer =
1848 (struct SENSE_DATA *)cmd->sense_buffer;
1849 arcmsr_post_ioctldata2iop(acb);
1850 /* has error report sensedata */
1851 sensebuffer->ErrorCode = 0x70;
1852 sensebuffer->SenseKey = ILLEGAL_REQUEST;
1853 sensebuffer->AdditionalSenseLength = 0x0A;
1854 sensebuffer->AdditionalSenseCode = 0x20;
1855 sensebuffer->Valid = 1;
1856 retvalue = ARCMSR_MESSAGE_FAIL;
1857 } else {
1858 my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1)
1859 &(ARCMSR_MAX_QBUFFER - 1);
1860 if (my_empty_len >= user_len) {
1861 while (user_len > 0) {
1862 pQbuffer =
1863 &acb->wqbuffer[acb->wqbuf_lastindex];
1864 memcpy(pQbuffer, ptmpuserbuffer, 1);
1865 acb->wqbuf_lastindex++;
1866 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1867 ptmpuserbuffer++;
1868 user_len--;
1869 }
1870 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
1871 acb->acb_flags &=
1872 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
1873 arcmsr_post_ioctldata2iop(acb);
1874 }
1875 } else {
1876 /* has error report sensedata */
Erich Chen1c57e862006-07-12 08:59:32 -07001877 struct SENSE_DATA *sensebuffer =
1878 (struct SENSE_DATA *)cmd->sense_buffer;
Erich Chen1c57e862006-07-12 08:59:32 -07001879 sensebuffer->ErrorCode = 0x70;
1880 sensebuffer->SenseKey = ILLEGAL_REQUEST;
1881 sensebuffer->AdditionalSenseLength = 0x0A;
1882 sensebuffer->AdditionalSenseCode = 0x20;
1883 sensebuffer->Valid = 1;
1884 retvalue = ARCMSR_MESSAGE_FAIL;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001885 }
Erich Chen1c57e862006-07-12 08:59:32 -07001886 }
Daniel Drake69e562c2008-02-20 13:29:05 +00001887 kfree(ver_addr);
Erich Chen1c57e862006-07-12 08:59:32 -07001888 }
1889 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001890
Erich Chen1c57e862006-07-12 08:59:32 -07001891 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001892 uint8_t *pQbuffer = acb->rqbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001893 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1894 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1895 arcmsr_iop_message_read(acb);
1896 }
1897 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
1898 acb->rqbuf_firstindex = 0;
1899 acb->rqbuf_lastindex = 0;
1900 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
Nick Chengcdd3cb12010-07-13 20:03:04 +08001901 if(acb->fw_flag == FW_DEADLOCK) {
Nick Chengae52e7f02010-06-18 15:39:12 +08001902 pcmdmessagefld->cmdmessage.ReturnCode =
1903 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001904 }else{
Nick Chengae52e7f02010-06-18 15:39:12 +08001905 pcmdmessagefld->cmdmessage.ReturnCode =
1906 ARCMSR_MESSAGE_RETURNCODE_OK;
1907 }
Erich Chen1c57e862006-07-12 08:59:32 -07001908 }
1909 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001910
Erich Chen1c57e862006-07-12 08:59:32 -07001911 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001912 uint8_t *pQbuffer = acb->wqbuffer;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001913 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001914 pcmdmessagefld->cmdmessage.ReturnCode =
1915 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001916 }else{
Nick Chengae52e7f02010-06-18 15:39:12 +08001917 pcmdmessagefld->cmdmessage.ReturnCode =
1918 ARCMSR_MESSAGE_RETURNCODE_OK;
Nick Cheng36b83de2010-05-17 11:22:42 +08001919 }
Erich Chen1c57e862006-07-12 08:59:32 -07001920
Nick Cheng1a4f5502007-09-13 17:26:40 +08001921 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1922 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1923 arcmsr_iop_message_read(acb);
1924 }
1925 acb->acb_flags |=
1926 (ACB_F_MESSAGE_WQBUFFER_CLEARED |
1927 ACB_F_MESSAGE_WQBUFFER_READED);
1928 acb->wqbuf_firstindex = 0;
1929 acb->wqbuf_lastindex = 0;
1930 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
Erich Chen1c57e862006-07-12 08:59:32 -07001931 }
1932 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001933
Erich Chen1c57e862006-07-12 08:59:32 -07001934 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
Nick Cheng1a4f5502007-09-13 17:26:40 +08001935 uint8_t *pQbuffer;
Erich Chen1c57e862006-07-12 08:59:32 -07001936
Nick Cheng1a4f5502007-09-13 17:26:40 +08001937 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1938 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1939 arcmsr_iop_message_read(acb);
1940 }
1941 acb->acb_flags |=
1942 (ACB_F_MESSAGE_WQBUFFER_CLEARED
1943 | ACB_F_MESSAGE_RQBUFFER_CLEARED
1944 | ACB_F_MESSAGE_WQBUFFER_READED);
1945 acb->rqbuf_firstindex = 0;
1946 acb->rqbuf_lastindex = 0;
1947 acb->wqbuf_firstindex = 0;
1948 acb->wqbuf_lastindex = 0;
1949 pQbuffer = acb->rqbuffer;
1950 memset(pQbuffer, 0, sizeof(struct QBUFFER));
1951 pQbuffer = acb->wqbuffer;
1952 memset(pQbuffer, 0, sizeof(struct QBUFFER));
Nick Chengcdd3cb12010-07-13 20:03:04 +08001953 if(acb->fw_flag == FW_DEADLOCK) {
Nick Chengae52e7f02010-06-18 15:39:12 +08001954 pcmdmessagefld->cmdmessage.ReturnCode =
1955 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001956 }else{
Nick Chengae52e7f02010-06-18 15:39:12 +08001957 pcmdmessagefld->cmdmessage.ReturnCode =
1958 ARCMSR_MESSAGE_RETURNCODE_OK;
1959 }
Erich Chen1c57e862006-07-12 08:59:32 -07001960 }
1961 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001962
Erich Chen1c57e862006-07-12 08:59:32 -07001963 case ARCMSR_MESSAGE_RETURN_CODE_3F: {
Nick Chengcdd3cb12010-07-13 20:03:04 +08001964 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001965 pcmdmessagefld->cmdmessage.ReturnCode =
1966 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001967 }else{
Nick Chengae52e7f02010-06-18 15:39:12 +08001968 pcmdmessagefld->cmdmessage.ReturnCode =
1969 ARCMSR_MESSAGE_RETURNCODE_3F;
Erich Chen1c57e862006-07-12 08:59:32 -07001970 }
1971 break;
Nick Chengae52e7f02010-06-18 15:39:12 +08001972 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001973 case ARCMSR_MESSAGE_SAY_HELLO: {
1974 int8_t *hello_string = "Hello! I am ARCMSR";
Nick Chengcdd3cb12010-07-13 20:03:04 +08001975 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001976 pcmdmessagefld->cmdmessage.ReturnCode =
1977 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Chengcdd3cb12010-07-13 20:03:04 +08001978 }else{
Nick Chengae52e7f02010-06-18 15:39:12 +08001979 pcmdmessagefld->cmdmessage.ReturnCode =
1980 ARCMSR_MESSAGE_RETURNCODE_OK;
Nick Cheng36b83de2010-05-17 11:22:42 +08001981 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08001982 memcpy(pcmdmessagefld->messagedatabuffer, hello_string
1983 , (int16_t)strlen(hello_string));
Erich Chen1c57e862006-07-12 08:59:32 -07001984 }
1985 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001986
Erich Chen1c57e862006-07-12 08:59:32 -07001987 case ARCMSR_MESSAGE_SAY_GOODBYE:
Nick Chengcdd3cb12010-07-13 20:03:04 +08001988 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001989 pcmdmessagefld->cmdmessage.ReturnCode =
1990 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Cheng36b83de2010-05-17 11:22:42 +08001991 }
Erich Chen1c57e862006-07-12 08:59:32 -07001992 arcmsr_iop_parking(acb);
1993 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08001994
Erich Chen1c57e862006-07-12 08:59:32 -07001995 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE:
Nick Chengcdd3cb12010-07-13 20:03:04 +08001996 if(acb->fw_flag == FW_DEADLOCK) {
Nick Cheng36b83de2010-05-17 11:22:42 +08001997 pcmdmessagefld->cmdmessage.ReturnCode =
1998 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
Nick Cheng36b83de2010-05-17 11:22:42 +08001999 }
Erich Chen1c57e862006-07-12 08:59:32 -07002000 arcmsr_flush_adapter_cache(acb);
2001 break;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002002
Erich Chen1c57e862006-07-12 08:59:32 -07002003 default:
2004 retvalue = ARCMSR_MESSAGE_FAIL;
2005 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002006 message_out:
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002007 sg = scsi_sglist(cmd);
2008 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
Erich Chen1c57e862006-07-12 08:59:32 -07002009 return retvalue;
2010}
2011
2012static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
2013{
2014 struct list_head *head = &acb->ccb_free_list;
2015 struct CommandControlBlock *ccb = NULL;
Nick Chengae52e7f02010-06-18 15:39:12 +08002016 unsigned long flags;
2017 spin_lock_irqsave(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -07002018 if (!list_empty(head)) {
2019 ccb = list_entry(head->next, struct CommandControlBlock, list);
Nick Chengae52e7f02010-06-18 15:39:12 +08002020 list_del_init(&ccb->list);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002021 }else{
Nick Chengae52e7f02010-06-18 15:39:12 +08002022 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2023 return 0;
Erich Chen1c57e862006-07-12 08:59:32 -07002024 }
Nick Chengae52e7f02010-06-18 15:39:12 +08002025 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -07002026 return ccb;
2027}
2028
2029static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
2030 struct scsi_cmnd *cmd)
2031{
2032 switch (cmd->cmnd[0]) {
2033 case INQUIRY: {
2034 unsigned char inqdata[36];
2035 char *buffer;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002036 struct scatterlist *sg;
Erich Chen1c57e862006-07-12 08:59:32 -07002037
2038 if (cmd->device->lun) {
2039 cmd->result = (DID_TIME_OUT << 16);
2040 cmd->scsi_done(cmd);
2041 return;
2042 }
2043 inqdata[0] = TYPE_PROCESSOR;
2044 /* Periph Qualifier & Periph Dev Type */
2045 inqdata[1] = 0;
2046 /* rem media bit & Dev Type Modifier */
2047 inqdata[2] = 0;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002048 /* ISO, ECMA, & ANSI versions */
Erich Chen1c57e862006-07-12 08:59:32 -07002049 inqdata[4] = 31;
2050 /* length of additional data */
2051 strncpy(&inqdata[8], "Areca ", 8);
2052 /* Vendor Identification */
2053 strncpy(&inqdata[16], "RAID controller ", 16);
2054 /* Product Identification */
2055 strncpy(&inqdata[32], "R001", 4); /* Product Revision */
Erich Chen1c57e862006-07-12 08:59:32 -07002056
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002057 sg = scsi_sglist(cmd);
Jens Axboe45711f12007-10-22 21:19:53 +02002058 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset;
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002059
Erich Chen1c57e862006-07-12 08:59:32 -07002060 memcpy(buffer, inqdata, sizeof(inqdata));
FUJITA Tomonorideff2622007-05-14 19:25:56 +09002061 sg = scsi_sglist(cmd);
2062 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
Erich Chen1c57e862006-07-12 08:59:32 -07002063
Erich Chen1c57e862006-07-12 08:59:32 -07002064 cmd->scsi_done(cmd);
2065 }
2066 break;
2067 case WRITE_BUFFER:
2068 case READ_BUFFER: {
2069 if (arcmsr_iop_message_xfer(acb, cmd))
2070 cmd->result = (DID_ERROR << 16);
2071 cmd->scsi_done(cmd);
2072 }
2073 break;
2074 default:
2075 cmd->scsi_done(cmd);
2076 }
2077}
2078
Jeff Garzikf2812332010-11-16 02:10:29 -05002079static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd,
Erich Chen1c57e862006-07-12 08:59:32 -07002080 void (* done)(struct scsi_cmnd *))
2081{
2082 struct Scsi_Host *host = cmd->device->host;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002083 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
Erich Chen1c57e862006-07-12 08:59:32 -07002084 struct CommandControlBlock *ccb;
2085 int target = cmd->device->id;
2086 int lun = cmd->device->lun;
Nick Cheng36b83de2010-05-17 11:22:42 +08002087 uint8_t scsicmd = cmd->cmnd[0];
Erich Chen1c57e862006-07-12 08:59:32 -07002088 cmd->scsi_done = done;
2089 cmd->host_scribble = NULL;
2090 cmd->result = 0;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002091 if ((scsicmd == SYNCHRONIZE_CACHE) ||(scsicmd == SEND_DIAGNOSTIC)){
2092 if(acb->devstate[target][lun] == ARECA_RAID_GONE) {
2093 cmd->result = (DID_NO_CONNECT << 16);
Nick Cheng36b83de2010-05-17 11:22:42 +08002094 }
2095 cmd->scsi_done(cmd);
2096 return 0;
2097 }
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002098 if (target == 16) {
Erich Chen1c57e862006-07-12 08:59:32 -07002099 /* virtual device for iop message transfer */
2100 arcmsr_handle_virtual_command(acb, cmd);
2101 return 0;
2102 }
Erich Chen1c57e862006-07-12 08:59:32 -07002103 if (atomic_read(&acb->ccboutstandingcount) >=
2104 ARCMSR_MAX_OUTSTANDING_CMD)
2105 return SCSI_MLQUEUE_HOST_BUSY;
Erich Chen1c57e862006-07-12 08:59:32 -07002106 ccb = arcmsr_get_freeccb(acb);
2107 if (!ccb)
2108 return SCSI_MLQUEUE_HOST_BUSY;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002109 if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) {
Nick Cheng76d78302008-02-04 23:53:24 -08002110 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1);
2111 cmd->scsi_done(cmd);
2112 return 0;
2113 }
Erich Chen1c57e862006-07-12 08:59:32 -07002114 arcmsr_post_ccb(acb, ccb);
2115 return 0;
2116}
2117
Jeff Garzikf2812332010-11-16 02:10:29 -05002118static DEF_SCSI_QCMD(arcmsr_queue_command)
2119
Nick Chengae52e7f02010-06-18 15:39:12 +08002120static bool arcmsr_get_hba_config(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07002121{
Al Viro80da1ad2007-10-29 05:08:28 +00002122 struct MessageUnit_A __iomem *reg = acb->pmuA;
Erich Chen1c57e862006-07-12 08:59:32 -07002123 char *acb_firm_model = acb->firm_model;
2124 char *acb_firm_version = acb->firm_version;
Nick Cheng36b83de2010-05-17 11:22:42 +08002125 char *acb_device_map = acb->device_map;
Al Viro80da1ad2007-10-29 05:08:28 +00002126 char __iomem *iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]);
2127 char __iomem *iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002128 char __iomem *iop_device_map = (char __iomem *)(&reg->message_rwbuffer[21]);
Erich Chen1c57e862006-07-12 08:59:32 -07002129 int count;
Erich Chen1c57e862006-07-12 08:59:32 -07002130 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002131 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002132 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2133 miscellaneous data' timeout \n", acb->host->host_no);
Nick Chengae52e7f02010-06-18 15:39:12 +08002134 return false;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002135 }
Erich Chen1c57e862006-07-12 08:59:32 -07002136 count = 8;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002137 while (count){
Erich Chen1c57e862006-07-12 08:59:32 -07002138 *acb_firm_model = readb(iop_firm_model);
2139 acb_firm_model++;
2140 iop_firm_model++;
2141 count--;
2142 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002143
Erich Chen1c57e862006-07-12 08:59:32 -07002144 count = 16;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002145 while (count){
Erich Chen1c57e862006-07-12 08:59:32 -07002146 *acb_firm_version = readb(iop_firm_version);
2147 acb_firm_version++;
2148 iop_firm_version++;
2149 count--;
2150 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002151
Nick Chengcdd3cb12010-07-13 20:03:04 +08002152 count=16;
2153 while(count){
2154 *acb_device_map = readb(iop_device_map);
2155 acb_device_map++;
2156 iop_device_map++;
2157 count--;
2158 }
2159 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
Nick Chengae52e7f02010-06-18 15:39:12 +08002160 acb->host->host_no,
2161 acb->firm_version,
2162 acb->firm_model);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002163 acb->signature = readl(&reg->message_rwbuffer[0]);
Erich Chen1c57e862006-07-12 08:59:32 -07002164 acb->firm_request_len = readl(&reg->message_rwbuffer[1]);
2165 acb->firm_numbers_queue = readl(&reg->message_rwbuffer[2]);
2166 acb->firm_sdram_size = readl(&reg->message_rwbuffer[3]);
2167 acb->firm_hd_channels = readl(&reg->message_rwbuffer[4]);
Nick Chengae52e7f02010-06-18 15:39:12 +08002168 acb->firm_cfg_version = readl(&reg->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2169 return true;
Erich Chen1c57e862006-07-12 08:59:32 -07002170}
Nick Chengae52e7f02010-06-18 15:39:12 +08002171static bool arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08002172{
Al Viro80da1ad2007-10-29 05:08:28 +00002173 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f02010-06-18 15:39:12 +08002174 struct pci_dev *pdev = acb->pdev;
2175 void *dma_coherent;
2176 dma_addr_t dma_coherent_handle;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002177 char *acb_firm_model = acb->firm_model;
2178 char *acb_firm_version = acb->firm_version;
Nick Cheng36b83de2010-05-17 11:22:42 +08002179 char *acb_device_map = acb->device_map;
Nick Chengae52e7f02010-06-18 15:39:12 +08002180 char __iomem *iop_firm_model;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002181 /*firm_model,15,60-67*/
Nick Chengae52e7f02010-06-18 15:39:12 +08002182 char __iomem *iop_firm_version;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002183 /*firm_version,17,68-83*/
Nick Chengae52e7f02010-06-18 15:39:12 +08002184 char __iomem *iop_device_map;
Nick Cheng36b83de2010-05-17 11:22:42 +08002185 /*firm_version,21,84-99*/
Nick Cheng1a4f5502007-09-13 17:26:40 +08002186 int count;
Nick Chengae52e7f02010-06-18 15:39:12 +08002187 dma_coherent = dma_alloc_coherent(&pdev->dev, sizeof(struct MessageUnit_B), &dma_coherent_handle, GFP_KERNEL);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002188 if (!dma_coherent){
Nick Chengae52e7f02010-06-18 15:39:12 +08002189 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error for hbb mu\n", acb->host->host_no);
2190 return false;
2191 }
2192 acb->dma_coherent_handle_hbb_mu = dma_coherent_handle;
2193 reg = (struct MessageUnit_B *)dma_coherent;
2194 acb->pmuB = reg;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002195 reg->drv2iop_doorbell= (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL);
Nick Chengae52e7f02010-06-18 15:39:12 +08002196 reg->drv2iop_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL_MASK);
2197 reg->iop2drv_doorbell = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL);
2198 reg->iop2drv_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL_MASK);
2199 reg->message_wbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_WBUFFER);
2200 reg->message_rbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RBUFFER);
2201 reg->message_rwbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RWBUFFER);
2202 iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]); /*firm_model,15,60-67*/
2203 iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]); /*firm_version,17,68-83*/
2204 iop_device_map = (char __iomem *)(&reg->message_rwbuffer[21]); /*firm_version,21,84-99*/
Nick Cheng1a4f5502007-09-13 17:26:40 +08002205
Nick Chengae52e7f02010-06-18 15:39:12 +08002206 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002207 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002208 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2209 miscellaneous data' timeout \n", acb->host->host_no);
Nick Chengae52e7f02010-06-18 15:39:12 +08002210 return false;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002211 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002212 count = 8;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002213 while (count){
2214 *acb_firm_model = readb(iop_firm_model);
2215 acb_firm_model++;
2216 iop_firm_model++;
2217 count--;
2218 }
2219 count = 16;
2220 while (count){
2221 *acb_firm_version = readb(iop_firm_version);
2222 acb_firm_version++;
2223 iop_firm_version++;
2224 count--;
2225 }
2226
2227 count = 16;
2228 while(count){
2229 *acb_device_map = readb(iop_device_map);
2230 acb_device_map++;
2231 iop_device_map++;
2232 count--;
2233 }
2234
2235 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
2236 acb->host->host_no,
2237 acb->firm_version,
2238 acb->firm_model);
2239
2240 acb->signature = readl(&reg->message_rwbuffer[1]);
2241 /*firm_signature,1,00-03*/
2242 acb->firm_request_len = readl(&reg->message_rwbuffer[2]);
2243 /*firm_request_len,1,04-07*/
2244 acb->firm_numbers_queue = readl(&reg->message_rwbuffer[3]);
2245 /*firm_numbers_queue,2,08-11*/
2246 acb->firm_sdram_size = readl(&reg->message_rwbuffer[4]);
2247 /*firm_sdram_size,3,12-15*/
2248 acb->firm_hd_channels = readl(&reg->message_rwbuffer[5]);
2249 /*firm_ide_channels,4,16-19*/
2250 acb->firm_cfg_version = readl(&reg->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2251 /*firm_ide_channels,4,16-19*/
2252 return true;
2253}
2254
2255static bool arcmsr_get_hbc_config(struct AdapterControlBlock *pACB)
2256{
2257 uint32_t intmask_org, Index, firmware_state = 0;
2258 struct MessageUnit_C *reg = pACB->pmuC;
2259 char *acb_firm_model = pACB->firm_model;
2260 char *acb_firm_version = pACB->firm_version;
2261 char *iop_firm_model = (char *)(&reg->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/
2262 char *iop_firm_version = (char *)(&reg->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/
2263 int count;
2264 /* disable all outbound interrupt */
2265 intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
2266 writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
2267 /* wait firmware ready */
2268 do {
2269 firmware_state = readl(&reg->outbound_msgaddr1);
2270 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
2271 /* post "get config" instruction */
2272 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
2273 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2274 /* wait message ready */
2275 for (Index = 0; Index < 2000; Index++) {
2276 if (readl(&reg->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
2277 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);/*clear interrupt*/
2278 break;
2279 }
2280 udelay(10);
2281 } /*max 1 seconds*/
2282 if (Index >= 2000) {
2283 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2284 miscellaneous data' timeout \n", pACB->host->host_no);
2285 return false;
2286 }
2287 count = 8;
Nick Chengae52e7f02010-06-18 15:39:12 +08002288 while (count) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002289 *acb_firm_model = readb(iop_firm_model);
2290 acb_firm_model++;
2291 iop_firm_model++;
2292 count--;
2293 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002294 count = 16;
Nick Chengae52e7f02010-06-18 15:39:12 +08002295 while (count) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002296 *acb_firm_version = readb(iop_firm_version);
2297 acb_firm_version++;
2298 iop_firm_version++;
2299 count--;
2300 }
Nick Chengae52e7f02010-06-18 15:39:12 +08002301 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n",
Nick Chengcdd3cb12010-07-13 20:03:04 +08002302 pACB->host->host_no,
2303 pACB->firm_version,
2304 pACB->firm_model);
2305 pACB->firm_request_len = readl(&reg->msgcode_rwbuffer[1]); /*firm_request_len,1,04-07*/
2306 pACB->firm_numbers_queue = readl(&reg->msgcode_rwbuffer[2]); /*firm_numbers_queue,2,08-11*/
2307 pACB->firm_sdram_size = readl(&reg->msgcode_rwbuffer[3]); /*firm_sdram_size,3,12-15*/
2308 pACB->firm_hd_channels = readl(&reg->msgcode_rwbuffer[4]); /*firm_ide_channels,4,16-19*/
2309 pACB->firm_cfg_version = readl(&reg->msgcode_rwbuffer[25]); /*firm_cfg_version,25,100-103*/
2310 /*all interrupt service will be enable at arcmsr_iop_init*/
Nick Chengae52e7f02010-06-18 15:39:12 +08002311 return true;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002312}
Nick Chengae52e7f02010-06-18 15:39:12 +08002313static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
Nick Cheng1a4f5502007-09-13 17:26:40 +08002314{
Nick Chengae52e7f02010-06-18 15:39:12 +08002315 if (acb->adapter_type == ACB_ADAPTER_TYPE_A)
2316 return arcmsr_get_hba_config(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002317 else if (acb->adapter_type == ACB_ADAPTER_TYPE_B)
Nick Chengae52e7f02010-06-18 15:39:12 +08002318 return arcmsr_get_hbb_config(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002319 else
2320 return arcmsr_get_hbc_config(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002321}
2322
Nick Chengae52e7f02010-06-18 15:39:12 +08002323static int arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb,
Erich Chen1c57e862006-07-12 08:59:32 -07002324 struct CommandControlBlock *poll_ccb)
2325{
Al Viro80da1ad2007-10-29 05:08:28 +00002326 struct MessageUnit_A __iomem *reg = acb->pmuA;
Erich Chen1c57e862006-07-12 08:59:32 -07002327 struct CommandControlBlock *ccb;
Nick Chengae52e7f02010-06-18 15:39:12 +08002328 struct ARCMSR_CDB *arcmsr_cdb;
Erich Chen1c57e862006-07-12 08:59:32 -07002329 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
Nick Chengae52e7f02010-06-18 15:39:12 +08002330 int rtn;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002331 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002332 polling_hba_ccb_retry:
Erich Chen1c57e862006-07-12 08:59:32 -07002333 poll_count++;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002334 outbound_intstatus = readl(&reg->outbound_intstatus) & acb->outbound_int_enable;
Erich Chen1c57e862006-07-12 08:59:32 -07002335 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
2336 while (1) {
2337 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08002338 if (poll_ccb_done){
Nick Chengae52e7f02010-06-18 15:39:12 +08002339 rtn = SUCCESS;
Erich Chen1c57e862006-07-12 08:59:32 -07002340 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002341 }else {
2342 msleep(25);
2343 if (poll_count > 100){
Nick Chengae52e7f02010-06-18 15:39:12 +08002344 rtn = FAILED;
Erich Chen1c57e862006-07-12 08:59:32 -07002345 break;
Nick Chengae52e7f02010-06-18 15:39:12 +08002346 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002347 goto polling_hba_ccb_retry;
Erich Chen1c57e862006-07-12 08:59:32 -07002348 }
2349 }
Nick Chengae52e7f02010-06-18 15:39:12 +08002350 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
2351 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002352 poll_ccb_done = (ccb == poll_ccb) ? 1:0;
2353 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
2354 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
2355 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
Erich Chen1c57e862006-07-12 08:59:32 -07002356 " poll command abort successfully \n"
2357 , acb->host->host_no
2358 , ccb->pcmd->device->id
2359 , ccb->pcmd->device->lun
2360 , ccb);
2361 ccb->pcmd->result = DID_ABORT << 16;
Nick Chengae52e7f02010-06-18 15:39:12 +08002362 arcmsr_ccb_complete(ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07002363 continue;
2364 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002365 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2366 " command done ccb = '0x%p'"
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002367 "ccboutstandingcount = %d \n"
Erich Chen1c57e862006-07-12 08:59:32 -07002368 , acb->host->host_no
2369 , ccb
2370 , atomic_read(&acb->ccboutstandingcount));
2371 continue;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002372 }
2373 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2374 arcmsr_report_ccb_state(acb, ccb, error);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002375 }
Nick Chengae52e7f02010-06-18 15:39:12 +08002376 return rtn;
2377}
Nick Cheng1a4f5502007-09-13 17:26:40 +08002378
Nick Chengae52e7f02010-06-18 15:39:12 +08002379static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08002380 struct CommandControlBlock *poll_ccb)
2381{
Nick Chengcdd3cb12010-07-13 20:03:04 +08002382 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f02010-06-18 15:39:12 +08002383 struct ARCMSR_CDB *arcmsr_cdb;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002384 struct CommandControlBlock *ccb;
2385 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
Nick Chengae52e7f02010-06-18 15:39:12 +08002386 int index, rtn;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002387 bool error;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002388 polling_hbb_ccb_retry:
NickCheng97b99122011-01-06 17:32:41 +08002389
Nick Chengcdd3cb12010-07-13 20:03:04 +08002390 poll_count++;
2391 /* clear doorbell interrupt */
Nick Chengae52e7f02010-06-18 15:39:12 +08002392 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002393 while(1){
2394 index = reg->doneq_index;
2395 if ((flag_ccb = readl(&reg->done_qbuffer[index])) == 0) {
2396 if (poll_ccb_done){
Nick Chengae52e7f02010-06-18 15:39:12 +08002397 rtn = SUCCESS;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002398 break;
2399 }else {
2400 msleep(25);
2401 if (poll_count > 100){
Nick Chengae52e7f02010-06-18 15:39:12 +08002402 rtn = FAILED;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002403 break;
Nick Chengae52e7f02010-06-18 15:39:12 +08002404 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002405 goto polling_hbb_ccb_retry;
Erich Chen1c57e862006-07-12 08:59:32 -07002406 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002407 }
2408 writel(0, &reg->done_qbuffer[index]);
2409 index++;
2410 /*if last index number set it to 0 */
2411 index %= ARCMSR_MAX_HBB_POSTQUEUE;
2412 reg->doneq_index = index;
2413 /* check if command done with no error*/
Nick Chengae52e7f02010-06-18 15:39:12 +08002414 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
2415 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002416 poll_ccb_done = (ccb == poll_ccb) ? 1:0;
2417 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
2418 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
Nick Chengae52e7f02010-06-18 15:39:12 +08002419 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
2420 " poll command abort successfully \n"
Nick Chengcdd3cb12010-07-13 20:03:04 +08002421 ,acb->host->host_no
2422 ,ccb->pcmd->device->id
2423 ,ccb->pcmd->device->lun
2424 ,ccb);
2425 ccb->pcmd->result = DID_ABORT << 16;
Nick Chengae52e7f02010-06-18 15:39:12 +08002426 arcmsr_ccb_complete(ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002427 continue;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002428 }
2429 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2430 " command done ccb = '0x%p'"
2431 "ccboutstandingcount = %d \n"
2432 , acb->host->host_no
2433 , ccb
2434 , atomic_read(&acb->ccboutstandingcount));
2435 continue;
2436 }
2437 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2438 arcmsr_report_ccb_state(acb, ccb, error);
2439 }
Nick Chengae52e7f02010-06-18 15:39:12 +08002440 return rtn;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002441}
2442
Nick Chengcdd3cb12010-07-13 20:03:04 +08002443static int arcmsr_polling_hbc_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb)
2444{
2445 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2446 uint32_t flag_ccb, ccb_cdb_phy;
2447 struct ARCMSR_CDB *arcmsr_cdb;
2448 bool error;
2449 struct CommandControlBlock *pCCB;
2450 uint32_t poll_ccb_done = 0, poll_count = 0;
2451 int rtn;
2452polling_hbc_ccb_retry:
2453 poll_count++;
2454 while (1) {
2455 if ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
2456 if (poll_ccb_done) {
2457 rtn = SUCCESS;
2458 break;
2459 } else {
2460 msleep(25);
2461 if (poll_count > 100) {
2462 rtn = FAILED;
2463 break;
2464 }
2465 goto polling_hbc_ccb_retry;
2466 }
2467 }
2468 flag_ccb = readl(&reg->outbound_queueport_low);
2469 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
2470 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/
2471 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
2472 poll_ccb_done = (pCCB == poll_ccb) ? 1 : 0;
2473 /* check ifcommand done with no error*/
2474 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
2475 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
2476 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
2477 " poll command abort successfully \n"
2478 , acb->host->host_no
2479 , pCCB->pcmd->device->id
2480 , pCCB->pcmd->device->lun
2481 , pCCB);
2482 pCCB->pcmd->result = DID_ABORT << 16;
2483 arcmsr_ccb_complete(pCCB);
2484 continue;
2485 }
2486 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2487 " command done ccb = '0x%p'"
2488 "ccboutstandingcount = %d \n"
2489 , acb->host->host_no
2490 , pCCB
2491 , atomic_read(&acb->ccboutstandingcount));
2492 continue;
2493 }
2494 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
2495 arcmsr_report_ccb_state(acb, pCCB, error);
2496 }
2497 return rtn;
2498}
Nick Chengae52e7f02010-06-18 15:39:12 +08002499static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
Nick Cheng1a4f5502007-09-13 17:26:40 +08002500 struct CommandControlBlock *poll_ccb)
2501{
Nick Chengae52e7f02010-06-18 15:39:12 +08002502 int rtn = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002503 switch (acb->adapter_type) {
2504
2505 case ACB_ADAPTER_TYPE_A: {
Nick Chengae52e7f02010-06-18 15:39:12 +08002506 rtn = arcmsr_polling_hba_ccbdone(acb, poll_ccb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002507 }
2508 break;
2509
2510 case ACB_ADAPTER_TYPE_B: {
Nick Chengae52e7f02010-06-18 15:39:12 +08002511 rtn = arcmsr_polling_hbb_ccbdone(acb, poll_ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07002512 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002513 break;
2514 case ACB_ADAPTER_TYPE_C: {
2515 rtn = arcmsr_polling_hbc_ccbdone(acb, poll_ccb);
2516 }
Erich Chen1c57e862006-07-12 08:59:32 -07002517 }
Nick Chengae52e7f02010-06-18 15:39:12 +08002518 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07002519}
Nick Cheng1a4f5502007-09-13 17:26:40 +08002520
2521static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002522{
Nick Chengae52e7f02010-06-18 15:39:12 +08002523 uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002524 dma_addr_t dma_coherent_handle;
2525 /*
2526 ********************************************************************
2527 ** here we need to tell iop 331 our freeccb.HighPart
2528 ** if freeccb.HighPart is not zero
2529 ********************************************************************
2530 */
2531 dma_coherent_handle = acb->dma_coherent_handle;
2532 cdb_phyaddr = (uint32_t)(dma_coherent_handle);
Nick Chengae52e7f02010-06-18 15:39:12 +08002533 cdb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002534 acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002535 /*
2536 ***********************************************************************
2537 ** if adapter type B, set window of "post command Q"
2538 ***********************************************************************
2539 */
2540 switch (acb->adapter_type) {
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002541
Nick Cheng1a4f5502007-09-13 17:26:40 +08002542 case ACB_ADAPTER_TYPE_A: {
Nick Chengae52e7f02010-06-18 15:39:12 +08002543 if (cdb_phyaddr_hi32 != 0) {
Al Viro80da1ad2007-10-29 05:08:28 +00002544 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002545 uint32_t intmask_org;
2546 intmask_org = arcmsr_disable_outbound_ints(acb);
2547 writel(ARCMSR_SIGNATURE_SET_CONFIG, \
2548 &reg->message_rwbuffer[0]);
Nick Chengae52e7f02010-06-18 15:39:12 +08002549 writel(cdb_phyaddr_hi32, &reg->message_rwbuffer[1]);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002550 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
2551 &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002552 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002553 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
2554 part physical address timeout\n",
2555 acb->host->host_no);
2556 return 1;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002557 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002558 arcmsr_enable_outbound_ints(acb, intmask_org);
2559 }
2560 }
2561 break;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002562
Nick Cheng1a4f5502007-09-13 17:26:40 +08002563 case ACB_ADAPTER_TYPE_B: {
2564 unsigned long post_queue_phyaddr;
Al Viro80da1ad2007-10-29 05:08:28 +00002565 uint32_t __iomem *rwbuffer;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002566
Al Viro80da1ad2007-10-29 05:08:28 +00002567 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002568 uint32_t intmask_org;
2569 intmask_org = arcmsr_disable_outbound_ints(acb);
2570 reg->postq_index = 0;
2571 reg->doneq_index = 0;
Nick Chengae52e7f02010-06-18 15:39:12 +08002572 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002573 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002574 printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \
2575 acb->host->host_no);
2576 return 1;
2577 }
Nick Chengae52e7f02010-06-18 15:39:12 +08002578 post_queue_phyaddr = acb->dma_coherent_handle_hbb_mu;
2579 rwbuffer = reg->message_rwbuffer;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002580 /* driver "set config" signature */
2581 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
2582 /* normal should be zero */
Nick Chengae52e7f02010-06-18 15:39:12 +08002583 writel(cdb_phyaddr_hi32, rwbuffer++);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002584 /* postQ size (256 + 8)*4 */
2585 writel(post_queue_phyaddr, rwbuffer++);
2586 /* doneQ size (256 + 8)*4 */
2587 writel(post_queue_phyaddr + 1056, rwbuffer++);
2588 /* ccb maxQ size must be --> [(256 + 8)*4]*/
2589 writel(1056, rwbuffer);
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002590
Nick Chengae52e7f02010-06-18 15:39:12 +08002591 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002592 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002593 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
2594 timeout \n",acb->host->host_no);
2595 return 1;
2596 }
Nick Chengae52e7f02010-06-18 15:39:12 +08002597 arcmsr_hbb_enable_driver_mode(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002598 arcmsr_enable_outbound_ints(acb, intmask_org);
2599 }
2600 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002601 case ACB_ADAPTER_TYPE_C: {
2602 if (cdb_phyaddr_hi32 != 0) {
2603 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2604
2605 if (cdb_phyaddr_hi32 != 0) {
2606 unsigned char Retries = 0x00;
2607 do {
2608 printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x \n", acb->adapter_index, cdb_phyaddr_hi32);
2609 } while (Retries++ < 100);
2610 }
2611 writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
2612 writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[1]);
2613 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
2614 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2615 if (!arcmsr_hbc_wait_msgint_ready(acb)) {
2616 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
2617 timeout \n", acb->host->host_no);
2618 return 1;
2619 }
2620 }
2621 }
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002622 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002623 return 0;
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002624}
2625
Nick Cheng1a4f5502007-09-13 17:26:40 +08002626static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
2627{
2628 uint32_t firmware_state = 0;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002629 switch (acb->adapter_type) {
2630
2631 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00002632 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002633 do {
2634 firmware_state = readl(&reg->outbound_msgaddr1);
2635 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
2636 }
2637 break;
2638
2639 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00002640 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002641 do {
Nick Chengae52e7f02010-06-18 15:39:12 +08002642 firmware_state = readl(reg->iop2drv_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002643 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
Nick Chengae52e7f02010-06-18 15:39:12 +08002644 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002645 }
2646 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002647 case ACB_ADAPTER_TYPE_C: {
2648 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2649 do {
2650 firmware_state = readl(&reg->outbound_msgaddr1);
2651 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
2652 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002653 }
2654}
2655
Nick Cheng36b83de2010-05-17 11:22:42 +08002656static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb)
2657{
2658 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002659 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
NickCheng97b99122011-01-06 17:32:41 +08002660 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002661 return;
2662 } else {
2663 acb->fw_flag = FW_NORMAL;
2664 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){
2665 atomic_set(&acb->rq_map_token, 16);
2666 }
2667 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
NickCheng97b99122011-01-06 17:32:41 +08002668 if (atomic_dec_and_test(&acb->rq_map_token)) {
2669 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002670 return;
NickCheng97b99122011-01-06 17:32:41 +08002671 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002672 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
2673 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2674 }
2675 return;
2676}
2677
2678static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb)
2679{
2680 struct MessageUnit_B __iomem *reg = acb->pmuB;
2681 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
NickCheng97b99122011-01-06 17:32:41 +08002682 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002683 return;
2684 } else {
2685 acb->fw_flag = FW_NORMAL;
2686 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
NickCheng97b99122011-01-06 17:32:41 +08002687 atomic_set(&acb->rq_map_token, 16);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002688 }
2689 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
NickCheng97b99122011-01-06 17:32:41 +08002690 if (atomic_dec_and_test(&acb->rq_map_token)) {
2691 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08002692 return;
NickCheng97b99122011-01-06 17:32:41 +08002693 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002694 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
2695 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
2696 }
2697 return;
2698}
2699
2700static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb)
2701{
2702 struct MessageUnit_C __iomem *reg = acb->pmuC;
Nick Chengae52e7f02010-06-18 15:39:12 +08002703 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) {
NickCheng97b99122011-01-06 17:32:41 +08002704 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengae52e7f02010-06-18 15:39:12 +08002705 return;
Nick Cheng36b83de2010-05-17 11:22:42 +08002706 } else {
Nick Chengae52e7f02010-06-18 15:39:12 +08002707 acb->fw_flag = FW_NORMAL;
2708 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
Nick Cheng36b83de2010-05-17 11:22:42 +08002709 atomic_set(&acb->rq_map_token, 16);
2710 }
Nick Chengae52e7f02010-06-18 15:39:12 +08002711 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
NickCheng97b99122011-01-06 17:32:41 +08002712 if (atomic_dec_and_test(&acb->rq_map_token)) {
2713 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengae52e7f02010-06-18 15:39:12 +08002714 return;
NickCheng97b99122011-01-06 17:32:41 +08002715 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002716 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002717 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2718 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Cheng36b83de2010-05-17 11:22:42 +08002719 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002720 return;
2721}
2722
2723static void arcmsr_request_device_map(unsigned long pacb)
2724{
2725 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb;
Nick Cheng36b83de2010-05-17 11:22:42 +08002726 switch (acb->adapter_type) {
2727 case ACB_ADAPTER_TYPE_A: {
2728 arcmsr_request_hba_device_map(acb);
2729 }
2730 break;
2731 case ACB_ADAPTER_TYPE_B: {
2732 arcmsr_request_hbb_device_map(acb);
2733 }
2734 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002735 case ACB_ADAPTER_TYPE_C: {
2736 arcmsr_request_hbc_device_map(acb);
2737 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002738 }
2739}
2740
Nick Cheng1a4f5502007-09-13 17:26:40 +08002741static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb)
2742{
Al Viro80da1ad2007-10-29 05:08:28 +00002743 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002744 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2745 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002746 if (!arcmsr_hba_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002747 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2748 rebulid' timeout \n", acb->host->host_no);
2749 }
2750}
2751
2752static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb)
2753{
Al Viro80da1ad2007-10-29 05:08:28 +00002754 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002755 acb->acb_flags |= ACB_F_MSG_START_BGRB;
Nick Chengae52e7f02010-06-18 15:39:12 +08002756 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002757 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng1a4f5502007-09-13 17:26:40 +08002758 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2759 rebulid' timeout \n",acb->host->host_no);
2760 }
2761}
2762
Nick Chengcdd3cb12010-07-13 20:03:04 +08002763static void arcmsr_start_hbc_bgrb(struct AdapterControlBlock *pACB)
2764{
2765 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC;
2766 pACB->acb_flags |= ACB_F_MSG_START_BGRB;
2767 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
2768 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
2769 if (!arcmsr_hbc_wait_msgint_ready(pACB)) {
2770 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2771 rebulid' timeout \n", pACB->host->host_no);
2772 }
2773 return;
2774}
Nick Cheng1a4f5502007-09-13 17:26:40 +08002775static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
2776{
2777 switch (acb->adapter_type) {
2778 case ACB_ADAPTER_TYPE_A:
2779 arcmsr_start_hba_bgrb(acb);
2780 break;
2781 case ACB_ADAPTER_TYPE_B:
2782 arcmsr_start_hbb_bgrb(acb);
2783 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002784 case ACB_ADAPTER_TYPE_C:
2785 arcmsr_start_hbc_bgrb(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002786 }
2787}
2788
2789static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
2790{
2791 switch (acb->adapter_type) {
2792 case ACB_ADAPTER_TYPE_A: {
Al Viro80da1ad2007-10-29 05:08:28 +00002793 struct MessageUnit_A __iomem *reg = acb->pmuA;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002794 uint32_t outbound_doorbell;
2795 /* empty doorbell Qbuffer if door bell ringed */
2796 outbound_doorbell = readl(&reg->outbound_doorbell);
2797 /*clear doorbell interrupt */
2798 writel(outbound_doorbell, &reg->outbound_doorbell);
2799 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
2800 }
2801 break;
2802
2803 case ACB_ADAPTER_TYPE_B: {
Al Viro80da1ad2007-10-29 05:08:28 +00002804 struct MessageUnit_B *reg = acb->pmuB;
Nick Cheng1a4f5502007-09-13 17:26:40 +08002805 /*clear interrupt and message state*/
Nick Chengae52e7f02010-06-18 15:39:12 +08002806 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2807 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002808 /* let IOP know data has been read */
2809 }
2810 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002811 case ACB_ADAPTER_TYPE_C: {
2812 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC;
2813 uint32_t outbound_doorbell;
2814 /* empty doorbell Qbuffer if door bell ringed */
2815 outbound_doorbell = readl(&reg->outbound_doorbell);
2816 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
2817 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
2818 }
Nick Cheng1a4f5502007-09-13 17:26:40 +08002819 }
2820}
Erich Chen1c57e862006-07-12 08:59:32 -07002821
Nick Cheng76d78302008-02-04 23:53:24 -08002822static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
2823{
2824 switch (acb->adapter_type) {
2825 case ACB_ADAPTER_TYPE_A:
2826 return;
2827 case ACB_ADAPTER_TYPE_B:
2828 {
2829 struct MessageUnit_B *reg = acb->pmuB;
Nick Chengae52e7f02010-06-18 15:39:12 +08002830 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002831 if (!arcmsr_hbb_wait_msgint_ready(acb)) {
Nick Cheng76d78302008-02-04 23:53:24 -08002832 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
2833 return;
2834 }
2835 }
2836 break;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002837 case ACB_ADAPTER_TYPE_C:
2838 return;
Nick Cheng76d78302008-02-04 23:53:24 -08002839 }
2840 return;
2841}
2842
Nick Cheng36b83de2010-05-17 11:22:42 +08002843static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
2844{
2845 uint8_t value[64];
Nick Chengcdd3cb12010-07-13 20:03:04 +08002846 int i, count = 0;
2847 struct MessageUnit_A __iomem *pmuA = acb->pmuA;
2848 struct MessageUnit_C __iomem *pmuC = acb->pmuC;
2849 u32 temp = 0;
Nick Cheng36b83de2010-05-17 11:22:42 +08002850 /* backup pci config data */
Nick Chengcdd3cb12010-07-13 20:03:04 +08002851 printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
Nick Cheng36b83de2010-05-17 11:22:42 +08002852 for (i = 0; i < 64; i++) {
2853 pci_read_config_byte(acb->pdev, i, &value[i]);
2854 }
2855 /* hardware reset signal */
Nick Chengae52e7f02010-06-18 15:39:12 +08002856 if ((acb->dev_id == 0x1680)) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08002857 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
2858 } else if ((acb->dev_id == 0x1880)) {
2859 do {
2860 count++;
2861 writel(0xF, &pmuC->write_sequence);
2862 writel(0x4, &pmuC->write_sequence);
2863 writel(0xB, &pmuC->write_sequence);
2864 writel(0x2, &pmuC->write_sequence);
2865 writel(0x7, &pmuC->write_sequence);
2866 writel(0xD, &pmuC->write_sequence);
2867 } while ((((temp = readl(&pmuC->host_diagnostic)) | ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
2868 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
Nick Chengae52e7f02010-06-18 15:39:12 +08002869 } else {
Nick Chengcdd3cb12010-07-13 20:03:04 +08002870 pci_write_config_byte(acb->pdev, 0x84, 0x20);
Nick Chengae52e7f02010-06-18 15:39:12 +08002871 }
Nick Chengcdd3cb12010-07-13 20:03:04 +08002872 msleep(2000);
Nick Cheng36b83de2010-05-17 11:22:42 +08002873 /* write back pci config data */
2874 for (i = 0; i < 64; i++) {
2875 pci_write_config_byte(acb->pdev, i, value[i]);
2876 }
2877 msleep(1000);
2878 return;
2879}
Erich Chen1c57e862006-07-12 08:59:32 -07002880static void arcmsr_iop_init(struct AdapterControlBlock *acb)
2881{
Nick Cheng1a4f5502007-09-13 17:26:40 +08002882 uint32_t intmask_org;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002883 /* disable all outbound interrupt */
2884 intmask_org = arcmsr_disable_outbound_ints(acb);
Nick Cheng76d78302008-02-04 23:53:24 -08002885 arcmsr_wait_firmware_ready(acb);
2886 arcmsr_iop_confirm(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002887 /*start background rebuild*/
2888 arcmsr_start_adapter_bgrb(acb);
2889 /* empty doorbell Qbuffer if door bell ringed */
2890 arcmsr_clear_doorbell_queue_buffer(acb);
Nick Cheng76d78302008-02-04 23:53:24 -08002891 arcmsr_enable_eoi_mode(acb);
Nick Cheng1a4f5502007-09-13 17:26:40 +08002892 /* enable outbound Post Queue,outbound doorbell Interrupt */
2893 arcmsr_enable_outbound_ints(acb, intmask_org);
Erich Chen1c57e862006-07-12 08:59:32 -07002894 acb->acb_flags |= ACB_F_IOP_INITED;
2895}
2896
Nick Cheng36b83de2010-05-17 11:22:42 +08002897static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
Erich Chen1c57e862006-07-12 08:59:32 -07002898{
Erich Chen1c57e862006-07-12 08:59:32 -07002899 struct CommandControlBlock *ccb;
2900 uint32_t intmask_org;
Nick Cheng36b83de2010-05-17 11:22:42 +08002901 uint8_t rtnval = 0x00;
Erich Chen1c57e862006-07-12 08:59:32 -07002902 int i = 0;
NickCheng97b99122011-01-06 17:32:41 +08002903 unsigned long flags;
2904
Erich Chen1c57e862006-07-12 08:59:32 -07002905 if (atomic_read(&acb->ccboutstandingcount) != 0) {
Erich Chen1c57e862006-07-12 08:59:32 -07002906 /* disable all outbound interrupt */
2907 intmask_org = arcmsr_disable_outbound_ints(acb);
Nick Cheng36b83de2010-05-17 11:22:42 +08002908 /* talk to iop 331 outstanding command aborted */
2909 rtnval = arcmsr_abort_allcmd(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07002910 /* clear all outbound posted Q */
Nick Cheng1a4f5502007-09-13 17:26:40 +08002911 arcmsr_done4abort_postqueue(acb);
Erich Chen1c57e862006-07-12 08:59:32 -07002912 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
2913 ccb = acb->pccb_pool[i];
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08002914 if (ccb->startdone == ARCMSR_CCB_START) {
NickCheng97b99122011-01-06 17:32:41 +08002915 scsi_dma_unmap(ccb->pcmd);
2916 ccb->startdone = ARCMSR_CCB_DONE;
2917 ccb->ccb_flags = 0;
2918 spin_lock_irqsave(&acb->ccblist_lock, flags);
2919 list_add_tail(&ccb->list, &acb->ccb_free_list);
2920 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
Erich Chen1c57e862006-07-12 08:59:32 -07002921 }
2922 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002923 atomic_set(&acb->ccboutstandingcount, 0);
Erich Chen1c57e862006-07-12 08:59:32 -07002924 /* enable all outbound interrupt */
2925 arcmsr_enable_outbound_ints(acb, intmask_org);
Nick Cheng36b83de2010-05-17 11:22:42 +08002926 return rtnval;
Erich Chen1c57e862006-07-12 08:59:32 -07002927 }
Nick Cheng36b83de2010-05-17 11:22:42 +08002928 return rtnval;
Erich Chen1c57e862006-07-12 08:59:32 -07002929}
2930
2931static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
2932{
NickCheng97b99122011-01-06 17:32:41 +08002933 struct AdapterControlBlock *acb;
Nick Chengae52e7f02010-06-18 15:39:12 +08002934 uint32_t intmask_org, outbound_doorbell;
2935 int retry_count = 0;
2936 int rtn = FAILED;
Nick Chengae52e7f02010-06-18 15:39:12 +08002937 acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002938 printk(KERN_ERR "arcmsr: executing bus reset eh.....num_resets = %d, num_aborts = %d \n", acb->num_resets, acb->num_aborts);
Nick Cheng36b83de2010-05-17 11:22:42 +08002939 acb->num_resets++;
Nick Cheng36b83de2010-05-17 11:22:42 +08002940
Nick Chengcdd3cb12010-07-13 20:03:04 +08002941 switch(acb->adapter_type){
2942 case ACB_ADAPTER_TYPE_A:{
2943 if (acb->acb_flags & ACB_F_BUS_RESET){
Nick Chengae52e7f02010-06-18 15:39:12 +08002944 long timeout;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002945 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n");
2946 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ);
Nick Chengae52e7f02010-06-18 15:39:12 +08002947 if (timeout) {
2948 return SUCCESS;
2949 }
2950 }
2951 acb->acb_flags |= ACB_F_BUS_RESET;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002952 if (!arcmsr_iop_reset(acb)) {
Nick Chengae52e7f02010-06-18 15:39:12 +08002953 struct MessageUnit_A __iomem *reg;
2954 reg = acb->pmuA;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002955 arcmsr_hardware_reset(acb);
2956 acb->acb_flags &= ~ACB_F_IOP_INITED;
Nick Cheng36b83de2010-05-17 11:22:42 +08002957sleep_again:
Nick Chengcdd3cb12010-07-13 20:03:04 +08002958 arcmsr_sleep_for_bus_reset(cmd);
Nick Chengae52e7f02010-06-18 15:39:12 +08002959 if ((readl(&reg->outbound_msgaddr1) & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) {
Nick Chengcdd3cb12010-07-13 20:03:04 +08002960 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d \n", acb->host->host_no, retry_count);
2961 if (retry_count > retrycount) {
Nick Chengae52e7f02010-06-18 15:39:12 +08002962 acb->fw_flag = FW_DEADLOCK;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002963 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!! \n", acb->host->host_no);
Nick Chengae52e7f02010-06-18 15:39:12 +08002964 return FAILED;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002965 }
2966 retry_count++;
2967 goto sleep_again;
2968 }
2969 acb->acb_flags |= ACB_F_IOP_INITED;
2970 /* disable all outbound interrupt */
2971 intmask_org = arcmsr_disable_outbound_ints(acb);
Nick Chengae52e7f02010-06-18 15:39:12 +08002972 arcmsr_get_firmware_spec(acb);
Nick Chengcdd3cb12010-07-13 20:03:04 +08002973 arcmsr_start_adapter_bgrb(acb);
2974 /* clear Qbuffer if door bell ringed */
2975 outbound_doorbell = readl(&reg->outbound_doorbell);
2976 writel(outbound_doorbell, &reg->outbound_doorbell); /*clear interrupt */
2977 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
2978 /* enable outbound Post Queue,outbound doorbell Interrupt */
2979 arcmsr_enable_outbound_ints(acb, intmask_org);
2980 atomic_set(&acb->rq_map_token, 16);
Nick Chengae52e7f02010-06-18 15:39:12 +08002981 atomic_set(&acb->ante_token_value, 16);
2982 acb->fw_flag = FW_NORMAL;
NickCheng97b99122011-01-06 17:32:41 +08002983 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengae52e7f02010-06-18 15:39:12 +08002984 acb->acb_flags &= ~ACB_F_BUS_RESET;
2985 rtn = SUCCESS;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002986 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n");
Nick Chengae52e7f02010-06-18 15:39:12 +08002987 } else {
2988 acb->acb_flags &= ~ACB_F_BUS_RESET;
NickCheng97b99122011-01-06 17:32:41 +08002989 atomic_set(&acb->rq_map_token, 16);
2990 atomic_set(&acb->ante_token_value, 16);
2991 acb->fw_flag = FW_NORMAL;
2992 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
Nick Chengae52e7f02010-06-18 15:39:12 +08002993 rtn = SUCCESS;
Nick Chengcdd3cb12010-07-13 20:03:04 +08002994 }
2995 break;
2996 }
2997 case ACB_ADAPTER_TYPE_B:{
2998 acb->acb_flags |= ACB_F_BUS_RESET;
2999 if (!arcmsr_iop_reset(acb)) {
3000 acb->acb_flags &= ~ACB_F_BUS_RESET;
3001 rtn = FAILED;
3002 } else {
3003 acb->acb_flags &= ~ACB_F_BUS_RESET;
NickCheng97b99122011-01-06 17:32:41 +08003004 atomic_set(&acb->rq_map_token, 16);
3005 atomic_set(&acb->ante_token_value, 16);
3006 acb->fw_flag = FW_NORMAL;
3007 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08003008 rtn = SUCCESS;
3009 }
3010 break;
3011 }
3012 case ACB_ADAPTER_TYPE_C:{
3013 if (acb->acb_flags & ACB_F_BUS_RESET) {
3014 long timeout;
3015 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n");
3016 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ);
3017 if (timeout) {
3018 return SUCCESS;
3019 }
3020 }
3021 acb->acb_flags |= ACB_F_BUS_RESET;
3022 if (!arcmsr_iop_reset(acb)) {
3023 struct MessageUnit_C __iomem *reg;
3024 reg = acb->pmuC;
3025 arcmsr_hardware_reset(acb);
3026 acb->acb_flags &= ~ACB_F_IOP_INITED;
3027sleep:
3028 arcmsr_sleep_for_bus_reset(cmd);
3029 if ((readl(&reg->host_diagnostic) & 0x04) != 0) {
3030 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d \n", acb->host->host_no, retry_count);
3031 if (retry_count > retrycount) {
3032 acb->fw_flag = FW_DEADLOCK;
3033 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!! \n", acb->host->host_no);
3034 return FAILED;
3035 }
3036 retry_count++;
3037 goto sleep;
3038 }
3039 acb->acb_flags |= ACB_F_IOP_INITED;
3040 /* disable all outbound interrupt */
3041 intmask_org = arcmsr_disable_outbound_ints(acb);
3042 arcmsr_get_firmware_spec(acb);
3043 arcmsr_start_adapter_bgrb(acb);
3044 /* clear Qbuffer if door bell ringed */
3045 outbound_doorbell = readl(&reg->outbound_doorbell);
3046 writel(outbound_doorbell, &reg->outbound_doorbell_clear); /*clear interrupt */
3047 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
3048 /* enable outbound Post Queue,outbound doorbell Interrupt */
3049 arcmsr_enable_outbound_ints(acb, intmask_org);
3050 atomic_set(&acb->rq_map_token, 16);
3051 atomic_set(&acb->ante_token_value, 16);
3052 acb->fw_flag = FW_NORMAL;
NickCheng97b99122011-01-06 17:32:41 +08003053 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08003054 acb->acb_flags &= ~ACB_F_BUS_RESET;
3055 rtn = SUCCESS;
3056 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n");
3057 } else {
3058 acb->acb_flags &= ~ACB_F_BUS_RESET;
NickCheng97b99122011-01-06 17:32:41 +08003059 atomic_set(&acb->rq_map_token, 16);
3060 atomic_set(&acb->ante_token_value, 16);
3061 acb->fw_flag = FW_NORMAL;
3062 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
Nick Chengcdd3cb12010-07-13 20:03:04 +08003063 rtn = SUCCESS;
3064 }
3065 break;
Nick Chengae52e7f02010-06-18 15:39:12 +08003066 }
3067 }
3068 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003069}
3070
Nick Chengae52e7f02010-06-18 15:39:12 +08003071static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
Erich Chen1c57e862006-07-12 08:59:32 -07003072 struct CommandControlBlock *ccb)
3073{
Nick Chengae52e7f02010-06-18 15:39:12 +08003074 int rtn;
Nick Chengae52e7f02010-06-18 15:39:12 +08003075 rtn = arcmsr_polling_ccbdone(acb, ccb);
Nick Chengae52e7f02010-06-18 15:39:12 +08003076 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003077}
3078
3079static int arcmsr_abort(struct scsi_cmnd *cmd)
3080{
3081 struct AdapterControlBlock *acb =
3082 (struct AdapterControlBlock *)cmd->device->host->hostdata;
3083 int i = 0;
Nick Chengae52e7f02010-06-18 15:39:12 +08003084 int rtn = FAILED;
Erich Chen1c57e862006-07-12 08:59:32 -07003085 printk(KERN_NOTICE
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08003086 "arcmsr%d: abort device command of scsi id = %d lun = %d \n",
Erich Chen1c57e862006-07-12 08:59:32 -07003087 acb->host->host_no, cmd->device->id, cmd->device->lun);
Nick Chengae52e7f02010-06-18 15:39:12 +08003088 acb->acb_flags |= ACB_F_ABORT;
Erich Chen1c57e862006-07-12 08:59:32 -07003089 acb->num_aborts++;
Erich Chen1c57e862006-07-12 08:59:32 -07003090 /*
3091 ************************************************
3092 ** the all interrupt service routine is locked
3093 ** we need to handle it as soon as possible and exit
3094 ************************************************
3095 */
3096 if (!atomic_read(&acb->ccboutstandingcount))
Nick Chengae52e7f02010-06-18 15:39:12 +08003097 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003098
3099 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
3100 struct CommandControlBlock *ccb = acb->pccb_pool[i];
3101 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
Nick Chengae52e7f02010-06-18 15:39:12 +08003102 ccb->startdone = ARCMSR_CCB_ABORTED;
3103 rtn = arcmsr_abort_one_cmd(acb, ccb);
Erich Chen1c57e862006-07-12 08:59:32 -07003104 break;
3105 }
3106 }
Nick Chengae52e7f02010-06-18 15:39:12 +08003107 acb->acb_flags &= ~ACB_F_ABORT;
3108 return rtn;
Erich Chen1c57e862006-07-12 08:59:32 -07003109}
3110
3111static const char *arcmsr_info(struct Scsi_Host *host)
3112{
3113 struct AdapterControlBlock *acb =
3114 (struct AdapterControlBlock *) host->hostdata;
3115 static char buf[256];
3116 char *type;
3117 int raid6 = 1;
Erich Chen1c57e862006-07-12 08:59:32 -07003118 switch (acb->pdev->device) {
3119 case PCI_DEVICE_ID_ARECA_1110:
Nick Cheng1a4f5502007-09-13 17:26:40 +08003120 case PCI_DEVICE_ID_ARECA_1200:
3121 case PCI_DEVICE_ID_ARECA_1202:
Erich Chen1c57e862006-07-12 08:59:32 -07003122 case PCI_DEVICE_ID_ARECA_1210:
3123 raid6 = 0;
3124 /*FALLTHRU*/
3125 case PCI_DEVICE_ID_ARECA_1120:
3126 case PCI_DEVICE_ID_ARECA_1130:
3127 case PCI_DEVICE_ID_ARECA_1160:
3128 case PCI_DEVICE_ID_ARECA_1170:
Nick Cheng1a4f5502007-09-13 17:26:40 +08003129 case PCI_DEVICE_ID_ARECA_1201:
Erich Chen1c57e862006-07-12 08:59:32 -07003130 case PCI_DEVICE_ID_ARECA_1220:
3131 case PCI_DEVICE_ID_ARECA_1230:
3132 case PCI_DEVICE_ID_ARECA_1260:
3133 case PCI_DEVICE_ID_ARECA_1270:
3134 case PCI_DEVICE_ID_ARECA_1280:
3135 type = "SATA";
3136 break;
3137 case PCI_DEVICE_ID_ARECA_1380:
3138 case PCI_DEVICE_ID_ARECA_1381:
3139 case PCI_DEVICE_ID_ARECA_1680:
3140 case PCI_DEVICE_ID_ARECA_1681:
Nick Chengcdd3cb12010-07-13 20:03:04 +08003141 case PCI_DEVICE_ID_ARECA_1880:
Erich Chen1c57e862006-07-12 08:59:32 -07003142 type = "SAS";
3143 break;
3144 default:
3145 type = "X-TYPE";
3146 break;
3147 }
nickcheng(鄭守謙a1f6e022007-06-15 11:43:32 +08003148 sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s",
Erich Chen1c57e862006-07-12 08:59:32 -07003149 type, raid6 ? "( RAID6 capable)" : "",
3150 ARCMSR_DRIVER_VERSION);
3151 return buf;
3152}