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Florian Fainelli246d7f72014-08-27 17:04:56 -07001/*
2 * Broadcom Starfighter2 private context
3 *
4 * Copyright (C) 2014, Broadcom Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#ifndef __BCM_SF2_H
13#define __BCM_SF2_H
14
15#include <linux/platform_device.h>
16#include <linux/kernel.h>
17#include <linux/io.h>
18#include <linux/spinlock.h>
19#include <linux/mutex.h>
20#include <linux/mii.h>
Florian Fainelli450b05c2014-09-24 17:05:22 -070021#include <linux/ethtool.h>
Florian Fainelli680060d2015-10-23 11:38:07 -070022#include <linux/types.h>
23#include <linux/bitops.h>
Florian Fainelli9c57a772016-06-09 17:42:08 -070024#include <linux/if_vlan.h>
Florian Fainelli246d7f72014-08-27 17:04:56 -070025
26#include <net/dsa.h>
27
28#include "bcm_sf2_regs.h"
29
30struct bcm_sf2_hw_params {
31 u16 top_rev;
32 u16 core_rev;
Florian Fainelliaa9aef72014-09-19 13:07:55 -070033 u16 gphy_rev;
Florian Fainelli246d7f72014-08-27 17:04:56 -070034 u32 num_gphy;
35 u8 num_acb_queue;
36 u8 num_rgmii;
37 u8 num_ports;
38 u8 fcb_pause_override:1;
39 u8 acb_packets_inflight:1;
40};
41
42#define BCM_SF2_REGS_NAME {\
43 "core", "reg", "intrl2_0", "intrl2_1", "fcb", "acb" \
44}
45
46#define BCM_SF2_REGS_NUM 6
47
48struct bcm_sf2_port_status {
49 unsigned int link;
Florian Fainelli450b05c2014-09-24 17:05:22 -070050
51 struct ethtool_eee eee;
Florian Fainelli12f460f2015-02-24 13:15:34 -080052
53 u32 vlan_ctl_mask;
Florian Fainelli9c57a772016-06-09 17:42:08 -070054 u16 pvid;
Vivien Didelota6692752016-02-12 12:09:39 -050055
56 struct net_device *bridge_dev;
Florian Fainelli246d7f72014-08-27 17:04:56 -070057};
58
Florian Fainelli680060d2015-10-23 11:38:07 -070059struct bcm_sf2_arl_entry {
60 u8 port;
61 u8 mac[ETH_ALEN];
62 u16 vid;
63 u8 is_valid:1;
64 u8 is_age:1;
65 u8 is_static:1;
66};
67
Florian Fainelli9c57a772016-06-09 17:42:08 -070068struct bcm_sf2_vlan {
69 u16 members;
70 u16 untag;
71};
72
Florian Fainelli680060d2015-10-23 11:38:07 -070073static inline void bcm_sf2_mac_from_u64(u64 src, u8 *dst)
74{
75 unsigned int i;
76
77 for (i = 0; i < ETH_ALEN; i++)
78 dst[ETH_ALEN - 1 - i] = (src >> (8 * i)) & 0xff;
79}
80
81static inline u64 bcm_sf2_mac_to_u64(const u8 *src)
82{
83 unsigned int i;
84 u64 dst = 0;
85
86 for (i = 0; i < ETH_ALEN; i++)
87 dst |= (u64)src[ETH_ALEN - 1 - i] << (8 * i);
88
89 return dst;
90}
91
92static inline void bcm_sf2_arl_to_entry(struct bcm_sf2_arl_entry *ent,
93 u64 mac_vid, u32 fwd_entry)
94{
95 memset(ent, 0, sizeof(*ent));
96 ent->port = fwd_entry & PORTID_MASK;
97 ent->is_valid = !!(fwd_entry & ARL_VALID);
98 ent->is_age = !!(fwd_entry & ARL_AGE);
99 ent->is_static = !!(fwd_entry & ARL_STATIC);
100 bcm_sf2_mac_from_u64(mac_vid, ent->mac);
101 ent->vid = mac_vid >> VID_SHIFT;
102}
103
104static inline void bcm_sf2_arl_from_entry(u64 *mac_vid, u32 *fwd_entry,
105 const struct bcm_sf2_arl_entry *ent)
106{
107 *mac_vid = bcm_sf2_mac_to_u64(ent->mac);
108 *mac_vid |= (u64)(ent->vid & VID_MASK) << VID_SHIFT;
109 *fwd_entry = ent->port & PORTID_MASK;
110 if (ent->is_valid)
111 *fwd_entry |= ARL_VALID;
112 if (ent->is_static)
113 *fwd_entry |= ARL_STATIC;
114 if (ent->is_age)
115 *fwd_entry |= ARL_AGE;
116}
117
Florian Fainelli246d7f72014-08-27 17:04:56 -0700118struct bcm_sf2_priv {
119 /* Base registers, keep those in order with BCM_SF2_REGS_NAME */
120 void __iomem *core;
121 void __iomem *reg;
122 void __iomem *intrl2_0;
123 void __iomem *intrl2_1;
124 void __iomem *fcb;
125 void __iomem *acb;
126
127 /* spinlock protecting access to the indirect registers */
128 spinlock_t indir_lock;
129
130 int irq0;
131 int irq1;
132 u32 irq0_stat;
133 u32 irq0_mask;
134 u32 irq1_stat;
135 u32 irq1_mask;
136
137 /* Mutex protecting access to the MIB counters */
138 struct mutex stats_mutex;
139
140 struct bcm_sf2_hw_params hw_params;
141
142 struct bcm_sf2_port_status port_sts[DSA_MAX_PORTS];
Florian Fainelli96e65d72014-09-18 17:31:25 -0700143
144 /* Mask of ports enabled for Wake-on-LAN */
145 u32 wol_ports_mask;
Florian Fainelli8b7c94e2015-10-23 12:11:08 -0700146
147 /* MoCA port location */
148 int moca_port;
149
150 /* Bitmask of ports having an integrated PHY */
151 unsigned int int_phy_mask;
Florian Fainelli461cd1b02016-06-07 16:32:43 -0700152
153 /* Master and slave MDIO bus controller */
154 unsigned int indir_phy_mask;
155 struct device_node *master_mii_dn;
156 struct mii_bus *slave_mii_bus;
157 struct mii_bus *master_mii_bus;
Florian Fainelli9c57a772016-06-09 17:42:08 -0700158
159 /* Cache of programmed VLANs */
160 struct bcm_sf2_vlan vlans[VLAN_N_VID];
Florian Fainelli246d7f72014-08-27 17:04:56 -0700161};
162
163struct bcm_sf2_hw_stats {
164 const char *string;
165 u16 reg;
166 u8 sizeof_stat;
167};
168
169#define SF2_IO_MACRO(name) \
170static inline u32 name##_readl(struct bcm_sf2_priv *priv, u32 off) \
171{ \
172 return __raw_readl(priv->name + off); \
173} \
174static inline void name##_writel(struct bcm_sf2_priv *priv, \
175 u32 val, u32 off) \
176{ \
177 __raw_writel(val, priv->name + off); \
178} \
179
180/* Accesses to 64-bits register requires us to latch the hi/lo pairs
181 * using the REG_DIR_DATA_{READ,WRITE} ancillary registers. The 'indir_lock'
182 * spinlock is automatically grabbed and released to provide relative
183 * atomiticy with latched reads/writes.
184 */
185#define SF2_IO64_MACRO(name) \
186static inline u64 name##_readq(struct bcm_sf2_priv *priv, u32 off) \
187{ \
188 u32 indir, dir; \
189 spin_lock(&priv->indir_lock); \
Florian Fainelli246d7f72014-08-27 17:04:56 -0700190 dir = __raw_readl(priv->name + off); \
Florian Fainelliddede6d2015-02-19 11:09:27 -0800191 indir = reg_readl(priv, REG_DIR_DATA_READ); \
Florian Fainelli246d7f72014-08-27 17:04:56 -0700192 spin_unlock(&priv->indir_lock); \
193 return (u64)indir << 32 | dir; \
194} \
Florian Fainelli03679a12015-09-08 20:06:41 -0700195static inline void name##_writeq(struct bcm_sf2_priv *priv, u64 val, \
196 u32 off) \
Florian Fainelli246d7f72014-08-27 17:04:56 -0700197{ \
198 spin_lock(&priv->indir_lock); \
199 reg_writel(priv, upper_32_bits(val), REG_DIR_DATA_WRITE); \
200 __raw_writel(lower_32_bits(val), priv->name + off); \
201 spin_unlock(&priv->indir_lock); \
202}
203
204#define SWITCH_INTR_L2(which) \
205static inline void intrl2_##which##_mask_clear(struct bcm_sf2_priv *priv, \
206 u32 mask) \
207{ \
208 intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \
209 priv->irq##which##_mask &= ~(mask); \
210} \
211static inline void intrl2_##which##_mask_set(struct bcm_sf2_priv *priv, \
212 u32 mask) \
213{ \
214 intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \
215 priv->irq##which##_mask |= (mask); \
216} \
217
218SF2_IO_MACRO(core);
219SF2_IO_MACRO(reg);
220SF2_IO64_MACRO(core);
221SF2_IO_MACRO(intrl2_0);
222SF2_IO_MACRO(intrl2_1);
223SF2_IO_MACRO(fcb);
224SF2_IO_MACRO(acb);
225
226SWITCH_INTR_L2(0);
227SWITCH_INTR_L2(1);
228
229#endif /* __BCM_SF2_H */