| Mauro Carvalho Chehab | dc7a12b | 2019-04-14 15:51:10 -0300 | [diff] [blame] | 1 | ==================== |
| 2 | S3C24XX NAND Support |
| 3 | ==================== |
| Ben Dooks | 71d54f3 | 2008-04-15 11:36:19 +0100 | [diff] [blame] | 4 | |
| 5 | Introduction |
| 6 | ------------ |
| 7 | |
| 8 | Small Page NAND |
| 9 | --------------- |
| 10 | |
| 11 | The driver uses a 512 byte (1 page) ECC code for this setup. The |
| 12 | ECC code is not directly compatible with the default kernel ECC |
| 13 | code, so the driver enforces its own OOB layout and ECC parameters |
| 14 | |
| 15 | Large Page NAND |
| 16 | --------------- |
| 17 | |
| 18 | The driver is capable of handling NAND flash with a 2KiB page |
| 19 | size, with support for hardware ECC generation and correction. |
| 20 | |
| 21 | Unlike the 512byte page mode, the driver generates ECC data for |
| 22 | each 256 byte block in an 2KiB page. This means that more than |
| 23 | one error in a page can be rectified. It also means that the |
| 24 | OOB layout remains the default kernel layout for these flashes. |
| 25 | |
| 26 | |
| 27 | Document Author |
| 28 | --------------- |
| 29 | |
| 30 | Ben Dooks, Copyright 2007 Simtec Electronics |