blob: c14d762bd652eaf204d5f65a7ef9ab3c716e5406 [file] [log] [blame]
Ben Widawsky0136db52012-04-10 21:17:01 -07001/*
2 * Copyright © 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Ben Widawsky <ben@bwidawsk.net>
25 *
26 */
27
28#include <linux/device.h>
29#include <linux/module.h>
30#include <linux/stat.h>
31#include <linux/sysfs.h>
Chris Wilson56c50982019-04-26 09:17:22 +010032
Andi Shytic1132362019-09-27 12:08:49 +010033#include "gt/intel_rc6.h"
Andi Shyti3e7abf82019-10-24 22:16:41 +010034#include "gt/intel_rps.h"
Andi Shytic1132362019-09-27 12:08:49 +010035
Ben Widawsky0136db52012-04-10 21:17:01 -070036#include "i915_drv.h"
Jani Nikulabe682612019-08-08 16:42:45 +030037#include "i915_sysfs.h"
Jani Nikulaecbb5fb2019-04-29 15:29:37 +030038#include "intel_pm.h"
39#include "intel_sideband.h"
Ben Widawsky0136db52012-04-10 21:17:01 -070040
David Weinehall694c2822016-08-22 13:32:43 +030041static inline struct drm_i915_private *kdev_minor_to_i915(struct device *kdev)
David Weinehallc49d13e2016-08-22 13:32:42 +030042{
David Weinehall694c2822016-08-22 13:32:43 +030043 struct drm_minor *minor = dev_get_drvdata(kdev);
44 return to_i915(minor->dev);
David Weinehallc49d13e2016-08-22 13:32:42 +030045}
Dave Airlie14c8d1102013-10-11 14:45:30 +100046
Hunt Xu5ab36332012-07-01 03:45:07 +000047#ifdef CONFIG_PM
David Weinehall694c2822016-08-22 13:32:43 +030048static u32 calc_residency(struct drm_i915_private *dev_priv,
Ville Syrjäläf0f59a02015-11-18 15:33:26 +020049 i915_reg_t reg)
Ben Widawsky0136db52012-04-10 21:17:01 -070050{
Chris Wilson48d1c812019-01-14 14:21:13 +000051 intel_wakeref_t wakeref;
Chris Wilsond4225a52019-01-14 14:21:23 +000052 u64 res = 0;
Tvrtko Ursulin36cc8b92017-11-21 18:18:51 +000053
Daniele Ceraolo Spurioc447ff72019-06-13 16:21:55 -070054 with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref)
Andi Shytic1132362019-09-27 12:08:49 +010055 res = intel_rc6_residency_us(&dev_priv->gt.rc6, reg);
Tvrtko Ursulin36cc8b92017-11-21 18:18:51 +000056
57 return DIV_ROUND_CLOSEST_ULL(res, 1000);
Ben Widawsky0136db52012-04-10 21:17:01 -070058}
59
60static ssize_t
Ben Widawskydbdfd8e2012-09-07 19:43:38 -070061show_rc6_mask(struct device *kdev, struct device_attribute *attr, char *buf)
Ben Widawsky0136db52012-04-10 21:17:01 -070062{
Chris Wilsonfb6db0f2017-12-01 11:30:30 +000063 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
64 unsigned int mask;
65
66 mask = 0;
67 if (HAS_RC6(dev_priv))
68 mask |= BIT(0);
69 if (HAS_RC6p(dev_priv))
70 mask |= BIT(1);
71 if (HAS_RC6pp(dev_priv))
72 mask |= BIT(2);
73
74 return snprintf(buf, PAGE_SIZE, "%x\n", mask);
Ben Widawsky0136db52012-04-10 21:17:01 -070075}
76
77static ssize_t
Ben Widawskydbdfd8e2012-09-07 19:43:38 -070078show_rc6_ms(struct device *kdev, struct device_attribute *attr, char *buf)
Ben Widawsky0136db52012-04-10 21:17:01 -070079{
David Weinehall694c2822016-08-22 13:32:43 +030080 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
81 u32 rc6_residency = calc_residency(dev_priv, GEN6_GT_GFX_RC6);
Jani Nikula3e2a1552013-02-14 10:42:11 +020082 return snprintf(buf, PAGE_SIZE, "%u\n", rc6_residency);
Ben Widawsky0136db52012-04-10 21:17:01 -070083}
84
85static ssize_t
Ben Widawskydbdfd8e2012-09-07 19:43:38 -070086show_rc6p_ms(struct device *kdev, struct device_attribute *attr, char *buf)
Ben Widawsky0136db52012-04-10 21:17:01 -070087{
David Weinehall694c2822016-08-22 13:32:43 +030088 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
89 u32 rc6p_residency = calc_residency(dev_priv, GEN6_GT_GFX_RC6p);
Jani Nikula3e2a1552013-02-14 10:42:11 +020090 return snprintf(buf, PAGE_SIZE, "%u\n", rc6p_residency);
Ben Widawsky0136db52012-04-10 21:17:01 -070091}
92
93static ssize_t
Ben Widawskydbdfd8e2012-09-07 19:43:38 -070094show_rc6pp_ms(struct device *kdev, struct device_attribute *attr, char *buf)
Ben Widawsky0136db52012-04-10 21:17:01 -070095{
David Weinehall694c2822016-08-22 13:32:43 +030096 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
97 u32 rc6pp_residency = calc_residency(dev_priv, GEN6_GT_GFX_RC6pp);
Jani Nikula3e2a1552013-02-14 10:42:11 +020098 return snprintf(buf, PAGE_SIZE, "%u\n", rc6pp_residency);
Ben Widawsky0136db52012-04-10 21:17:01 -070099}
100
Ville Syrjälä626ad6f2015-02-26 21:10:27 +0530101static ssize_t
102show_media_rc6_ms(struct device *kdev, struct device_attribute *attr, char *buf)
103{
David Weinehall694c2822016-08-22 13:32:43 +0300104 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
105 u32 rc6_residency = calc_residency(dev_priv, VLV_GT_MEDIA_RC6);
Ville Syrjälä626ad6f2015-02-26 21:10:27 +0530106 return snprintf(buf, PAGE_SIZE, "%u\n", rc6_residency);
107}
108
Ben Widawsky0136db52012-04-10 21:17:01 -0700109static DEVICE_ATTR(rc6_enable, S_IRUGO, show_rc6_mask, NULL);
110static DEVICE_ATTR(rc6_residency_ms, S_IRUGO, show_rc6_ms, NULL);
111static DEVICE_ATTR(rc6p_residency_ms, S_IRUGO, show_rc6p_ms, NULL);
112static DEVICE_ATTR(rc6pp_residency_ms, S_IRUGO, show_rc6pp_ms, NULL);
Ville Syrjälä626ad6f2015-02-26 21:10:27 +0530113static DEVICE_ATTR(media_rc6_residency_ms, S_IRUGO, show_media_rc6_ms, NULL);
Ben Widawsky0136db52012-04-10 21:17:01 -0700114
115static struct attribute *rc6_attrs[] = {
116 &dev_attr_rc6_enable.attr,
117 &dev_attr_rc6_residency_ms.attr,
Ben Widawsky0136db52012-04-10 21:17:01 -0700118 NULL
119};
120
Arvind Yadav0a7a0982017-07-03 16:38:25 +0530121static const struct attribute_group rc6_attr_group = {
Ben Widawsky0136db52012-04-10 21:17:01 -0700122 .name = power_group_name,
123 .attrs = rc6_attrs
124};
Rodrigo Vivi58abf1d2014-10-07 07:06:50 -0700125
126static struct attribute *rc6p_attrs[] = {
127 &dev_attr_rc6p_residency_ms.attr,
128 &dev_attr_rc6pp_residency_ms.attr,
129 NULL
130};
131
Arvind Yadav0a7a0982017-07-03 16:38:25 +0530132static const struct attribute_group rc6p_attr_group = {
Rodrigo Vivi58abf1d2014-10-07 07:06:50 -0700133 .name = power_group_name,
134 .attrs = rc6p_attrs
135};
Ville Syrjälä626ad6f2015-02-26 21:10:27 +0530136
137static struct attribute *media_rc6_attrs[] = {
138 &dev_attr_media_rc6_residency_ms.attr,
139 NULL
140};
141
Arvind Yadav0a7a0982017-07-03 16:38:25 +0530142static const struct attribute_group media_rc6_attr_group = {
Ville Syrjälä626ad6f2015-02-26 21:10:27 +0530143 .name = power_group_name,
144 .attrs = media_rc6_attrs
145};
Ben Widawsky8c3f9292012-09-02 00:24:40 -0700146#endif
Ben Widawsky0136db52012-04-10 21:17:01 -0700147
Chris Wilson261ea7e2019-10-04 11:59:58 +0100148static int l3_access_valid(struct drm_i915_private *i915, loff_t offset)
Ben Widawsky84bc7582012-05-25 16:56:25 -0700149{
Chris Wilson261ea7e2019-10-04 11:59:58 +0100150 if (!HAS_L3_DPF(i915))
Ben Widawsky84bc7582012-05-25 16:56:25 -0700151 return -EPERM;
152
Chris Wilson261ea7e2019-10-04 11:59:58 +0100153 if (!IS_ALIGNED(offset, sizeof(u32)))
Ben Widawsky84bc7582012-05-25 16:56:25 -0700154 return -EINVAL;
155
156 if (offset >= GEN7_L3LOG_SIZE)
157 return -ENXIO;
158
159 return 0;
160}
161
162static ssize_t
163i915_l3_read(struct file *filp, struct kobject *kobj,
164 struct bin_attribute *attr, char *buf,
165 loff_t offset, size_t count)
166{
David Weinehallc49d13e2016-08-22 13:32:42 +0300167 struct device *kdev = kobj_to_dev(kobj);
Chris Wilson261ea7e2019-10-04 11:59:58 +0100168 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
Ben Widawsky35a85ac2013-09-19 11:13:41 -0700169 int slice = (int)(uintptr_t)attr->private;
Ben Widawsky3ccfd192013-09-18 19:03:18 -0700170 int ret;
Ben Widawsky84bc7582012-05-25 16:56:25 -0700171
Chris Wilson261ea7e2019-10-04 11:59:58 +0100172 ret = l3_access_valid(i915, offset);
Ben Widawsky84bc7582012-05-25 16:56:25 -0700173 if (ret)
174 return ret;
175
Chris Wilson261ea7e2019-10-04 11:59:58 +0100176 count = round_down(count, sizeof(u32));
Dan Carpentere5ad4022013-09-20 14:20:18 +0300177 count = min_t(size_t, GEN7_L3LOG_SIZE - offset, count);
Chris Wilson261ea7e2019-10-04 11:59:58 +0100178 memset(buf, 0, count);
Ben Widawsky33618ea2013-09-12 22:28:29 -0700179
Chris Wilsona4e7ccd2019-10-04 14:40:09 +0100180 spin_lock(&i915->gem.contexts.lock);
Chris Wilson261ea7e2019-10-04 11:59:58 +0100181 if (i915->l3_parity.remap_info[slice])
Ben Widawsky3ccfd192013-09-18 19:03:18 -0700182 memcpy(buf,
Chris Wilson261ea7e2019-10-04 11:59:58 +0100183 i915->l3_parity.remap_info[slice] + offset / sizeof(u32),
Ben Widawsky3ccfd192013-09-18 19:03:18 -0700184 count);
Chris Wilsona4e7ccd2019-10-04 14:40:09 +0100185 spin_unlock(&i915->gem.contexts.lock);
Ben Widawsky84bc7582012-05-25 16:56:25 -0700186
Ben Widawsky1c966dd2013-09-17 21:12:42 -0700187 return count;
Ben Widawsky84bc7582012-05-25 16:56:25 -0700188}
189
190static ssize_t
191i915_l3_write(struct file *filp, struct kobject *kobj,
192 struct bin_attribute *attr, char *buf,
193 loff_t offset, size_t count)
194{
David Weinehallc49d13e2016-08-22 13:32:42 +0300195 struct device *kdev = kobj_to_dev(kobj);
Chris Wilson261ea7e2019-10-04 11:59:58 +0100196 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
Ben Widawsky35a85ac2013-09-19 11:13:41 -0700197 int slice = (int)(uintptr_t)attr->private;
Chris Wilsona4e7ccd2019-10-04 14:40:09 +0100198 u32 *remap_info, *freeme = NULL;
Chris Wilson261ea7e2019-10-04 11:59:58 +0100199 struct i915_gem_context *ctx;
Ben Widawsky84bc7582012-05-25 16:56:25 -0700200 int ret;
201
Chris Wilson261ea7e2019-10-04 11:59:58 +0100202 ret = l3_access_valid(i915, offset);
Ben Widawsky84bc7582012-05-25 16:56:25 -0700203 if (ret)
204 return ret;
205
Chris Wilson261ea7e2019-10-04 11:59:58 +0100206 if (count < sizeof(u32))
207 return -EINVAL;
208
Chris Wilsona4e7ccd2019-10-04 14:40:09 +0100209 remap_info = kzalloc(GEN7_L3LOG_SIZE, GFP_KERNEL);
210 if (!remap_info)
211 return -ENOMEM;
Ben Widawsky84bc7582012-05-25 16:56:25 -0700212
Chris Wilsona4e7ccd2019-10-04 14:40:09 +0100213 spin_lock(&i915->gem.contexts.lock);
214
215 if (i915->l3_parity.remap_info[slice]) {
216 freeme = remap_info;
217 remap_info = i915->l3_parity.remap_info[slice];
218 } else {
219 i915->l3_parity.remap_info[slice] = remap_info;
Ben Widawsky84bc7582012-05-25 16:56:25 -0700220 }
221
Chris Wilson261ea7e2019-10-04 11:59:58 +0100222 count = round_down(count, sizeof(u32));
Chris Wilsona4e7ccd2019-10-04 14:40:09 +0100223 memcpy(remap_info + offset / sizeof(u32), buf, count);
Chris Wilson261ea7e2019-10-04 11:59:58 +0100224
225 /* NB: We defer the remapping until we switch to the context */
Chris Wilsona4e7ccd2019-10-04 14:40:09 +0100226 list_for_each_entry(ctx, &i915->gem.contexts.list, link)
Chris Wilson261ea7e2019-10-04 11:59:58 +0100227 ctx->remap_slice |= BIT(slice);
228
Chris Wilsona4e7ccd2019-10-04 14:40:09 +0100229 spin_unlock(&i915->gem.contexts.lock);
230 kfree(freeme);
231
Chris Wilson261ea7e2019-10-04 11:59:58 +0100232 /*
233 * TODO: Ideally we really want a GPU reset here to make sure errors
Ben Widawsky84bc7582012-05-25 16:56:25 -0700234 * aren't propagated. Since I cannot find a stable way to reset the GPU
235 * at this point it is left as a TODO.
236 */
Ben Widawsky84bc7582012-05-25 16:56:25 -0700237
Chris Wilsona4e7ccd2019-10-04 14:40:09 +0100238 return count;
Ben Widawsky84bc7582012-05-25 16:56:25 -0700239}
240
Bhumika Goyal59f3da12017-08-02 22:50:47 +0530241static const struct bin_attribute dpf_attrs = {
Ben Widawsky84bc7582012-05-25 16:56:25 -0700242 .attr = {.name = "l3_parity", .mode = (S_IRUSR | S_IWUSR)},
243 .size = GEN7_L3LOG_SIZE,
244 .read = i915_l3_read,
245 .write = i915_l3_write,
Ben Widawsky35a85ac2013-09-19 11:13:41 -0700246 .mmap = NULL,
247 .private = (void *)0
248};
249
Bhumika Goyal59f3da12017-08-02 22:50:47 +0530250static const struct bin_attribute dpf_attrs_1 = {
Ben Widawsky35a85ac2013-09-19 11:13:41 -0700251 .attr = {.name = "l3_parity_slice_1", .mode = (S_IRUSR | S_IWUSR)},
252 .size = GEN7_L3LOG_SIZE,
253 .read = i915_l3_read,
254 .write = i915_l3_write,
255 .mmap = NULL,
256 .private = (void *)1
Ben Widawsky84bc7582012-05-25 16:56:25 -0700257};
258
Ville Syrjäläc8c972e2015-01-23 21:04:24 +0200259static ssize_t gt_act_freq_mhz_show(struct device *kdev,
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700260 struct device_attribute *attr, char *buf)
261{
Andi Shytie03512e2019-12-13 20:37:35 +0200262 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
263 struct intel_rps *rps = &i915->gt.rps;
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700264
Andi Shytie03512e2019-12-13 20:37:35 +0200265 return snprintf(buf, PAGE_SIZE, "%d\n",
266 intel_rps_read_actual_frequency(rps));
Ville Syrjäläc8c972e2015-01-23 21:04:24 +0200267}
268
269static ssize_t gt_cur_freq_mhz_show(struct device *kdev,
270 struct device_attribute *attr, char *buf)
271{
Andi Shytie03512e2019-12-13 20:37:35 +0200272 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
273 struct intel_rps *rps = &i915->gt.rps;
Ville Syrjäläc8c972e2015-01-23 21:04:24 +0200274
Chris Wilson62e1baa2016-07-13 09:10:36 +0100275 return snprintf(buf, PAGE_SIZE, "%d\n",
Andi Shyti3e7abf82019-10-24 22:16:41 +0100276 intel_gpu_freq(rps, rps->cur_freq));
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700277}
278
Chris Wilson29ecd78d2016-07-13 09:10:35 +0100279static ssize_t gt_boost_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
280{
Andi Shytie03512e2019-12-13 20:37:35 +0200281 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
282 struct intel_rps *rps = &i915->gt.rps;
Chris Wilson29ecd78d2016-07-13 09:10:35 +0100283
284 return snprintf(buf, PAGE_SIZE, "%d\n",
Andi Shyti3e7abf82019-10-24 22:16:41 +0100285 intel_gpu_freq(rps, rps->boost_freq));
Chris Wilson29ecd78d2016-07-13 09:10:35 +0100286}
287
288static ssize_t gt_boost_freq_mhz_store(struct device *kdev,
289 struct device_attribute *attr,
290 const char *buf, size_t count)
291{
David Weinehall694c2822016-08-22 13:32:43 +0300292 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
Andi Shyti3e7abf82019-10-24 22:16:41 +0100293 struct intel_rps *rps = &dev_priv->gt.rps;
Chris Wilson59cd31f2018-03-08 14:26:47 +0000294 bool boost = false;
Chris Wilson29ecd78d2016-07-13 09:10:35 +0100295 ssize_t ret;
Chris Wilson59cd31f2018-03-08 14:26:47 +0000296 u32 val;
Chris Wilson29ecd78d2016-07-13 09:10:35 +0100297
298 ret = kstrtou32(buf, 0, &val);
299 if (ret)
300 return ret;
301
302 /* Validate against (static) hardware limits */
Andi Shyti3e7abf82019-10-24 22:16:41 +0100303 val = intel_freq_opcode(rps, val);
Sagar Arun Kamble562d9ba2017-10-10 22:30:06 +0100304 if (val < rps->min_freq || val > rps->max_freq)
Chris Wilson29ecd78d2016-07-13 09:10:35 +0100305 return -EINVAL;
306
Chris Wilsonebb5eb72019-04-26 09:17:21 +0100307 mutex_lock(&rps->lock);
Chris Wilson59cd31f2018-03-08 14:26:47 +0000308 if (val != rps->boost_freq) {
309 rps->boost_freq = val;
310 boost = atomic_read(&rps->num_waiters);
311 }
Chris Wilsonebb5eb72019-04-26 09:17:21 +0100312 mutex_unlock(&rps->lock);
Chris Wilson59cd31f2018-03-08 14:26:47 +0000313 if (boost)
314 schedule_work(&rps->work);
Chris Wilson29ecd78d2016-07-13 09:10:35 +0100315
316 return count;
317}
318
Chris Wilson97e4eed2013-08-26 16:18:54 +0100319static ssize_t vlv_rpe_freq_mhz_show(struct device *kdev,
320 struct device_attribute *attr, char *buf)
321{
David Weinehall694c2822016-08-22 13:32:43 +0300322 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
Andi Shyti3e7abf82019-10-24 22:16:41 +0100323 struct intel_rps *rps = &dev_priv->gt.rps;
Chris Wilson97e4eed2013-08-26 16:18:54 +0100324
Chris Wilson62e1baa2016-07-13 09:10:36 +0100325 return snprintf(buf, PAGE_SIZE, "%d\n",
Andi Shyti3e7abf82019-10-24 22:16:41 +0100326 intel_gpu_freq(rps, rps->efficient_freq));
Chris Wilson97e4eed2013-08-26 16:18:54 +0100327}
328
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700329static ssize_t gt_max_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
330{
David Weinehall694c2822016-08-22 13:32:43 +0300331 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
Andi Shyti3e7abf82019-10-24 22:16:41 +0100332 struct intel_rps *rps = &dev_priv->gt.rps;
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700333
Chris Wilson62e1baa2016-07-13 09:10:36 +0100334 return snprintf(buf, PAGE_SIZE, "%d\n",
Andi Shyti3e7abf82019-10-24 22:16:41 +0100335 intel_gpu_freq(rps, rps->max_freq_softlimit));
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700336}
337
Ben Widawsky46ddf192012-09-12 18:12:07 -0700338static ssize_t gt_max_freq_mhz_store(struct device *kdev,
339 struct device_attribute *attr,
340 const char *buf, size_t count)
341{
David Weinehall694c2822016-08-22 13:32:43 +0300342 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
Andi Shyti3e7abf82019-10-24 22:16:41 +0100343 struct intel_rps *rps = &dev_priv->gt.rps;
Ben Widawsky46ddf192012-09-12 18:12:07 -0700344 ssize_t ret;
Andi Shyti3e7abf82019-10-24 22:16:41 +0100345 u32 val;
Ben Widawsky46ddf192012-09-12 18:12:07 -0700346
347 ret = kstrtou32(buf, 0, &val);
348 if (ret)
349 return ret;
350
Chris Wilsonebb5eb72019-04-26 09:17:21 +0100351 mutex_lock(&rps->lock);
Ben Widawsky46ddf192012-09-12 18:12:07 -0700352
Andi Shyti3e7abf82019-10-24 22:16:41 +0100353 val = intel_freq_opcode(rps, val);
Sagar Arun Kamble562d9ba2017-10-10 22:30:06 +0100354 if (val < rps->min_freq ||
355 val > rps->max_freq ||
356 val < rps->min_freq_softlimit) {
Chris Wilsonebb5eb72019-04-26 09:17:21 +0100357 ret = -EINVAL;
358 goto unlock;
Ben Widawsky46ddf192012-09-12 18:12:07 -0700359 }
360
Sagar Arun Kamble562d9ba2017-10-10 22:30:06 +0100361 if (val > rps->rp0_freq)
Ben Widawsky31c77382013-04-05 14:29:22 -0700362 DRM_DEBUG("User requested overclocking to %d\n",
Andi Shyti3e7abf82019-10-24 22:16:41 +0100363 intel_gpu_freq(rps, val));
Ben Widawsky31c77382013-04-05 14:29:22 -0700364
Sagar Arun Kamble562d9ba2017-10-10 22:30:06 +0100365 rps->max_freq_softlimit = val;
Ben Widawsky46ddf192012-09-12 18:12:07 -0700366
Sagar Arun Kamble562d9ba2017-10-10 22:30:06 +0100367 val = clamp_t(int, rps->cur_freq,
368 rps->min_freq_softlimit,
369 rps->max_freq_softlimit);
Ville Syrjäläf745a802015-01-23 21:04:23 +0200370
Andi Shyti3e7abf82019-10-24 22:16:41 +0100371 /*
372 * We still need *_set_rps to process the new max_delay and
Ville Syrjäläf745a802015-01-23 21:04:23 +0200373 * update the interrupt limits and PMINTRMSK even though
Andi Shyti3e7abf82019-10-24 22:16:41 +0100374 * frequency request may be unchanged.
375 */
376 intel_rps_set(rps, val);
Chris Wilson6917c7b2013-11-06 13:56:26 -0200377
Chris Wilsonebb5eb72019-04-26 09:17:21 +0100378unlock:
379 mutex_unlock(&rps->lock);
Sagar Arun Kamble933bfb42016-02-08 22:47:11 +0530380
Chris Wilson9fcee2f2017-01-26 10:19:19 +0000381 return ret ?: count;
Ben Widawsky46ddf192012-09-12 18:12:07 -0700382}
383
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700384static ssize_t gt_min_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
385{
David Weinehall694c2822016-08-22 13:32:43 +0300386 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
Andi Shyti3e7abf82019-10-24 22:16:41 +0100387 struct intel_rps *rps = &dev_priv->gt.rps;
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700388
Chris Wilson62e1baa2016-07-13 09:10:36 +0100389 return snprintf(buf, PAGE_SIZE, "%d\n",
Andi Shyti3e7abf82019-10-24 22:16:41 +0100390 intel_gpu_freq(rps, rps->min_freq_softlimit));
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700391}
392
Ben Widawsky46ddf192012-09-12 18:12:07 -0700393static ssize_t gt_min_freq_mhz_store(struct device *kdev,
394 struct device_attribute *attr,
395 const char *buf, size_t count)
396{
David Weinehall694c2822016-08-22 13:32:43 +0300397 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
Andi Shyti3e7abf82019-10-24 22:16:41 +0100398 struct intel_rps *rps = &dev_priv->gt.rps;
Ben Widawsky46ddf192012-09-12 18:12:07 -0700399 ssize_t ret;
Andi Shyti3e7abf82019-10-24 22:16:41 +0100400 u32 val;
Ben Widawsky46ddf192012-09-12 18:12:07 -0700401
402 ret = kstrtou32(buf, 0, &val);
403 if (ret)
404 return ret;
405
Chris Wilsonebb5eb72019-04-26 09:17:21 +0100406 mutex_lock(&rps->lock);
Ben Widawsky46ddf192012-09-12 18:12:07 -0700407
Andi Shyti3e7abf82019-10-24 22:16:41 +0100408 val = intel_freq_opcode(rps, val);
Sagar Arun Kamble562d9ba2017-10-10 22:30:06 +0100409 if (val < rps->min_freq ||
410 val > rps->max_freq ||
411 val > rps->max_freq_softlimit) {
Chris Wilsonebb5eb72019-04-26 09:17:21 +0100412 ret = -EINVAL;
413 goto unlock;
Ben Widawsky46ddf192012-09-12 18:12:07 -0700414 }
415
Sagar Arun Kamble562d9ba2017-10-10 22:30:06 +0100416 rps->min_freq_softlimit = val;
Chris Wilson6917c7b2013-11-06 13:56:26 -0200417
Sagar Arun Kamble562d9ba2017-10-10 22:30:06 +0100418 val = clamp_t(int, rps->cur_freq,
419 rps->min_freq_softlimit,
420 rps->max_freq_softlimit);
Ville Syrjäläf745a802015-01-23 21:04:23 +0200421
Andi Shyti3e7abf82019-10-24 22:16:41 +0100422 /*
423 * We still need *_set_rps to process the new min_delay and
Ville Syrjäläf745a802015-01-23 21:04:23 +0200424 * update the interrupt limits and PMINTRMSK even though
Andi Shyti3e7abf82019-10-24 22:16:41 +0100425 * frequency request may be unchanged.
426 */
427 intel_rps_set(rps, val);
Ben Widawsky46ddf192012-09-12 18:12:07 -0700428
Chris Wilsonebb5eb72019-04-26 09:17:21 +0100429unlock:
430 mutex_unlock(&rps->lock);
Sagar Arun Kamble933bfb42016-02-08 22:47:11 +0530431
Chris Wilson9fcee2f2017-01-26 10:19:19 +0000432 return ret ?: count;
Ben Widawsky46ddf192012-09-12 18:12:07 -0700433}
434
Joe Perchesc828a892017-12-19 10:15:08 -0800435static DEVICE_ATTR_RO(gt_act_freq_mhz);
436static DEVICE_ATTR_RO(gt_cur_freq_mhz);
Joe Perchesb6b996b2017-12-19 10:15:07 -0800437static DEVICE_ATTR_RW(gt_boost_freq_mhz);
438static DEVICE_ATTR_RW(gt_max_freq_mhz);
439static DEVICE_ATTR_RW(gt_min_freq_mhz);
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700440
Joe Perchesc828a892017-12-19 10:15:08 -0800441static DEVICE_ATTR_RO(vlv_rpe_freq_mhz);
Ben Widawskyac6ae342012-09-07 19:43:44 -0700442
443static ssize_t gt_rp_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf);
444static DEVICE_ATTR(gt_RP0_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL);
445static DEVICE_ATTR(gt_RP1_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL);
446static DEVICE_ATTR(gt_RPn_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL);
447
448/* For now we have a static number of RP states */
449static ssize_t gt_rp_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
450{
David Weinehall694c2822016-08-22 13:32:43 +0300451 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
Andi Shyti3e7abf82019-10-24 22:16:41 +0100452 struct intel_rps *rps = &dev_priv->gt.rps;
Akash Goelbc4d91f2015-02-26 16:09:47 +0530453 u32 val;
Ben Widawskyac6ae342012-09-07 19:43:44 -0700454
Akash Goelbc4d91f2015-02-26 16:09:47 +0530455 if (attr == &dev_attr_gt_RP0_freq_mhz)
Andi Shyti3e7abf82019-10-24 22:16:41 +0100456 val = intel_gpu_freq(rps, rps->rp0_freq);
Akash Goelbc4d91f2015-02-26 16:09:47 +0530457 else if (attr == &dev_attr_gt_RP1_freq_mhz)
Andi Shyti3e7abf82019-10-24 22:16:41 +0100458 val = intel_gpu_freq(rps, rps->rp1_freq);
Akash Goelbc4d91f2015-02-26 16:09:47 +0530459 else if (attr == &dev_attr_gt_RPn_freq_mhz)
Andi Shyti3e7abf82019-10-24 22:16:41 +0100460 val = intel_gpu_freq(rps, rps->min_freq);
Akash Goelbc4d91f2015-02-26 16:09:47 +0530461 else
Ben Widawskyac6ae342012-09-07 19:43:44 -0700462 BUG();
Akash Goelbc4d91f2015-02-26 16:09:47 +0530463
Jani Nikula3e2a1552013-02-14 10:42:11 +0200464 return snprintf(buf, PAGE_SIZE, "%d\n", val);
Ben Widawskyac6ae342012-09-07 19:43:44 -0700465}
466
Jani Nikulae1215de2018-10-04 17:37:50 +0300467static const struct attribute * const gen6_attrs[] = {
Ville Syrjäläc8c972e2015-01-23 21:04:24 +0200468 &dev_attr_gt_act_freq_mhz.attr,
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700469 &dev_attr_gt_cur_freq_mhz.attr,
Chris Wilson29ecd78d2016-07-13 09:10:35 +0100470 &dev_attr_gt_boost_freq_mhz.attr,
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700471 &dev_attr_gt_max_freq_mhz.attr,
472 &dev_attr_gt_min_freq_mhz.attr,
Ben Widawskyac6ae342012-09-07 19:43:44 -0700473 &dev_attr_gt_RP0_freq_mhz.attr,
474 &dev_attr_gt_RP1_freq_mhz.attr,
475 &dev_attr_gt_RPn_freq_mhz.attr,
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700476 NULL,
477};
478
Jani Nikulae1215de2018-10-04 17:37:50 +0300479static const struct attribute * const vlv_attrs[] = {
Ville Syrjäläc8c972e2015-01-23 21:04:24 +0200480 &dev_attr_gt_act_freq_mhz.attr,
Chris Wilson97e4eed2013-08-26 16:18:54 +0100481 &dev_attr_gt_cur_freq_mhz.attr,
Chris Wilson29ecd78d2016-07-13 09:10:35 +0100482 &dev_attr_gt_boost_freq_mhz.attr,
Chris Wilson97e4eed2013-08-26 16:18:54 +0100483 &dev_attr_gt_max_freq_mhz.attr,
484 &dev_attr_gt_min_freq_mhz.attr,
Deepak S74c4f622014-07-10 13:16:22 +0530485 &dev_attr_gt_RP0_freq_mhz.attr,
486 &dev_attr_gt_RP1_freq_mhz.attr,
487 &dev_attr_gt_RPn_freq_mhz.attr,
Chris Wilson97e4eed2013-08-26 16:18:54 +0100488 &dev_attr_vlv_rpe_freq_mhz.attr,
489 NULL,
490};
491
Chris Wilson98a2f412016-10-12 10:05:18 +0100492#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
493
Mika Kuoppalaef86ddc2013-06-06 17:38:54 +0300494static ssize_t error_state_read(struct file *filp, struct kobject *kobj,
495 struct bin_attribute *attr, char *buf,
496 loff_t off, size_t count)
497{
498
Geliang Tang657fb5f2016-01-13 22:48:40 +0800499 struct device *kdev = kobj_to_dev(kobj);
Chris Wilson0e390372018-11-23 13:23:25 +0000500 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev);
Chris Wilson742379c2020-01-10 12:30:56 +0000501 struct i915_gpu_coredump *gpu;
Chris Wilson5a4c6f12017-02-14 16:46:11 +0000502 ssize_t ret;
Mika Kuoppalaef86ddc2013-06-06 17:38:54 +0300503
Chris Wilson0e390372018-11-23 13:23:25 +0000504 gpu = i915_first_error_state(i915);
Chris Wilsone6154e42018-12-07 11:05:54 +0000505 if (IS_ERR(gpu)) {
506 ret = PTR_ERR(gpu);
507 } else if (gpu) {
Chris Wilson742379c2020-01-10 12:30:56 +0000508 ret = i915_gpu_coredump_copy_to_buffer(gpu, buf, off, count);
509 i915_gpu_coredump_put(gpu);
Chris Wilson0e390372018-11-23 13:23:25 +0000510 } else {
511 const char *str = "No error state collected\n";
512 size_t len = strlen(str);
Mika Kuoppalaef86ddc2013-06-06 17:38:54 +0300513
Chris Wilson0e390372018-11-23 13:23:25 +0000514 ret = min_t(size_t, count, len - off);
515 memcpy(buf, str + off, ret);
516 }
Mika Kuoppalaef86ddc2013-06-06 17:38:54 +0300517
Chris Wilson5a4c6f12017-02-14 16:46:11 +0000518 return ret;
Mika Kuoppalaef86ddc2013-06-06 17:38:54 +0300519}
520
521static ssize_t error_state_write(struct file *file, struct kobject *kobj,
522 struct bin_attribute *attr, char *buf,
523 loff_t off, size_t count)
524{
Geliang Tang657fb5f2016-01-13 22:48:40 +0800525 struct device *kdev = kobj_to_dev(kobj);
David Weinehall694c2822016-08-22 13:32:43 +0300526 struct drm_i915_private *dev_priv = kdev_minor_to_i915(kdev);
Mika Kuoppalaef86ddc2013-06-06 17:38:54 +0300527
Wambui Karuga00376cc2020-01-31 12:34:12 +0300528 drm_dbg(&dev_priv->drm, "Resetting error state\n");
Chris Wilson5a4c6f12017-02-14 16:46:11 +0000529 i915_reset_error_state(dev_priv);
Mika Kuoppalaef86ddc2013-06-06 17:38:54 +0300530
531 return count;
532}
533
Bhumika Goyal59f3da12017-08-02 22:50:47 +0530534static const struct bin_attribute error_state_attr = {
Mika Kuoppalaef86ddc2013-06-06 17:38:54 +0300535 .attr.name = "error",
536 .attr.mode = S_IRUSR | S_IWUSR,
537 .size = 0,
538 .read = error_state_read,
539 .write = error_state_write,
540};
541
Chris Wilson98a2f412016-10-12 10:05:18 +0100542static void i915_setup_error_capture(struct device *kdev)
543{
544 if (sysfs_create_bin_file(&kdev->kobj, &error_state_attr))
545 DRM_ERROR("error_state sysfs setup failed\n");
546}
547
548static void i915_teardown_error_capture(struct device *kdev)
549{
550 sysfs_remove_bin_file(&kdev->kobj, &error_state_attr);
551}
552#else
553static void i915_setup_error_capture(struct device *kdev) {}
554static void i915_teardown_error_capture(struct device *kdev) {}
555#endif
556
David Weinehall694c2822016-08-22 13:32:43 +0300557void i915_setup_sysfs(struct drm_i915_private *dev_priv)
Ben Widawsky0136db52012-04-10 21:17:01 -0700558{
David Weinehall694c2822016-08-22 13:32:43 +0300559 struct device *kdev = dev_priv->drm.primary->kdev;
Ben Widawsky0136db52012-04-10 21:17:01 -0700560 int ret;
561
Ben Widawsky8c3f9292012-09-02 00:24:40 -0700562#ifdef CONFIG_PM
David Weinehall694c2822016-08-22 13:32:43 +0300563 if (HAS_RC6(dev_priv)) {
564 ret = sysfs_merge_group(&kdev->kobj,
Daniel Vetter112abd22012-05-31 14:57:43 +0200565 &rc6_attr_group);
566 if (ret)
Wambui Karuga00376cc2020-01-31 12:34:12 +0300567 drm_err(&dev_priv->drm,
568 "RC6 residency sysfs setup failed\n");
Daniel Vetter112abd22012-05-31 14:57:43 +0200569 }
David Weinehall694c2822016-08-22 13:32:43 +0300570 if (HAS_RC6p(dev_priv)) {
571 ret = sysfs_merge_group(&kdev->kobj,
Rodrigo Vivi58abf1d2014-10-07 07:06:50 -0700572 &rc6p_attr_group);
573 if (ret)
Wambui Karuga00376cc2020-01-31 12:34:12 +0300574 drm_err(&dev_priv->drm,
575 "RC6p residency sysfs setup failed\n");
Rodrigo Vivi58abf1d2014-10-07 07:06:50 -0700576 }
David Weinehall694c2822016-08-22 13:32:43 +0300577 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
578 ret = sysfs_merge_group(&kdev->kobj,
Ville Syrjälä626ad6f2015-02-26 21:10:27 +0530579 &media_rc6_attr_group);
580 if (ret)
Wambui Karuga00376cc2020-01-31 12:34:12 +0300581 drm_err(&dev_priv->drm,
582 "Media RC6 residency sysfs setup failed\n");
Ville Syrjälä626ad6f2015-02-26 21:10:27 +0530583 }
Ben Widawsky8c3f9292012-09-02 00:24:40 -0700584#endif
David Weinehall694c2822016-08-22 13:32:43 +0300585 if (HAS_L3_DPF(dev_priv)) {
586 ret = device_create_bin_file(kdev, &dpf_attrs);
Daniel Vetter112abd22012-05-31 14:57:43 +0200587 if (ret)
Wambui Karuga00376cc2020-01-31 12:34:12 +0300588 drm_err(&dev_priv->drm,
589 "l3 parity sysfs setup failed\n");
Ben Widawsky35a85ac2013-09-19 11:13:41 -0700590
David Weinehall694c2822016-08-22 13:32:43 +0300591 if (NUM_L3_SLICES(dev_priv) > 1) {
592 ret = device_create_bin_file(kdev,
Ben Widawsky35a85ac2013-09-19 11:13:41 -0700593 &dpf_attrs_1);
594 if (ret)
Wambui Karuga00376cc2020-01-31 12:34:12 +0300595 drm_err(&dev_priv->drm,
596 "l3 parity slice 1 setup failed\n");
Ben Widawsky35a85ac2013-09-19 11:13:41 -0700597 }
Daniel Vetter112abd22012-05-31 14:57:43 +0200598 }
Ben Widawskydf6eedc2012-09-07 19:43:40 -0700599
Chris Wilson97e4eed2013-08-26 16:18:54 +0100600 ret = 0;
David Weinehall694c2822016-08-22 13:32:43 +0300601 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
602 ret = sysfs_create_files(&kdev->kobj, vlv_attrs);
603 else if (INTEL_GEN(dev_priv) >= 6)
604 ret = sysfs_create_files(&kdev->kobj, gen6_attrs);
Chris Wilson97e4eed2013-08-26 16:18:54 +0100605 if (ret)
Wambui Karuga00376cc2020-01-31 12:34:12 +0300606 drm_err(&dev_priv->drm, "RPS sysfs setup failed\n");
Mika Kuoppalaef86ddc2013-06-06 17:38:54 +0300607
Chris Wilson98a2f412016-10-12 10:05:18 +0100608 i915_setup_error_capture(kdev);
Ben Widawsky0136db52012-04-10 21:17:01 -0700609}
610
David Weinehall694c2822016-08-22 13:32:43 +0300611void i915_teardown_sysfs(struct drm_i915_private *dev_priv)
Ben Widawsky0136db52012-04-10 21:17:01 -0700612{
David Weinehall694c2822016-08-22 13:32:43 +0300613 struct device *kdev = dev_priv->drm.primary->kdev;
614
Chris Wilson98a2f412016-10-12 10:05:18 +0100615 i915_teardown_error_capture(kdev);
616
David Weinehall694c2822016-08-22 13:32:43 +0300617 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
618 sysfs_remove_files(&kdev->kobj, vlv_attrs);
Chris Wilson97e4eed2013-08-26 16:18:54 +0100619 else
David Weinehall694c2822016-08-22 13:32:43 +0300620 sysfs_remove_files(&kdev->kobj, gen6_attrs);
621 device_remove_bin_file(kdev, &dpf_attrs_1);
622 device_remove_bin_file(kdev, &dpf_attrs);
Ben Widawsky853c70e2012-09-19 10:50:19 -0700623#ifdef CONFIG_PM
David Weinehall694c2822016-08-22 13:32:43 +0300624 sysfs_unmerge_group(&kdev->kobj, &rc6_attr_group);
625 sysfs_unmerge_group(&kdev->kobj, &rc6p_attr_group);
Ben Widawsky853c70e2012-09-19 10:50:19 -0700626#endif
Ben Widawsky0136db52012-04-10 21:17:01 -0700627}