| Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 1 | /* arch/arm/mach-s3c2410/include/mach/regs-rtc.h |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 2 | * |
| 3 | * Copyright (c) 2003 Simtec Electronics <linux@simtec.co.uk> |
| 4 | * http://www.simtec.co.uk/products/SWLINUX/ |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * S3C2410 Internal RTC register definition |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | */ |
| 12 | |
| 13 | #ifndef __ASM_ARCH_REGS_RTC_H |
| 14 | #define __ASM_ARCH_REGS_RTC_H __FILE__ |
| 15 | |
| Ben Dooks | 9a65451 | 2006-08-27 01:23:22 -0700 | [diff] [blame] | 16 | #define S3C2410_RTCREG(x) (x) |
| Atul Dahiya | 002d31e | 2010-07-20 16:02:51 +0530 | [diff] [blame^] | 17 | #define S3C2410_INTP S3C2410_RTCREG(0x30) |
| 18 | #define S3C2410_INTP_ALM (1 << 1) |
| 19 | #define S3C2410_INTP_TIC (1 << 0) |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 20 | |
| 21 | #define S3C2410_RTCCON S3C2410_RTCREG(0x40) |
| 22 | #define S3C2410_RTCCON_RTCEN (1<<0) |
| 23 | #define S3C2410_RTCCON_CLKSEL (1<<1) |
| 24 | #define S3C2410_RTCCON_CNTSEL (1<<2) |
| 25 | #define S3C2410_RTCCON_CLKRST (1<<3) |
| Maurus Cuelenaere | 9f4123b | 2010-05-24 14:33:43 -0700 | [diff] [blame] | 26 | #define S3C64XX_RTCCON_TICEN (1<<8) |
| 27 | |
| 28 | #define S3C64XX_RTCCON_TICMSK (0xF<<7) |
| 29 | #define S3C64XX_RTCCON_TICSHT (7) |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 30 | |
| 31 | #define S3C2410_TICNT S3C2410_RTCREG(0x44) |
| 32 | #define S3C2410_TICNT_ENABLE (1<<7) |
| 33 | |
| 34 | #define S3C2410_RTCALM S3C2410_RTCREG(0x50) |
| 35 | #define S3C2410_RTCALM_ALMEN (1<<6) |
| 36 | #define S3C2410_RTCALM_YEAREN (1<<5) |
| 37 | #define S3C2410_RTCALM_MONEN (1<<4) |
| 38 | #define S3C2410_RTCALM_DAYEN (1<<3) |
| 39 | #define S3C2410_RTCALM_HOUREN (1<<2) |
| 40 | #define S3C2410_RTCALM_MINEN (1<<1) |
| 41 | #define S3C2410_RTCALM_SECEN (1<<0) |
| 42 | |
| 43 | #define S3C2410_RTCALM_ALL \ |
| 44 | S3C2410_RTCALM_ALMEN | S3C2410_RTCALM_YEAREN | S3C2410_RTCALM_MONEN |\ |
| 45 | S3C2410_RTCALM_DAYEN | S3C2410_RTCALM_HOUREN | S3C2410_RTCALM_MINEN |\ |
| 46 | S3C2410_RTCALM_SECEN |
| 47 | |
| 48 | |
| 49 | #define S3C2410_ALMSEC S3C2410_RTCREG(0x54) |
| 50 | #define S3C2410_ALMMIN S3C2410_RTCREG(0x58) |
| 51 | #define S3C2410_ALMHOUR S3C2410_RTCREG(0x5c) |
| 52 | |
| 53 | #define S3C2410_ALMDATE S3C2410_RTCREG(0x60) |
| 54 | #define S3C2410_ALMMON S3C2410_RTCREG(0x64) |
| 55 | #define S3C2410_ALMYEAR S3C2410_RTCREG(0x68) |
| 56 | |
| 57 | #define S3C2410_RTCRST S3C2410_RTCREG(0x6c) |
| 58 | |
| 59 | #define S3C2410_RTCSEC S3C2410_RTCREG(0x70) |
| 60 | #define S3C2410_RTCMIN S3C2410_RTCREG(0x74) |
| 61 | #define S3C2410_RTCHOUR S3C2410_RTCREG(0x78) |
| 62 | #define S3C2410_RTCDATE S3C2410_RTCREG(0x7c) |
| 63 | #define S3C2410_RTCDAY S3C2410_RTCREG(0x80) |
| 64 | #define S3C2410_RTCMON S3C2410_RTCREG(0x84) |
| 65 | #define S3C2410_RTCYEAR S3C2410_RTCREG(0x88) |
| 66 | |
| 67 | |
| 68 | #endif /* __ASM_ARCH_REGS_RTC_H */ |