| commit | cd65dd4180df66f5b469e2a52caae3bfe38d5526 | [log] [tgz] |
|---|---|---|
| author | Alexandre Belloni <alexandre.belloni@bootlin.com> | Thu Mar 05 17:04:51 2020 +0100 |
| committer | Alexandre Belloni <alexandre.belloni@bootlin.com> | Mon Mar 16 11:12:09 2020 +0100 |
| tree | 3fad5fb24ebf324145589223bc79ed79889de929 | |
| parent | 2911ee9e60d9013dae0abc86719e884b5dfb4fda [diff] |
rtc: sirfsoc: set range This RTC is a 32bit counter running at 16Hz. This overflows every eight years and a half. However, the driver uses the SW_VALUE register to store the overflow, extending the counter to 64bit as long as the update happens before the overflow. Link: https://lore.kernel.org/r/20200305160452.27808-2-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>