tree 3fad5fb24ebf324145589223bc79ed79889de929
parent 2911ee9e60d9013dae0abc86719e884b5dfb4fda
author Alexandre Belloni <alexandre.belloni@bootlin.com> 1583424291 +0100
committer Alexandre Belloni <alexandre.belloni@bootlin.com> 1584353529 +0100

rtc: sirfsoc: set range

This RTC is a 32bit counter running at 16Hz. This overflows every eight
years and a half. However, the driver uses the SW_VALUE register to store
the overflow, extending the counter to 64bit as long as the update happens
before the overflow.

Link: https://lore.kernel.org/r/20200305160452.27808-2-alexandre.belloni@bootlin.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>