| # |
| # Loongson Processors' Support |
| # |
| |
| cflags-$(CONFIG_CPU_LOONGSON2EF) += -Wa,--trap |
| cflags-$(CONFIG_CPU_LOONGSON2E) += -march=loongson2e |
| cflags-$(CONFIG_CPU_LOONGSON2F) += -march=loongson2f |
| # |
| # Some versions of binutils, not currently mainline as of 2019/02/04, support |
| # an -mfix-loongson3-llsc flag which emits a sync prior to each ll instruction |
| # to work around a CPU bug (see __SYNC_loongson3_war in asm/sync.h for a |
| # description). |
| # |
| # We disable this in order to prevent the assembler meddling with the |
| # instruction that labels refer to, ie. if we label an ll instruction: |
| # |
| # 1: ll v0, 0(a0) |
| # |
| # ...then with the assembler fix applied the label may actually point at a sync |
| # instruction inserted by the assembler, and if we were using the label in an |
| # exception table the table would no longer contain the address of the ll |
| # instruction. |
| # |
| # Avoid this by explicitly disabling that assembler behaviour. If upstream |
| # binutils does not merge support for the flag then we can revisit & remove |
| # this later - for now it ensures vendor toolchains don't cause problems. |
| # |
| cflags-$(CONFIG_CPU_LOONGSON2EF) += $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,) |
| |
| # Enable the workarounds for Loongson2f |
| ifdef CONFIG_CPU_LOONGSON2F_WORKAROUNDS |
| cflags-$(CONFIG_CPU_NOP_WORKAROUNDS) += -Wa,-mfix-loongson2f-nop |
| cflags-$(CONFIG_CPU_JUMP_WORKAROUNDS) += -Wa,-mfix-loongson2f-jump |
| endif |
| |
| # Some -march= flags enable MMI instructions, and GCC complains about that |
| # support being enabled alongside -msoft-float. Thus explicitly disable MMI. |
| cflags-y += $(call cc-option,-mno-loongson-mmi) |
| |
| # |
| # Loongson Machines' Support |
| # |
| |
| cflags-$(CONFIG_MACH_LOONGSON2EF) += -I$(srctree)/arch/mips/include/asm/mach-loongson2ef -mno-branch-likely |
| load-$(CONFIG_LEMOTE_FULOONG2E) += 0xffffffff80100000 |
| load-$(CONFIG_LEMOTE_MACH2F) += 0xffffffff80200000 |