| # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/watchdog/renesas,wdt.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Renesas Watchdog Timer (WDT) Controller |
| |
| maintainers: |
| - Wolfram Sang <wsa+renesas@sang-engineering.com> |
| - Geert Uytterhoeven <geert+renesas@glider.be> |
| |
| properties: |
| compatible: |
| oneOf: |
| - items: |
| - enum: |
| - renesas,r7s72100-wdt # RZ/A1 |
| - renesas,r7s9210-wdt # RZ/A2 |
| - const: renesas,rza-wdt # RZ/A |
| |
| - items: |
| - enum: |
| - renesas,r9a07g044-wdt # RZ/G2{L,LC} |
| - const: renesas,rzg2l-wdt # RZ/G2L |
| |
| - items: |
| - enum: |
| - renesas,r8a7742-wdt # RZ/G1H |
| - renesas,r8a7743-wdt # RZ/G1M |
| - renesas,r8a7744-wdt # RZ/G1N |
| - renesas,r8a7745-wdt # RZ/G1E |
| - renesas,r8a77470-wdt # RZ/G1C |
| - renesas,r8a7790-wdt # R-Car H2 |
| - renesas,r8a7791-wdt # R-Car M2-W |
| - renesas,r8a7792-wdt # R-Car V2H |
| - renesas,r8a7793-wdt # R-Car M2-N |
| - renesas,r8a7794-wdt # R-Car E2 |
| - const: renesas,rcar-gen2-wdt # R-Car Gen2 and RZ/G1 |
| |
| - items: |
| - enum: |
| - renesas,r8a774a1-wdt # RZ/G2M |
| - renesas,r8a774b1-wdt # RZ/G2N |
| - renesas,r8a774c0-wdt # RZ/G2E |
| - renesas,r8a774e1-wdt # RZ/G2H |
| - renesas,r8a7795-wdt # R-Car H3 |
| - renesas,r8a7796-wdt # R-Car M3-W |
| - renesas,r8a77961-wdt # R-Car M3-W+ |
| - renesas,r8a77965-wdt # R-Car M3-N |
| - renesas,r8a77970-wdt # R-Car V3M |
| - renesas,r8a77980-wdt # R-Car V3H |
| - renesas,r8a77990-wdt # R-Car E3 |
| - renesas,r8a77995-wdt # R-Car D3 |
| - renesas,r8a779a0-wdt # R-Car V3U |
| - const: renesas,rcar-gen3-wdt # R-Car Gen3 and RZ/G2 |
| |
| reg: |
| maxItems: 1 |
| |
| interrupts: true |
| |
| interrupt-names: true |
| |
| clocks: true |
| |
| clock-names: true |
| |
| power-domains: |
| maxItems: 1 |
| |
| resets: |
| maxItems: 1 |
| |
| timeout-sec: true |
| |
| required: |
| - compatible |
| - reg |
| - clocks |
| |
| allOf: |
| - $ref: "watchdog.yaml#" |
| |
| - if: |
| not: |
| properties: |
| compatible: |
| contains: |
| enum: |
| - renesas,rza-wdt |
| then: |
| required: |
| - power-domains |
| - resets |
| |
| - if: |
| properties: |
| compatible: |
| contains: |
| enum: |
| - renesas,rzg2l-wdt |
| then: |
| properties: |
| interrupts: |
| maxItems: 2 |
| interrupt-names: |
| items: |
| - const: wdt |
| - const: perrout |
| clocks: |
| items: |
| - description: Register access clock |
| - description: Main clock |
| clock-names: |
| items: |
| - const: pclk |
| - const: oscclk |
| required: |
| - clock-names |
| - interrupt-names |
| else: |
| properties: |
| interrupts: |
| maxItems: 1 |
| clocks: |
| maxItems: 1 |
| |
| additionalProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/r8a7795-cpg-mssr.h> |
| #include <dt-bindings/power/r8a7795-sysc.h> |
| wdt0: watchdog@e6020000 { |
| compatible = "renesas,r8a7795-wdt", "renesas,rcar-gen3-wdt"; |
| reg = <0xe6020000 0x0c>; |
| clocks = <&cpg CPG_MOD 402>; |
| power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; |
| resets = <&cpg 402>; |
| timeout-sec = <60>; |
| }; |