Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/samsung,exynos7-clock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung Exynos7 SoC clock controller

maintainers:
  - Chanwoo Choi <cw00.choi@samsung.com>
  - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
  - Sylwester Nawrocki <s.nawrocki@samsung.com>
  - Tomasz Figa <tomasz.figa@gmail.com>

description: |
  Expected external clocks, defined in DTS as fixed-rate clocks with a matching
  name::
    - "fin_pll" - PLL input clock from XXTI

  All available clocks are defined as preprocessor macros in
  include/dt-bindings/clock/exynos7-clk.h header.

properties:
  compatible:
    enum:
      - samsung,exynos7-clock-topc
      - samsung,exynos7-clock-top0
      - samsung,exynos7-clock-top1
      - samsung,exynos7-clock-ccore
      - samsung,exynos7-clock-peric0
      - samsung,exynos7-clock-peric1
      - samsung,exynos7-clock-peris
      - samsung,exynos7-clock-fsys0
      - samsung,exynos7-clock-fsys1
      - samsung,exynos7-clock-mscl
      - samsung,exynos7-clock-aud

  clocks:
    minItems: 1
    maxItems: 13

  clock-names:
    minItems: 1
    maxItems: 13

  "#clock-cells":
    const: 1

  reg:
    maxItems: 1

required:
  - compatible
  - "#clock-cells"
  - reg

allOf:
  - if:
      properties:
        compatible:
          contains:
            const: samsung,exynos7-clock-top0
    then:
      properties:
        clocks:
          minItems: 6
          maxItems: 6
        clock-names:
          items:
            - const: fin_pll
            - const: dout_sclk_bus0_pll
            - const: dout_sclk_bus1_pll
            - const: dout_sclk_cc_pll
            - const: dout_sclk_mfc_pll
            - const: dout_sclk_aud_pll
      required:
        - clock-names
        - clocks

  - if:
      properties:
        compatible:
          contains:
            const: samsung,exynos7-clock-top1
    then:
      properties:
        clocks:
          minItems: 5
          maxItems: 5
        clock-names:
          items:
            - const: fin_pll
            - const: dout_sclk_bus0_pll
            - const: dout_sclk_bus1_pll
            - const: dout_sclk_cc_pll
            - const: dout_sclk_mfc_pll
      required:
        - clock-names
        - clocks

  - if:
      properties:
        compatible:
          contains:
            const: samsung,exynos7-clock-ccore
    then:
      properties:
        clocks:
          minItems: 2
          maxItems: 2
        clock-names:
          items:
            - const: fin_pll
            - const: dout_aclk_ccore_133
      required:
        - clock-names
        - clocks

  - if:
      properties:
        compatible:
          contains:
            const: samsung,exynos7-clock-peric0
    then:
      properties:
        clocks:
          minItems: 3
          maxItems: 3
        clock-names:
          items:
            - const: fin_pll
            - const: dout_aclk_peric0_66
            - const: sclk_uart0
      required:
        - clock-names
        - clocks

  - if:
      properties:
        compatible:
          contains:
            const: samsung,exynos7-clock-peric1
    then:
      properties:
        clocks:
          minItems: 13
          maxItems: 13
        clock-names:
          items:
            - const: fin_pll
            - const: dout_aclk_peric1_66
            - const: sclk_uart1
            - const: sclk_uart2
            - const: sclk_uart3
            - const: sclk_spi0
            - const: sclk_spi1
            - const: sclk_spi2
            - const: sclk_spi3
            - const: sclk_spi4
            - const: sclk_i2s1
            - const: sclk_pcm1
            - const: sclk_spdif
      required:
        - clock-names
        - clocks

  - if:
      properties:
        compatible:
          contains:
            const: samsung,exynos7-clock-peris
    then:
      properties:
        clocks:
          minItems: 2
          maxItems: 2
        clock-names:
          items:
            - const: fin_pll
            - const: dout_aclk_peris_66
      required:
        - clock-names
        - clocks

  - if:
      properties:
        compatible:
          contains:
            const: samsung,exynos7-clock-fsys0
    then:
      properties:
        clocks:
          minItems: 3
          maxItems: 3
        clock-names:
          items:
            - const: fin_pll
            - const: dout_aclk_fsys0_200
            - const: dout_sclk_mmc2
      required:
        - clock-names
        - clocks

  - if:
      properties:
        compatible:
          contains:
            const: samsung,exynos7-clock-fsys1
    then:
      properties:
        clocks:
          minItems: 7
          maxItems: 7
        clock-names:
          items:
            - const: fin_pll
            - const: dout_aclk_fsys1_200
            - const: dout_sclk_mmc0
            - const: dout_sclk_mmc1
            - const: dout_sclk_ufsunipro20
            - const: dout_sclk_phy_fsys1
            - const: dout_sclk_phy_fsys1_26m
      required:
        - clock-names
        - clocks

  - if:
      properties:
        compatible:
          contains:
            const: samsung,exynos7-clock-aud
    then:
      properties:
        clocks:
          minItems: 2
          maxItems: 2
        clock-names:
          items:
            - const: fin_pll
            - const: fout_aud_pll
      required:
        - clock-names
        - clocks

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/exynos7-clk.h>

    fin_pll: clock {
        compatible = "fixed-clock";
        clock-output-names = "fin_pll";
        #clock-cells = <0>;
        clock-frequency = <24000000>;
    };

    clock-controller@105e0000 {
        compatible = "samsung,exynos7-clock-top1";
        reg = <0x105e0000 0xb000>;
        #clock-cells = <1>;
        clocks = <&fin_pll>,
                 <&clock_topc DOUT_SCLK_BUS0_PLL>,
                 <&clock_topc DOUT_SCLK_BUS1_PLL>,
                 <&clock_topc DOUT_SCLK_CC_PLL>,
                 <&clock_topc DOUT_SCLK_MFC_PLL>;
        clock-names = "fin_pll",
                      "dout_sclk_bus0_pll",
                      "dout_sclk_bus1_pll",
                      "dout_sclk_cc_pll",
                      "dout_sclk_mfc_pll";
    };