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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001/* SPDX-License-Identifier: GPL-2.0 */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 * Purpose: PCI Express Port Bus Driver's Internal Data Structures
4 *
5 * Copyright (C) 2004 Intel
6 * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com)
7 */
8
9#ifndef _PORTDRV_H_
10#define _PORTDRV_H_
11
Andrew Morton3ec6a8d2006-09-25 16:52:20 -070012#include <linux/compiler.h>
13
Bjorn Helgaasd8508822018-03-09 11:21:30 -060014extern bool pcie_ports_native;
Bjorn Helgaas842b4472018-03-09 11:21:29 -060015
Bjorn Helgaasef794262018-03-09 11:42:01 -060016/* Service Type */
17#define PCIE_PORT_SERVICE_PME_SHIFT 0 /* Power Management Event */
18#define PCIE_PORT_SERVICE_PME (1 << PCIE_PORT_SERVICE_PME_SHIFT)
19#define PCIE_PORT_SERVICE_AER_SHIFT 1 /* Advanced Error Reporting */
20#define PCIE_PORT_SERVICE_AER (1 << PCIE_PORT_SERVICE_AER_SHIFT)
21#define PCIE_PORT_SERVICE_HP_SHIFT 2 /* Native Hotplug */
22#define PCIE_PORT_SERVICE_HP (1 << PCIE_PORT_SERVICE_HP_SHIFT)
Bjorn Helgaas168f3ae2018-03-09 11:21:24 -060023#define PCIE_PORT_SERVICE_DPC_SHIFT 3 /* Downstream Port Containment */
Bjorn Helgaasef794262018-03-09 11:42:01 -060024#define PCIE_PORT_SERVICE_DPC (1 << PCIE_PORT_SERVICE_DPC_SHIFT)
25
Bjorn Helgaas168f3ae2018-03-09 11:21:24 -060026#define PCIE_PORT_DEVICE_MAXSERVICES 4
Bjorn Helgaasef794262018-03-09 11:42:01 -060027
28/* Port Type */
29#define PCIE_ANY_PORT (~0)
30
31struct pcie_device {
32 int irq; /* Service IRQ/MSI/MSI-X Vector */
33 struct pci_dev *port; /* Root/Upstream/Downstream Port */
34 u32 service; /* Port service this device represents */
35 void *priv_data; /* Service Private Data */
36 struct device device; /* Generic Device Interface */
37};
38#define to_pcie_device(d) container_of(d, struct pcie_device, device)
39
40static inline void set_service_data(struct pcie_device *dev, void *data)
41{
42 dev->priv_data = data;
43}
44
45static inline void *get_service_data(struct pcie_device *dev)
46{
47 return dev->priv_data;
48}
49
50struct pcie_port_service_driver {
51 const char *name;
52 int (*probe) (struct pcie_device *dev);
53 void (*remove) (struct pcie_device *dev);
54 int (*suspend) (struct pcie_device *dev);
55 int (*resume) (struct pcie_device *dev);
56
57 /* Device driver may resume normal operations */
58 void (*error_resume)(struct pci_dev *dev);
59
60 /* Link Reset Capability - AER service driver specific */
61 pci_ers_result_t (*reset_link) (struct pci_dev *dev);
62
63 int port_type; /* Type of the port this driver can handle */
64 u32 service; /* Port service this device represents */
65
66 struct device_driver driver;
67};
68#define to_service_driver(d) \
69 container_of(d, struct pcie_port_service_driver, driver)
70
71int pcie_port_service_register(struct pcie_port_service_driver *new);
72void pcie_port_service_unregister(struct pcie_port_service_driver *new);
73
Rafael J. Wysockib43d4512009-01-24 00:23:22 +010074/*
Gabriele Paolonia1d5f182017-05-23 15:23:58 +010075 * The PCIe Capability Interrupt Message Number (PCIe r3.1, sec 7.8.2) must
76 * be one of the first 32 MSI-X entries. Per PCI r3.0, sec 6.8.3.1, MSI
77 * supports a maximum of 32 vectors per function.
Rafael J. Wysockib43d4512009-01-24 00:23:22 +010078 */
Gabriele Paolonia1d5f182017-05-23 15:23:58 +010079#define PCIE_PORT_MAX_MSI_ENTRIES 32
Linus Torvalds1da177e2005-04-16 15:20:36 -070080
Keith Busch6d814172016-05-03 09:58:11 -050081#define get_descriptor_id(type, service) (((type - 4) << 8) | service)
Linus Torvalds1da177e2005-04-16 15:20:36 -070082
83extern struct bus_type pcie_port_bus_type;
Bjorn Helgaasf39d5b72013-04-12 12:02:59 -060084int pcie_port_device_register(struct pci_dev *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -070085#ifdef CONFIG_PM
Bjorn Helgaasf39d5b72013-04-12 12:02:59 -060086int pcie_port_device_suspend(struct device *dev);
87int pcie_port_device_resume(struct device *dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -070088#endif
Bjorn Helgaasf39d5b72013-04-12 12:02:59 -060089void pcie_port_device_remove(struct pci_dev *dev);
90int __must_check pcie_port_bus_register(void);
91void pcie_port_bus_unregister(void);
Linus Torvalds1da177e2005-04-16 15:20:36 -070092
Rafael J. Wysocki28eb5f22010-08-21 22:02:38 +020093struct pci_dev;
94
Rafael J. Wysockic39fae12010-02-17 23:40:07 +010095#ifdef CONFIG_PCIE_PME
96extern bool pcie_pme_msi_disabled;
97
98static inline void pcie_pme_disable_msi(void)
99{
100 pcie_pme_msi_disabled = true;
101}
102
103static inline bool pcie_pme_no_msi(void)
104{
105 return pcie_pme_msi_disabled;
106}
Rafael J. Wysocki28eb5f22010-08-21 22:02:38 +0200107
Bjorn Helgaasf39d5b72013-04-12 12:02:59 -0600108void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable);
Rafael J. Wysockic39fae12010-02-17 23:40:07 +0100109#else /* !CONFIG_PCIE_PME */
110static inline void pcie_pme_disable_msi(void) {}
111static inline bool pcie_pme_no_msi(void) { return false; }
Rafael J. Wysocki28eb5f22010-08-21 22:02:38 +0200112static inline void pcie_pme_interrupt_enable(struct pci_dev *dev, bool en) {}
Rafael J. Wysockic39fae12010-02-17 23:40:07 +0100113#endif /* !CONFIG_PCIE_PME */
114
Oza Pawandeepf252d062018-05-17 16:44:16 -0500115struct pcie_port_service_driver *pcie_port_find_service(struct pci_dev *dev,
116 u32 service);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700117#endif /* _PORTDRV_H_ */