| Liming Sun | 79e29cb | 2019-10-07 11:48:46 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | /* |
| 3 | * Copyright (c) 2019, Mellanox Technologies. All rights reserved. |
| 4 | */ |
| 5 | |
| 6 | #ifndef __MLXBF_BOOTCTL_H__ |
| 7 | #define __MLXBF_BOOTCTL_H__ |
| 8 | |
| 9 | /* |
| 10 | * Request that the on-chip watchdog be enabled, or disabled, after |
| 11 | * the next chip soft reset. This call does not affect the current |
| 12 | * status of the on-chip watchdog. If non-zero, the argument |
| 13 | * specifies the watchdog interval in seconds. If zero, the watchdog |
| 14 | * will not be enabled after the next soft reset. Non-zero errors are |
| 15 | * returned as documented below. |
| 16 | */ |
| 17 | #define MLXBF_BOOTCTL_SET_POST_RESET_WDOG 0x82000000 |
| 18 | |
| 19 | /* |
| 20 | * Query the status which has been requested for the on-chip watchdog |
| 21 | * after the next chip soft reset. Returns the interval as set by |
| 22 | * MLXBF_BOOTCTL_SET_POST_RESET_WDOG. |
| 23 | */ |
| 24 | #define MLXBF_BOOTCTL_GET_POST_RESET_WDOG 0x82000001 |
| 25 | |
| 26 | /* |
| 27 | * Request that a specific boot action be taken at the next soft |
| 28 | * reset. By default, the boot action is set by external chip pins, |
| 29 | * which are sampled on hard reset. Note that the boot action |
| 30 | * requested by this call will persist on subsequent resets unless |
| 31 | * this service, or the MLNX_SET_SECOND_RESET_ACTION service, is |
| 32 | * invoked. See below for the available MLNX_BOOT_xxx parameter |
| 33 | * values. Non-zero errors are returned as documented below. |
| 34 | */ |
| 35 | #define MLXBF_BOOTCTL_SET_RESET_ACTION 0x82000002 |
| 36 | |
| 37 | /* |
| 38 | * Return the specific boot action which will be taken at the next |
| 39 | * soft reset. Returns the reset action (see below for the parameter |
| 40 | * values for MLXBF_BOOTCTL_SET_RESET_ACTION). |
| 41 | */ |
| 42 | #define MLXBF_BOOTCTL_GET_RESET_ACTION 0x82000003 |
| 43 | |
| 44 | /* |
| 45 | * Request that a specific boot action be taken at the soft reset |
| 46 | * after the next soft reset. For a specified valid boot mode, the |
| 47 | * effect of this call is identical to that of invoking |
| 48 | * MLXBF_BOOTCTL_SET_RESET_ACTION after the next chip soft reset; in |
| 49 | * particular, after that reset, the action for the now next reset can |
| 50 | * be queried with MLXBF_BOOTCTL_GET_RESET_ACTION and modified with |
| 51 | * MLXBF_BOOTCTL_SET_RESET_ACTION. You may also specify the parameter as |
| 52 | * MLNX_BOOT_NONE, which is equivalent to specifying that no call to |
| 53 | * MLXBF_BOOTCTL_SET_RESET_ACTION be taken after the next chip soft reset. |
| 54 | * This call does not affect the action to be taken at the next soft |
| 55 | * reset. Non-zero errors are returned as documented below. |
| 56 | */ |
| 57 | #define MLXBF_BOOTCTL_SET_SECOND_RESET_ACTION 0x82000004 |
| 58 | |
| 59 | /* |
| 60 | * Return the specific boot action which will be taken at the soft |
| 61 | * reset after the next soft reset; this will be one of the valid |
| 62 | * actions for MLXBF_BOOTCTL_SET_SECOND_RESET_ACTION. |
| 63 | */ |
| 64 | #define MLXBF_BOOTCTL_GET_SECOND_RESET_ACTION 0x82000005 |
| 65 | |
| 66 | /* |
| 67 | * Return the fuse status of the current chip. The caller should specify |
| 68 | * with the second argument if the state of the lifecycle fuses or the |
| 69 | * version of secure boot fuse keys left should be returned. |
| 70 | */ |
| 71 | #define MLXBF_BOOTCTL_GET_TBB_FUSE_STATUS 0x82000006 |
| 72 | |
| 73 | /* Reset eMMC by programming the RST_N register. */ |
| 74 | #define MLXBF_BOOTCTL_SET_EMMC_RST_N 0x82000007 |
| 75 | |
| 76 | #define MLXBF_BOOTCTL_GET_DIMM_INFO 0x82000008 |
| 77 | |
| 78 | /* SMC function IDs for SiP Service queries */ |
| 79 | #define MLXBF_BOOTCTL_SIP_SVC_CALL_COUNT 0x8200ff00 |
| 80 | #define MLXBF_BOOTCTL_SIP_SVC_UID 0x8200ff01 |
| 81 | #define MLXBF_BOOTCTL_SIP_SVC_VERSION 0x8200ff03 |
| 82 | |
| 83 | /* ARM Standard Service Calls version numbers */ |
| 84 | #define MLXBF_BOOTCTL_SVC_VERSION_MAJOR 0x0 |
| 85 | #define MLXBF_BOOTCTL_SVC_VERSION_MINOR 0x2 |
| 86 | |
| 87 | /* Number of svc calls defined. */ |
| 88 | #define MLXBF_BOOTCTL_NUM_SVC_CALLS 12 |
| 89 | |
| 90 | /* Valid reset actions for MLXBF_BOOTCTL_SET_RESET_ACTION. */ |
| 91 | #define MLXBF_BOOTCTL_EXTERNAL 0 /* Not boot from eMMC */ |
| 92 | #define MLXBF_BOOTCTL_EMMC 1 /* From primary eMMC boot partition */ |
| 93 | #define MLNX_BOOTCTL_SWAP_EMMC 2 /* Swap eMMC boot partitions and reboot */ |
| 94 | #define MLXBF_BOOTCTL_EMMC_LEGACY 3 /* From primary eMMC in legacy mode */ |
| 95 | |
| 96 | /* Valid arguments for requesting the fuse status. */ |
| 97 | #define MLXBF_BOOTCTL_FUSE_STATUS_LIFECYCLE 0 /* Return lifecycle status. */ |
| 98 | #define MLXBF_BOOTCTL_FUSE_STATUS_KEYS 1 /* Return secure boot key status */ |
| 99 | |
| 100 | /* Additional value to disable the MLXBF_BOOTCTL_SET_SECOND_RESET_ACTION. */ |
| 101 | #define MLXBF_BOOTCTL_NONE 0x7fffffff /* Don't change next boot action */ |
| 102 | |
| 103 | #endif /* __MLXBF_BOOTCTL_H__ */ |