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Michael Buesch61e115a2007-09-18 15:12:50 -04001#ifndef LINUX_SSB_H_
2#define LINUX_SSB_H_
3
4#include <linux/device.h>
5#include <linux/list.h>
6#include <linux/types.h>
7#include <linux/spinlock.h>
8#include <linux/pci.h>
9#include <linux/mod_devicetable.h>
10
11#include <linux/ssb/ssb_regs.h>
12
13
14struct pcmcia_device;
15struct ssb_bus;
16struct ssb_driver;
17
Michael Buesch61e115a2007-09-18 15:12:50 -040018struct ssb_sprom {
19 u8 revision;
Larry Fingerac82fab2007-11-09 16:54:45 -060020 u8 il0mac[6]; /* MAC address for 802.11b/g */
21 u8 et0mac[6]; /* MAC address for Ethernet */
22 u8 et1mac[6]; /* MAC address for 802.11a */
23 u8 et0phyaddr; /* MII address for enet0 */
24 u8 et1phyaddr; /* MII address for enet1 */
Michael Buesche861b982007-12-22 21:51:30 +010025 u8 et0mdcport; /* MDIO for enet0 */
26 u8 et1mdcport; /* MDIO for enet1 */
27 u8 board_rev; /* Board revision number from SPROM. */
Larry Fingerac82fab2007-11-09 16:54:45 -060028 u8 country_code; /* Country Code */
Michael Buesche861b982007-12-22 21:51:30 +010029 u8 ant_available_a; /* A-PHY antenna available bits (up to 4) */
30 u8 ant_available_bg; /* B/G-PHY antenna available bits (up to 4) */
Larry Fingerac82fab2007-11-09 16:54:45 -060031 u16 pa0b0;
32 u16 pa0b1;
33 u16 pa0b2;
34 u16 pa1b0;
35 u16 pa1b1;
36 u16 pa1b2;
37 u8 gpio0; /* GPIO pin 0 */
38 u8 gpio1; /* GPIO pin 1 */
39 u8 gpio2; /* GPIO pin 2 */
40 u8 gpio3; /* GPIO pin 3 */
41 u16 maxpwr_a; /* A-PHY Amplifier Max Power (in dBm Q5.2) */
42 u16 maxpwr_bg; /* B/G-PHY Amplifier Max Power (in dBm Q5.2) */
43 u8 itssi_a; /* Idle TSSI Target for A-PHY */
44 u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */
45 u16 boardflags_lo; /* Boardflags (low 16 bits) */
Michael Bueschaf4b74502008-01-13 21:08:24 +010046 u16 boardflags_hi; /* Boardflags (high 16 bits) */
Michael Buesche861b982007-12-22 21:51:30 +010047
48 /* Antenna gain values for up to 4 antennas
49 * on each band. Values in dBm/4 (Q5.2). Negative gain means the
50 * loss in the connectors is bigger than the gain. */
51 struct {
52 struct {
53 s8 a0, a1, a2, a3;
54 } ghz24; /* 2.4GHz band */
55 struct {
56 s8 a0, a1, a2, a3;
57 } ghz5; /* 5GHz band */
58 } antenna_gain;
Larry Fingerac82fab2007-11-09 16:54:45 -060059
60 /* TODO - add any parameters needed from rev 2, 3, or 4 SPROMs */
Michael Buesch61e115a2007-09-18 15:12:50 -040061};
62
63/* Information about the PCB the circuitry is soldered on. */
64struct ssb_boardinfo {
65 u16 vendor;
66 u16 type;
67 u16 rev;
68};
69
70
71struct ssb_device;
72/* Lowlevel read/write operations on the device MMIO.
73 * Internal, don't use that outside of ssb. */
74struct ssb_bus_ops {
Michael Bueschffc76892008-02-20 19:08:10 +010075 u8 (*read8)(struct ssb_device *dev, u16 offset);
Michael Buesch61e115a2007-09-18 15:12:50 -040076 u16 (*read16)(struct ssb_device *dev, u16 offset);
77 u32 (*read32)(struct ssb_device *dev, u16 offset);
Michael Bueschffc76892008-02-20 19:08:10 +010078 void (*write8)(struct ssb_device *dev, u16 offset, u8 value);
Michael Buesch61e115a2007-09-18 15:12:50 -040079 void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
80 void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
81};
82
83
84/* Core-ID values. */
85#define SSB_DEV_CHIPCOMMON 0x800
86#define SSB_DEV_ILINE20 0x801
87#define SSB_DEV_SDRAM 0x803
88#define SSB_DEV_PCI 0x804
89#define SSB_DEV_MIPS 0x805
90#define SSB_DEV_ETHERNET 0x806
91#define SSB_DEV_V90 0x807
92#define SSB_DEV_USB11_HOSTDEV 0x808
93#define SSB_DEV_ADSL 0x809
94#define SSB_DEV_ILINE100 0x80A
95#define SSB_DEV_IPSEC 0x80B
96#define SSB_DEV_PCMCIA 0x80D
97#define SSB_DEV_INTERNAL_MEM 0x80E
98#define SSB_DEV_MEMC_SDRAM 0x80F
99#define SSB_DEV_EXTIF 0x811
100#define SSB_DEV_80211 0x812
101#define SSB_DEV_MIPS_3302 0x816
102#define SSB_DEV_USB11_HOST 0x817
103#define SSB_DEV_USB11_DEV 0x818
104#define SSB_DEV_USB20_HOST 0x819
105#define SSB_DEV_USB20_DEV 0x81A
106#define SSB_DEV_SDIO_HOST 0x81B
107#define SSB_DEV_ROBOSWITCH 0x81C
108#define SSB_DEV_PARA_ATA 0x81D
109#define SSB_DEV_SATA_XORDMA 0x81E
110#define SSB_DEV_ETHERNET_GBIT 0x81F
111#define SSB_DEV_PCIE 0x820
112#define SSB_DEV_MIMO_PHY 0x821
113#define SSB_DEV_SRAM_CTRLR 0x822
114#define SSB_DEV_MINI_MACPHY 0x823
115#define SSB_DEV_ARM_1176 0x824
116#define SSB_DEV_ARM_7TDMI 0x825
117
118/* Vendor-ID values */
119#define SSB_VENDOR_BROADCOM 0x4243
120
121/* Some kernel subsystems poke with dev->drvdata, so we must use the
122 * following ugly workaround to get from struct device to struct ssb_device */
123struct __ssb_dev_wrapper {
124 struct device dev;
125 struct ssb_device *sdev;
126};
127
128struct ssb_device {
129 /* Having a copy of the ops pointer in each dev struct
130 * is an optimization. */
131 const struct ssb_bus_ops *ops;
132
133 struct device *dev;
134 struct ssb_bus *bus;
135 struct ssb_device_id id;
136
137 u8 core_index;
138 unsigned int irq;
139
140 /* Internal-only stuff follows. */
141 void *drvdata; /* Per-device data */
142 void *devtypedata; /* Per-devicetype (eg 802.11) data */
143};
144
145/* Go from struct device to struct ssb_device. */
146static inline
147struct ssb_device * dev_to_ssb_dev(struct device *dev)
148{
149 struct __ssb_dev_wrapper *wrap;
150 wrap = container_of(dev, struct __ssb_dev_wrapper, dev);
151 return wrap->sdev;
152}
153
154/* Device specific user data */
155static inline
156void ssb_set_drvdata(struct ssb_device *dev, void *data)
157{
158 dev->drvdata = data;
159}
160static inline
161void * ssb_get_drvdata(struct ssb_device *dev)
162{
163 return dev->drvdata;
164}
165
166/* Devicetype specific user data. This is per device-type (not per device) */
167void ssb_set_devtypedata(struct ssb_device *dev, void *data);
168static inline
169void * ssb_get_devtypedata(struct ssb_device *dev)
170{
171 return dev->devtypedata;
172}
173
174
175struct ssb_driver {
176 const char *name;
177 const struct ssb_device_id *id_table;
178
179 int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id);
180 void (*remove)(struct ssb_device *dev);
181 int (*suspend)(struct ssb_device *dev, pm_message_t state);
182 int (*resume)(struct ssb_device *dev);
183 void (*shutdown)(struct ssb_device *dev);
184
185 struct device_driver drv;
186};
187#define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
188
189extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
190static inline int ssb_driver_register(struct ssb_driver *drv)
191{
192 return __ssb_driver_register(drv, THIS_MODULE);
193}
194extern void ssb_driver_unregister(struct ssb_driver *drv);
195
196
197
198
199enum ssb_bustype {
200 SSB_BUSTYPE_SSB, /* This SSB bus is the system bus */
201 SSB_BUSTYPE_PCI, /* SSB is connected to PCI bus */
202 SSB_BUSTYPE_PCMCIA, /* SSB is connected to PCMCIA bus */
203};
204
205/* board_vendor */
206#define SSB_BOARDVENDOR_BCM 0x14E4 /* Broadcom */
207#define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
208#define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
209/* board_type */
210#define SSB_BOARD_BCM94306MP 0x0418
211#define SSB_BOARD_BCM4309G 0x0421
212#define SSB_BOARD_BCM4306CB 0x0417
213#define SSB_BOARD_BCM4309MP 0x040C
214#define SSB_BOARD_MP4318 0x044A
215#define SSB_BOARD_BU4306 0x0416
216#define SSB_BOARD_BU4309 0x040A
217/* chip_package */
218#define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */
219#define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */
220#define SSB_CHIPPACK_BCM4712L 0 /* Large 340pin 4712 */
221
222#include <linux/ssb/ssb_driver_chipcommon.h>
223#include <linux/ssb/ssb_driver_mips.h>
224#include <linux/ssb/ssb_driver_extif.h>
225#include <linux/ssb/ssb_driver_pci.h>
226
227struct ssb_bus {
228 /* The MMIO area. */
229 void __iomem *mmio;
230
231 const struct ssb_bus_ops *ops;
232
233 /* The core in the basic address register window. (PCI bus only) */
234 struct ssb_device *mapped_device;
235 /* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
236 u8 mapped_pcmcia_seg;
Michael Buesch993e1c72007-12-22 22:01:36 +0100237 /* Lock for core and segment switching.
238 * On PCMCIA-host busses this is used to protect the whole MMIO access. */
Michael Buesch61e115a2007-09-18 15:12:50 -0400239 spinlock_t bar_lock;
240
241 /* The bus this backplane is running on. */
242 enum ssb_bustype bustype;
243 /* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */
244 struct pci_dev *host_pci;
245 /* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
246 struct pcmcia_device *host_pcmcia;
247
Michael Buesche7ec2e32008-03-10 17:26:32 +0100248#ifdef CONFIG_SSB_SPROM
Michael Buesch61e115a2007-09-18 15:12:50 -0400249 /* Mutex to protect the SPROM writing. */
Michael Buesche7ec2e32008-03-10 17:26:32 +0100250 struct mutex sprom_mutex;
Michael Buesch61e115a2007-09-18 15:12:50 -0400251#endif
252
253 /* ID information about the Chip. */
254 u16 chip_id;
255 u16 chip_rev;
Larry Fingerc272ef42007-11-09 16:56:25 -0600256 u16 sprom_size; /* number of words in sprom */
Michael Buesch61e115a2007-09-18 15:12:50 -0400257 u8 chip_package;
258
259 /* List of devices (cores) on the backplane. */
260 struct ssb_device devices[SSB_MAX_NR_CORES];
261 u8 nr_devices;
262
263 /* Reference count. Number of suspended devices. */
264 u8 suspend_cnt;
265
266 /* Software ID number for this bus. */
267 unsigned int busnumber;
268
269 /* The ChipCommon device (if available). */
270 struct ssb_chipcommon chipco;
271 /* The PCI-core device (if available). */
272 struct ssb_pcicore pcicore;
273 /* The MIPS-core device (if available). */
274 struct ssb_mipscore mipscore;
275 /* The EXTif-core device (if available). */
276 struct ssb_extif extif;
277
278 /* The following structure elements are not available in early
279 * SSB initialization. Though, they are available for regular
280 * registered drivers at any stage. So be careful when
281 * using them in the ssb core code. */
282
283 /* ID information about the PCB. */
284 struct ssb_boardinfo boardinfo;
285 /* Contents of the SPROM. */
286 struct ssb_sprom sprom;
Michael Buesch7cb44612008-02-19 17:46:48 +0100287 /* If the board has a cardbus slot, this is set to true. */
288 bool has_cardbus_slot;
Michael Buesch61e115a2007-09-18 15:12:50 -0400289
Michael Buesch53521d82008-02-19 16:22:50 +0100290#ifdef CONFIG_SSB_EMBEDDED
291 /* Lock for GPIO register access. */
292 spinlock_t gpio_lock;
293#endif /* EMBEDDED */
294
Michael Buesch61e115a2007-09-18 15:12:50 -0400295 /* Internal-only stuff follows. Do not touch. */
296 struct list_head list;
297#ifdef CONFIG_SSB_DEBUG
298 /* Is the bus already powered up? */
299 bool powered_up;
300 int power_warn_count;
301#endif /* DEBUG */
302};
303
304/* The initialization-invariants. */
305struct ssb_init_invariants {
Michael Buesch7cb44612008-02-19 17:46:48 +0100306 /* Versioning information about the PCB. */
Michael Buesch61e115a2007-09-18 15:12:50 -0400307 struct ssb_boardinfo boardinfo;
Michael Buesch7cb44612008-02-19 17:46:48 +0100308 /* The SPROM information. That's either stored in an
309 * EEPROM or NVRAM on the board. */
Michael Buesch61e115a2007-09-18 15:12:50 -0400310 struct ssb_sprom sprom;
Michael Buesch7cb44612008-02-19 17:46:48 +0100311 /* If the board has a cardbus slot, this is set to true. */
312 bool has_cardbus_slot;
Michael Buesch61e115a2007-09-18 15:12:50 -0400313};
314/* Type of function to fetch the invariants. */
315typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,
316 struct ssb_init_invariants *iv);
317
318/* Register a SSB system bus. get_invariants() is called after the
319 * basic system devices are initialized.
320 * The invariants are usually fetched from some NVRAM.
321 * Put the invariants into the struct pointed to by iv. */
322extern int ssb_bus_ssbbus_register(struct ssb_bus *bus,
323 unsigned long baseaddr,
324 ssb_invariants_func_t get_invariants);
325#ifdef CONFIG_SSB_PCIHOST
326extern int ssb_bus_pcibus_register(struct ssb_bus *bus,
327 struct pci_dev *host_pci);
328#endif /* CONFIG_SSB_PCIHOST */
329#ifdef CONFIG_SSB_PCMCIAHOST
330extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
331 struct pcmcia_device *pcmcia_dev,
332 unsigned long baseaddr);
333#endif /* CONFIG_SSB_PCMCIAHOST */
334
335extern void ssb_bus_unregister(struct ssb_bus *bus);
336
337extern u32 ssb_clockspeed(struct ssb_bus *bus);
338
339/* Is the device enabled in hardware? */
340int ssb_device_is_enabled(struct ssb_device *dev);
341/* Enable a device and pass device-specific SSB_TMSLOW flags.
342 * If no device-specific flags are available, use 0. */
343void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
344/* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */
345void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
346
347
348/* Device MMIO register read/write functions. */
Michael Bueschffc76892008-02-20 19:08:10 +0100349static inline u8 ssb_read8(struct ssb_device *dev, u16 offset)
350{
351 return dev->ops->read8(dev, offset);
352}
Michael Buesch61e115a2007-09-18 15:12:50 -0400353static inline u16 ssb_read16(struct ssb_device *dev, u16 offset)
354{
355 return dev->ops->read16(dev, offset);
356}
357static inline u32 ssb_read32(struct ssb_device *dev, u16 offset)
358{
359 return dev->ops->read32(dev, offset);
360}
Michael Bueschffc76892008-02-20 19:08:10 +0100361static inline void ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
362{
363 dev->ops->write8(dev, offset, value);
364}
Michael Buesch61e115a2007-09-18 15:12:50 -0400365static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
366{
367 dev->ops->write16(dev, offset, value);
368}
369static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
370{
371 dev->ops->write32(dev, offset, value);
372}
373
374
375/* Translation (routing) bits that need to be ORed to DMA
376 * addresses before they are given to a device. */
377extern u32 ssb_dma_translation(struct ssb_device *dev);
378#define SSB_DMA_TRANSLATION_MASK 0xC0000000
379#define SSB_DMA_TRANSLATION_SHIFT 30
380
381extern int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask);
382
383
384#ifdef CONFIG_SSB_PCIHOST
385/* PCI-host wrapper driver */
386extern int ssb_pcihost_register(struct pci_driver *driver);
387static inline void ssb_pcihost_unregister(struct pci_driver *driver)
388{
389 pci_unregister_driver(driver);
390}
Miguel Botón961d57c2008-01-01 01:16:46 +0100391
392static inline
393void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
394{
395 if (sdev->bus->bustype == SSB_BUSTYPE_PCI)
396 pci_set_power_state(sdev->bus->host_pci, state);
397}
Andrew Morton532031d2008-02-04 23:58:42 -0800398#else
399static inline void ssb_pcihost_unregister(struct pci_driver *driver)
400{
401}
402
403static inline
404void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
405{
406}
Michael Buesch61e115a2007-09-18 15:12:50 -0400407#endif /* CONFIG_SSB_PCIHOST */
408
409
410/* If a driver is shutdown or suspended, call this to signal
411 * that the bus may be completely powered down. SSB will decide,
412 * if it's really time to power down the bus, based on if there
413 * are other devices that want to run. */
414extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
415/* Before initializing and enabling a device, call this to power-up the bus.
416 * If you want to allow use of dynamic-power-control, pass the flag.
417 * Otherwise static always-on powercontrol will be used. */
418extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
419
420
421/* Various helper functions */
422extern u32 ssb_admatch_base(u32 adm);
423extern u32 ssb_admatch_size(u32 adm);
424
Michael Bueschaab547c2008-02-29 11:36:12 +0100425/* PCI device mapping and fixup routines.
426 * Called from the architecture pcibios init code.
427 * These are only available on SSB_EMBEDDED configurations. */
428#ifdef CONFIG_SSB_EMBEDDED
429int ssb_pcibios_plat_dev_init(struct pci_dev *dev);
430int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
431#endif /* CONFIG_SSB_EMBEDDED */
Michael Buesch61e115a2007-09-18 15:12:50 -0400432
433#endif /* LINUX_SSB_H_ */