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Catalin Marinas6170a972012-03-05 11:49:29 +00001/*
2 * Copyright (C) 2012 ARM Ltd.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16#ifndef __ASM_FUTEX_H
17#define __ASM_FUTEX_H
18
19#ifdef __KERNEL__
20
21#include <linux/futex.h>
22#include <linux/uaccess.h>
James Morse338d4f42015-07-22 19:05:54 +010023
Catalin Marinas6170a972012-03-05 11:49:29 +000024#include <asm/errno.h>
25
Will Deacon03110a52019-04-08 14:23:17 +010026#define FUTEX_MAX_LOOPS 128 /* What's the largest number you can think of? */
27
Catalin Marinas6170a972012-03-05 11:49:29 +000028#define __futex_atomic_op(insn, ret, oldval, uaddr, tmp, oparg) \
Catalin Marinasbd389672016-07-01 14:58:21 +010029do { \
Will Deacon03110a52019-04-08 14:23:17 +010030 unsigned int loops = FUTEX_MAX_LOOPS; \
31 \
Catalin Marinasbd389672016-07-01 14:58:21 +010032 uaccess_enable(); \
Catalin Marinas6170a972012-03-05 11:49:29 +000033 asm volatile( \
Will Deacon0ea366f2015-05-29 13:31:10 +010034" prfm pstl1strm, %2\n" \
Will Deacon8e86f0b2014-02-04 12:29:12 +000035"1: ldxr %w1, %2\n" \
Catalin Marinas6170a972012-03-05 11:49:29 +000036 insn "\n" \
Will Deacon045afc22019-04-08 12:45:09 +010037"2: stlxr %w0, %w3, %2\n" \
Will Deacon03110a52019-04-08 14:23:17 +010038" cbz %w0, 3f\n" \
39" sub %w4, %w4, %w0\n" \
40" cbnz %w4, 1b\n" \
41" mov %w0, %w7\n" \
Catalin Marinas6170a972012-03-05 11:49:29 +000042"3:\n" \
Will Deacon03110a52019-04-08 14:23:17 +010043" dmb ish\n" \
Catalin Marinas6170a972012-03-05 11:49:29 +000044" .pushsection .fixup,\"ax\"\n" \
Will Deacon4da7a562013-11-06 19:31:24 +000045" .align 2\n" \
Will Deacon03110a52019-04-08 14:23:17 +010046"4: mov %w0, %w6\n" \
Catalin Marinas6170a972012-03-05 11:49:29 +000047" b 3b\n" \
48" .popsection\n" \
Ard Biesheuvel6c94f272016-01-01 15:02:12 +010049 _ASM_EXTABLE(1b, 4b) \
50 _ASM_EXTABLE(2b, 4b) \
Will Deacon03110a52019-04-08 14:23:17 +010051 : "=&r" (ret), "=&r" (oldval), "+Q" (*uaddr), "=&r" (tmp), \
52 "+r" (loops) \
53 : "r" (oparg), "Ir" (-EFAULT), "Ir" (-EAGAIN) \
Catalin Marinasbd389672016-07-01 14:58:21 +010054 : "memory"); \
55 uaccess_disable(); \
56} while (0)
Catalin Marinas6170a972012-03-05 11:49:29 +000057
58static inline int
Will Deacon91b2d342018-02-05 15:34:24 +000059arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *_uaddr)
Catalin Marinas6170a972012-03-05 11:49:29 +000060{
Nathan Chancellorff8acf92019-04-17 00:21:21 -070061 int oldval = 0, ret, tmp;
Will Deacon91b2d342018-02-05 15:34:24 +000062 u32 __user *uaddr = __uaccess_mask_ptr(_uaddr);
Catalin Marinas6170a972012-03-05 11:49:29 +000063
David Hildenbrand2f09b222015-05-11 17:52:17 +020064 pagefault_disable();
Catalin Marinas6170a972012-03-05 11:49:29 +000065
66 switch (op) {
67 case FUTEX_OP_SET:
Will Deacon03110a52019-04-08 14:23:17 +010068 __futex_atomic_op("mov %w3, %w5",
Catalin Marinas6170a972012-03-05 11:49:29 +000069 ret, oldval, uaddr, tmp, oparg);
70 break;
71 case FUTEX_OP_ADD:
Will Deacon03110a52019-04-08 14:23:17 +010072 __futex_atomic_op("add %w3, %w1, %w5",
Catalin Marinas6170a972012-03-05 11:49:29 +000073 ret, oldval, uaddr, tmp, oparg);
74 break;
75 case FUTEX_OP_OR:
Will Deacon03110a52019-04-08 14:23:17 +010076 __futex_atomic_op("orr %w3, %w1, %w5",
Catalin Marinas6170a972012-03-05 11:49:29 +000077 ret, oldval, uaddr, tmp, oparg);
78 break;
79 case FUTEX_OP_ANDN:
Will Deacon03110a52019-04-08 14:23:17 +010080 __futex_atomic_op("and %w3, %w1, %w5",
Catalin Marinas6170a972012-03-05 11:49:29 +000081 ret, oldval, uaddr, tmp, ~oparg);
82 break;
83 case FUTEX_OP_XOR:
Will Deacon03110a52019-04-08 14:23:17 +010084 __futex_atomic_op("eor %w3, %w1, %w5",
Catalin Marinas6170a972012-03-05 11:49:29 +000085 ret, oldval, uaddr, tmp, oparg);
86 break;
87 default:
88 ret = -ENOSYS;
89 }
90
David Hildenbrand2f09b222015-05-11 17:52:17 +020091 pagefault_enable();
Catalin Marinas6170a972012-03-05 11:49:29 +000092
Jiri Slaby30d6e0a2017-08-24 09:31:05 +020093 if (!ret)
94 *oval = oldval;
95
Catalin Marinas6170a972012-03-05 11:49:29 +000096 return ret;
97}
98
99static inline int
Will Deacon91b2d342018-02-05 15:34:24 +0000100futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *_uaddr,
Catalin Marinas6170a972012-03-05 11:49:29 +0000101 u32 oldval, u32 newval)
102{
103 int ret = 0;
Will Deacon03110a52019-04-08 14:23:17 +0100104 unsigned int loops = FUTEX_MAX_LOOPS;
Catalin Marinas6170a972012-03-05 11:49:29 +0000105 u32 val, tmp;
Will Deacon91b2d342018-02-05 15:34:24 +0000106 u32 __user *uaddr;
Catalin Marinas6170a972012-03-05 11:49:29 +0000107
Linus Torvalds96d4f262019-01-03 18:57:57 -0800108 if (!access_ok(_uaddr, sizeof(u32)))
Catalin Marinas6170a972012-03-05 11:49:29 +0000109 return -EFAULT;
110
Will Deacon91b2d342018-02-05 15:34:24 +0000111 uaddr = __uaccess_mask_ptr(_uaddr);
Catalin Marinasbd389672016-07-01 14:58:21 +0100112 uaccess_enable();
Catalin Marinas6170a972012-03-05 11:49:29 +0000113 asm volatile("// futex_atomic_cmpxchg_inatomic\n"
Will Deacon0ea366f2015-05-29 13:31:10 +0100114" prfm pstl1strm, %2\n"
Will Deacon8e86f0b2014-02-04 12:29:12 +0000115"1: ldxr %w1, %2\n"
Will Deacon03110a52019-04-08 14:23:17 +0100116" sub %w3, %w1, %w5\n"
117" cbnz %w3, 4f\n"
118"2: stlxr %w3, %w6, %2\n"
119" cbz %w3, 3f\n"
120" sub %w4, %w4, %w3\n"
121" cbnz %w4, 1b\n"
122" mov %w0, %w8\n"
Catalin Marinas6170a972012-03-05 11:49:29 +0000123"3:\n"
Will Deacon03110a52019-04-08 14:23:17 +0100124" dmb ish\n"
125"4:\n"
Catalin Marinas6170a972012-03-05 11:49:29 +0000126" .pushsection .fixup,\"ax\"\n"
Will Deacon03110a52019-04-08 14:23:17 +0100127"5: mov %w0, %w7\n"
128" b 4b\n"
Catalin Marinas6170a972012-03-05 11:49:29 +0000129" .popsection\n"
Will Deacon03110a52019-04-08 14:23:17 +0100130 _ASM_EXTABLE(1b, 5b)
131 _ASM_EXTABLE(2b, 5b)
132 : "+r" (ret), "=&r" (val), "+Q" (*uaddr), "=&r" (tmp), "+r" (loops)
133 : "r" (oldval), "r" (newval), "Ir" (-EFAULT), "Ir" (-EAGAIN)
Will Deacon95c41892014-02-04 12:29:13 +0000134 : "memory");
Catalin Marinasbd389672016-07-01 14:58:21 +0100135 uaccess_disable();
Catalin Marinas6170a972012-03-05 11:49:29 +0000136
Will Deacon8e4e0ac2019-04-10 11:49:11 +0100137 if (!ret)
138 *uval = val;
139
Catalin Marinas6170a972012-03-05 11:49:29 +0000140 return ret;
141}
142
143#endif /* __KERNEL__ */
144#endif /* __ASM_FUTEX_H */