| Greg Kroah-Hartman | b244131 | 2017-11-01 15:07:57 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
| Paul Mundt | 4690bdc | 2007-11-09 13:45:42 +0900 | [diff] [blame] | 2 | menu "Processor features" |
| 3 | |
| 4 | choice |
| Masanari Iida | 6b2aac4 | 2012-04-14 00:14:11 +0900 | [diff] [blame] | 5 | prompt "Endianness selection" |
| Paul Mundt | 4690bdc | 2007-11-09 13:45:42 +0900 | [diff] [blame] | 6 | default CPU_LITTLE_ENDIAN |
| 7 | help |
| 8 | Some SuperH machines can be configured for either little or big |
| 9 | endian byte order. These modes require different kernels. |
| 10 | |
| 11 | config CPU_LITTLE_ENDIAN |
| 12 | bool "Little Endian" |
| 13 | |
| 14 | config CPU_BIG_ENDIAN |
| 15 | bool "Big Endian" |
| 16 | |
| 17 | endchoice |
| 18 | |
| 19 | config SH_FPU |
| Harvey Harrison | d7ef4fb | 2007-12-11 13:49:35 +0900 | [diff] [blame] | 20 | def_bool y |
| 21 | prompt "FPU support" |
| Paul Mundt | 4690bdc | 2007-11-09 13:45:42 +0900 | [diff] [blame] | 22 | depends on CPU_HAS_FPU |
| Paul Mundt | 4690bdc | 2007-11-09 13:45:42 +0900 | [diff] [blame] | 23 | help |
| 24 | Selecting this option will enable support for SH processors that |
| 25 | have FPU units (ie, SH77xx). |
| 26 | |
| 27 | This option must be set in order to enable the FPU. |
| 28 | |
| 29 | config SH_FPU_EMU |
| Harvey Harrison | d7ef4fb | 2007-12-11 13:49:35 +0900 | [diff] [blame] | 30 | def_bool n |
| 31 | prompt "FPU emulation support" |
| Kees Cook | 0d57af1 | 2013-01-16 18:53:26 -0800 | [diff] [blame] | 32 | depends on !SH_FPU |
| Paul Mundt | 4690bdc | 2007-11-09 13:45:42 +0900 | [diff] [blame] | 33 | help |
| 34 | Selecting this option will enable support for software FPU emulation. |
| 35 | Most SH-3 users will want to say Y here, whereas most SH-4 users will |
| 36 | want to say N. |
| 37 | |
| 38 | config SH_DSP |
| Harvey Harrison | d7ef4fb | 2007-12-11 13:49:35 +0900 | [diff] [blame] | 39 | def_bool y |
| 40 | prompt "DSP support" |
| Paul Mundt | 4690bdc | 2007-11-09 13:45:42 +0900 | [diff] [blame] | 41 | depends on CPU_HAS_DSP |
| Paul Mundt | 4690bdc | 2007-11-09 13:45:42 +0900 | [diff] [blame] | 42 | help |
| 43 | Selecting this option will enable support for SH processors that |
| 44 | have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP). |
| 45 | |
| 46 | This option must be set in order to enable the DSP. |
| 47 | |
| 48 | config SH_ADC |
| Harvey Harrison | d7ef4fb | 2007-12-11 13:49:35 +0900 | [diff] [blame] | 49 | def_bool y |
| 50 | prompt "ADC support" |
| Paul Mundt | 4690bdc | 2007-11-09 13:45:42 +0900 | [diff] [blame] | 51 | depends on CPU_SH3 |
| Paul Mundt | 4690bdc | 2007-11-09 13:45:42 +0900 | [diff] [blame] | 52 | help |
| 53 | Selecting this option will allow the Linux kernel to use SH3 on-chip |
| 54 | ADC module. |
| 55 | |
| 56 | If unsure, say N. |
| 57 | |
| 58 | config SH_STORE_QUEUES |
| 59 | bool "Support for Store Queues" |
| 60 | depends on CPU_SH4 |
| 61 | help |
| 62 | Selecting this option will enable an in-kernel API for manipulating |
| 63 | the store queues integrated in the SH-4 processors. |
| 64 | |
| 65 | config SPECULATIVE_EXECUTION |
| 66 | bool "Speculative subroutine return" |
| Matt Fleming | 8c563a3 | 2010-02-04 23:46:13 +0000 | [diff] [blame] | 67 | depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7786 |
| Paul Mundt | 4690bdc | 2007-11-09 13:45:42 +0900 | [diff] [blame] | 68 | help |
| 69 | This enables support for a speculative instruction fetch for |
| 70 | subroutine return. There are various pitfalls associated with |
| 71 | this, as outlined in the SH7780 hardware manual. |
| 72 | |
| 73 | If unsure, say N. |
| 74 | |
| Paul Mundt | 4690bdc | 2007-11-09 13:45:42 +0900 | [diff] [blame] | 75 | config CPU_HAS_INTEVT |
| 76 | bool |
| 77 | |
| Paul Mundt | 4690bdc | 2007-11-09 13:45:42 +0900 | [diff] [blame] | 78 | config CPU_HAS_IPR_IRQ |
| 79 | bool |
| 80 | |
| 81 | config CPU_HAS_SR_RB |
| 82 | bool |
| 83 | help |
| 84 | This will enable the use of SR.RB register bank usage. Processors |
| 85 | that are lacking this bit must have another method in place for |
| 86 | accomplishing what is taken care of by the banked registers. |
| 87 | |
| Mauro Carvalho Chehab | 781885f | 2020-06-15 08:50:22 +0200 | [diff] [blame] | 88 | See <file:Documentation/sh/register-banks.rst> for further |
| Paul Mundt | 4690bdc | 2007-11-09 13:45:42 +0900 | [diff] [blame] | 89 | information on SR.RB and register banking in the kernel in general. |
| 90 | |
| Paul Mundt | 8263a67 | 2009-03-17 17:49:49 +0900 | [diff] [blame] | 91 | config CPU_HAS_PTEAEX |
| 92 | bool |
| 93 | |
| Paul Mundt | 4690bdc | 2007-11-09 13:45:42 +0900 | [diff] [blame] | 94 | config CPU_HAS_DSP |
| 95 | bool |
| 96 | |
| 97 | config CPU_HAS_FPU |
| 98 | bool |
| 99 | |
| 100 | endmenu |