Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 1 | /* |
Thomas Petazzoni | e12f12a | 2014-11-13 10:39:00 +0100 | [diff] [blame^] | 2 | * Coherency fabric (Aurora) support for Armada 370, 375, 38x and XP |
| 3 | * platforms. |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 4 | * |
| 5 | * Copyright (C) 2012 Marvell |
| 6 | * |
| 7 | * Yehuda Yitschak <yehuday@marvell.com> |
| 8 | * Gregory Clement <gregory.clement@free-electrons.com> |
| 9 | * Thomas Petazzoni <thomas.petazzoni@free-electrons.com> |
| 10 | * |
| 11 | * This file is licensed under the terms of the GNU General Public |
| 12 | * License version 2. This program is licensed "as is" without any |
| 13 | * warranty of any kind, whether express or implied. |
| 14 | * |
Thomas Petazzoni | e12f12a | 2014-11-13 10:39:00 +0100 | [diff] [blame^] | 15 | * The Armada 370, 375, 38x and XP SOCs have a coherency fabric which is |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 16 | * responsible for ensuring hardware coherency between all CPUs and between |
| 17 | * CPUs and I/O masters. This file initializes the coherency fabric and |
| 18 | * supplies basic routines for configuring and controlling hardware coherency |
| 19 | */ |
| 20 | |
Thomas Petazzoni | 5ab5afd | 2014-04-14 15:47:05 +0200 | [diff] [blame] | 21 | #define pr_fmt(fmt) "mvebu-coherency: " fmt |
| 22 | |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 23 | #include <linux/kernel.h> |
| 24 | #include <linux/init.h> |
| 25 | #include <linux/of_address.h> |
| 26 | #include <linux/io.h> |
| 27 | #include <linux/smp.h> |
Gregory CLEMENT | e60304f | 2012-10-12 19:20:36 +0200 | [diff] [blame] | 28 | #include <linux/dma-mapping.h> |
| 29 | #include <linux/platform_device.h> |
Thomas Petazzoni | 5ab5afd | 2014-04-14 15:47:05 +0200 | [diff] [blame] | 30 | #include <linux/slab.h> |
| 31 | #include <linux/mbus.h> |
Thomas Petazzoni | b0063aa | 2014-05-13 18:04:30 +0200 | [diff] [blame] | 32 | #include <linux/pci.h> |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 33 | #include <asm/smp_plat.h> |
Thomas Petazzoni | 580ff0e | 2013-06-06 12:24:28 +0200 | [diff] [blame] | 34 | #include <asm/cacheflush.h> |
Thomas Petazzoni | 497a923 | 2014-05-15 16:59:34 +0200 | [diff] [blame] | 35 | #include <asm/mach/map.h> |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 36 | #include "armada-370-xp.h" |
Jisheng Zhang | b12634e | 2013-11-07 17:02:38 +0800 | [diff] [blame] | 37 | #include "coherency.h" |
Thomas Petazzoni | 3943856 | 2014-05-05 17:05:26 +0200 | [diff] [blame] | 38 | #include "mvebu-soc-id.h" |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 39 | |
Paul Gortmaker | 8bd26e3 | 2013-06-17 15:43:14 -0400 | [diff] [blame] | 40 | unsigned long coherency_phys_base; |
Gregory CLEMENT | ccd6a13 | 2014-04-14 17:10:05 +0200 | [diff] [blame] | 41 | void __iomem *coherency_base; |
Gregory CLEMENT | e60304f | 2012-10-12 19:20:36 +0200 | [diff] [blame] | 42 | static void __iomem *coherency_cpu_base; |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 43 | |
| 44 | /* Coherency fabric registers */ |
Gregory CLEMENT | e60304f | 2012-10-12 19:20:36 +0200 | [diff] [blame] | 45 | #define IO_SYNC_BARRIER_CTL_OFFSET 0x0 |
| 46 | |
Thomas Petazzoni | 924d38f | 2014-04-14 15:46:59 +0200 | [diff] [blame] | 47 | enum { |
Thomas Petazzoni | 501f928 | 2014-04-14 15:47:00 +0200 | [diff] [blame] | 48 | COHERENCY_FABRIC_TYPE_NONE, |
Thomas Petazzoni | 924d38f | 2014-04-14 15:46:59 +0200 | [diff] [blame] | 49 | COHERENCY_FABRIC_TYPE_ARMADA_370_XP, |
Thomas Petazzoni | 77fa4b9 | 2014-04-14 15:47:04 +0200 | [diff] [blame] | 50 | COHERENCY_FABRIC_TYPE_ARMADA_375, |
Thomas Petazzoni | d0de932 | 2014-04-14 15:47:06 +0200 | [diff] [blame] | 51 | COHERENCY_FABRIC_TYPE_ARMADA_380, |
Thomas Petazzoni | 924d38f | 2014-04-14 15:46:59 +0200 | [diff] [blame] | 52 | }; |
| 53 | |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 54 | static struct of_device_id of_coherency_table[] = { |
Thomas Petazzoni | 924d38f | 2014-04-14 15:46:59 +0200 | [diff] [blame] | 55 | {.compatible = "marvell,coherency-fabric", |
| 56 | .data = (void *) COHERENCY_FABRIC_TYPE_ARMADA_370_XP }, |
Thomas Petazzoni | 77fa4b9 | 2014-04-14 15:47:04 +0200 | [diff] [blame] | 57 | {.compatible = "marvell,armada-375-coherency-fabric", |
| 58 | .data = (void *) COHERENCY_FABRIC_TYPE_ARMADA_375 }, |
Thomas Petazzoni | d0de932 | 2014-04-14 15:47:06 +0200 | [diff] [blame] | 59 | {.compatible = "marvell,armada-380-coherency-fabric", |
| 60 | .data = (void *) COHERENCY_FABRIC_TYPE_ARMADA_380 }, |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 61 | { /* end of list */ }, |
| 62 | }; |
| 63 | |
Gregory CLEMENT | 2e8a594 | 2014-04-14 17:10:08 +0200 | [diff] [blame] | 64 | /* Functions defined in coherency_ll.S */ |
| 65 | int ll_enable_coherency(void); |
| 66 | void ll_add_cpu_to_smp_group(void); |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 67 | |
Gregory CLEMENT | 952f4ca | 2014-04-14 17:10:07 +0200 | [diff] [blame] | 68 | int set_cpu_coherent(void) |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 69 | { |
| 70 | if (!coherency_base) { |
Gregory CLEMENT | b41375f | 2014-04-14 17:10:06 +0200 | [diff] [blame] | 71 | pr_warn("Can't make current CPU cache coherent.\n"); |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 72 | pr_warn("Coherency fabric is not initialized\n"); |
| 73 | return 1; |
| 74 | } |
| 75 | |
Gregory CLEMENT | 2e8a594 | 2014-04-14 17:10:08 +0200 | [diff] [blame] | 76 | ll_add_cpu_to_smp_group(); |
| 77 | return ll_enable_coherency(); |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 78 | } |
| 79 | |
Gregory CLEMENT | e60304f | 2012-10-12 19:20:36 +0200 | [diff] [blame] | 80 | static inline void mvebu_hwcc_sync_io_barrier(void) |
| 81 | { |
| 82 | writel(0x1, coherency_cpu_base + IO_SYNC_BARRIER_CTL_OFFSET); |
| 83 | while (readl(coherency_cpu_base + IO_SYNC_BARRIER_CTL_OFFSET) & 0x1); |
| 84 | } |
| 85 | |
| 86 | static dma_addr_t mvebu_hwcc_dma_map_page(struct device *dev, struct page *page, |
| 87 | unsigned long offset, size_t size, |
| 88 | enum dma_data_direction dir, |
| 89 | struct dma_attrs *attrs) |
| 90 | { |
| 91 | if (dir != DMA_TO_DEVICE) |
| 92 | mvebu_hwcc_sync_io_barrier(); |
| 93 | return pfn_to_dma(dev, page_to_pfn(page)) + offset; |
| 94 | } |
| 95 | |
| 96 | |
| 97 | static void mvebu_hwcc_dma_unmap_page(struct device *dev, dma_addr_t dma_handle, |
| 98 | size_t size, enum dma_data_direction dir, |
| 99 | struct dma_attrs *attrs) |
| 100 | { |
| 101 | if (dir != DMA_TO_DEVICE) |
| 102 | mvebu_hwcc_sync_io_barrier(); |
| 103 | } |
| 104 | |
| 105 | static void mvebu_hwcc_dma_sync(struct device *dev, dma_addr_t dma_handle, |
| 106 | size_t size, enum dma_data_direction dir) |
| 107 | { |
| 108 | if (dir != DMA_TO_DEVICE) |
| 109 | mvebu_hwcc_sync_io_barrier(); |
| 110 | } |
| 111 | |
| 112 | static struct dma_map_ops mvebu_hwcc_dma_ops = { |
| 113 | .alloc = arm_dma_alloc, |
| 114 | .free = arm_dma_free, |
| 115 | .mmap = arm_dma_mmap, |
| 116 | .map_page = mvebu_hwcc_dma_map_page, |
| 117 | .unmap_page = mvebu_hwcc_dma_unmap_page, |
| 118 | .get_sgtable = arm_dma_get_sgtable, |
| 119 | .map_sg = arm_dma_map_sg, |
| 120 | .unmap_sg = arm_dma_unmap_sg, |
| 121 | .sync_single_for_cpu = mvebu_hwcc_dma_sync, |
| 122 | .sync_single_for_device = mvebu_hwcc_dma_sync, |
| 123 | .sync_sg_for_cpu = arm_dma_sync_sg_for_cpu, |
| 124 | .sync_sg_for_device = arm_dma_sync_sg_for_device, |
| 125 | .set_dma_mask = arm_dma_set_mask, |
| 126 | }; |
| 127 | |
Thomas Petazzoni | b0063aa | 2014-05-13 18:04:30 +0200 | [diff] [blame] | 128 | static int mvebu_hwcc_notifier(struct notifier_block *nb, |
| 129 | unsigned long event, void *__dev) |
Gregory CLEMENT | e60304f | 2012-10-12 19:20:36 +0200 | [diff] [blame] | 130 | { |
| 131 | struct device *dev = __dev; |
| 132 | |
| 133 | if (event != BUS_NOTIFY_ADD_DEVICE) |
| 134 | return NOTIFY_DONE; |
| 135 | set_dma_ops(dev, &mvebu_hwcc_dma_ops); |
| 136 | |
| 137 | return NOTIFY_OK; |
| 138 | } |
| 139 | |
Thomas Petazzoni | b0063aa | 2014-05-13 18:04:30 +0200 | [diff] [blame] | 140 | static struct notifier_block mvebu_hwcc_nb = { |
| 141 | .notifier_call = mvebu_hwcc_notifier, |
Gregory CLEMENT | e60304f | 2012-10-12 19:20:36 +0200 | [diff] [blame] | 142 | }; |
| 143 | |
Ezequiel Garcia | a728b97 | 2014-07-08 10:37:37 -0300 | [diff] [blame] | 144 | static struct notifier_block mvebu_hwcc_pci_nb = { |
| 145 | .notifier_call = mvebu_hwcc_notifier, |
| 146 | }; |
| 147 | |
Thomas Petazzoni | 924d38f | 2014-04-14 15:46:59 +0200 | [diff] [blame] | 148 | static void __init armada_370_coherency_init(struct device_node *np) |
| 149 | { |
| 150 | struct resource res; |
| 151 | |
| 152 | of_address_to_resource(np, 0, &res); |
| 153 | coherency_phys_base = res.start; |
| 154 | /* |
| 155 | * Ensure secondary CPUs will see the updated value, |
| 156 | * which they read before they join the coherency |
| 157 | * fabric, and therefore before they are coherent with |
| 158 | * the boot CPU cache. |
| 159 | */ |
| 160 | sync_cache_w(&coherency_phys_base); |
| 161 | coherency_base = of_iomap(np, 0); |
| 162 | coherency_cpu_base = of_iomap(np, 1); |
Gregory CLEMENT | 952f4ca | 2014-04-14 17:10:07 +0200 | [diff] [blame] | 163 | set_cpu_coherent(); |
Thomas Petazzoni | 924d38f | 2014-04-14 15:46:59 +0200 | [diff] [blame] | 164 | } |
| 165 | |
Thomas Petazzoni | 497a923 | 2014-05-15 16:59:34 +0200 | [diff] [blame] | 166 | /* |
| 167 | * This ioremap hook is used on Armada 375/38x to ensure that PCIe |
| 168 | * memory areas are mapped as MT_UNCACHED instead of MT_DEVICE. This |
| 169 | * is needed as a workaround for a deadlock issue between the PCIe |
| 170 | * interface and the cache controller. |
| 171 | */ |
| 172 | static void __iomem * |
| 173 | armada_pcie_wa_ioremap_caller(phys_addr_t phys_addr, size_t size, |
| 174 | unsigned int mtype, void *caller) |
| 175 | { |
| 176 | struct resource pcie_mem; |
| 177 | |
| 178 | mvebu_mbus_get_pcie_mem_aperture(&pcie_mem); |
| 179 | |
| 180 | if (pcie_mem.start <= phys_addr && (phys_addr + size) <= pcie_mem.end) |
| 181 | mtype = MT_UNCACHED; |
| 182 | |
| 183 | return __arm_ioremap_caller(phys_addr, size, mtype, caller); |
| 184 | } |
| 185 | |
Thomas Petazzoni | d0de932 | 2014-04-14 15:47:06 +0200 | [diff] [blame] | 186 | static void __init armada_375_380_coherency_init(struct device_node *np) |
Thomas Petazzoni | 77fa4b9 | 2014-04-14 15:47:04 +0200 | [diff] [blame] | 187 | { |
Thomas Petazzoni | 497a923 | 2014-05-15 16:59:34 +0200 | [diff] [blame] | 188 | struct device_node *cache_dn; |
| 189 | |
Thomas Petazzoni | 77fa4b9 | 2014-04-14 15:47:04 +0200 | [diff] [blame] | 190 | coherency_cpu_base = of_iomap(np, 0); |
Thomas Petazzoni | 497a923 | 2014-05-15 16:59:34 +0200 | [diff] [blame] | 191 | arch_ioremap_caller = armada_pcie_wa_ioremap_caller; |
| 192 | |
| 193 | /* |
| 194 | * Add the PL310 property "arm,io-coherent". This makes sure the |
| 195 | * outer sync operation is not used, which allows to |
| 196 | * workaround the system erratum that causes deadlocks when |
| 197 | * doing PCIe in an SMP situation on Armada 375 and Armada |
| 198 | * 38x. |
| 199 | */ |
| 200 | for_each_compatible_node(cache_dn, NULL, "arm,pl310-cache") { |
| 201 | struct property *p; |
| 202 | |
| 203 | p = kzalloc(sizeof(*p), GFP_KERNEL); |
| 204 | p->name = kstrdup("arm,io-coherent", GFP_KERNEL); |
| 205 | of_add_property(cache_dn, p); |
| 206 | } |
Thomas Petazzoni | 77fa4b9 | 2014-04-14 15:47:04 +0200 | [diff] [blame] | 207 | } |
| 208 | |
Thomas Petazzoni | 501f928 | 2014-04-14 15:47:00 +0200 | [diff] [blame] | 209 | static int coherency_type(void) |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 210 | { |
| 211 | struct device_node *np; |
Thomas Petazzoni | 5fbba08 | 2014-04-14 15:47:02 +0200 | [diff] [blame] | 212 | const struct of_device_id *match; |
Thomas Petazzoni | e553554 | 2014-11-13 10:38:57 +0100 | [diff] [blame] | 213 | int type; |
| 214 | |
| 215 | /* |
| 216 | * The coherency fabric is needed: |
| 217 | * - For coherency between processors on Armada XP, so only |
| 218 | * when SMP is enabled. |
| 219 | * - For coherency between the processor and I/O devices, but |
| 220 | * this coherency requires many pre-requisites (write |
| 221 | * allocate cache policy, shareable pages, SMP bit set) that |
| 222 | * are only meant in SMP situations. |
| 223 | * |
| 224 | * Note that this means that on Armada 370, there is currently |
| 225 | * no way to use hardware I/O coherency, because even when |
| 226 | * CONFIG_SMP is enabled, is_smp() returns false due to the |
| 227 | * Armada 370 being a single-core processor. To lift this |
| 228 | * limitation, we would have to find a way to make the cache |
| 229 | * policy set to write-allocate (on all Armada SoCs), and to |
| 230 | * set the shareable attribute in page tables (on all Armada |
| 231 | * SoCs except the Armada 370). Unfortunately, such decisions |
| 232 | * are taken very early in the kernel boot process, at a point |
| 233 | * where we don't know yet on which SoC we are running. |
| 234 | |
| 235 | */ |
| 236 | if (!is_smp()) |
| 237 | return COHERENCY_FABRIC_TYPE_NONE; |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 238 | |
Thomas Petazzoni | 5fbba08 | 2014-04-14 15:47:02 +0200 | [diff] [blame] | 239 | np = of_find_matching_node_and_match(NULL, of_coherency_table, &match); |
Thomas Petazzoni | e553554 | 2014-11-13 10:38:57 +0100 | [diff] [blame] | 240 | if (!np) |
| 241 | return COHERENCY_FABRIC_TYPE_NONE; |
Thomas Petazzoni | 924d38f | 2014-04-14 15:46:59 +0200 | [diff] [blame] | 242 | |
Thomas Petazzoni | e553554 | 2014-11-13 10:38:57 +0100 | [diff] [blame] | 243 | type = (int) match->data; |
Thomas Petazzoni | 924d38f | 2014-04-14 15:46:59 +0200 | [diff] [blame] | 244 | |
Thomas Petazzoni | e553554 | 2014-11-13 10:38:57 +0100 | [diff] [blame] | 245 | of_node_put(np); |
Thomas Petazzoni | 77fa4b9 | 2014-04-14 15:47:04 +0200 | [diff] [blame] | 246 | |
Thomas Petazzoni | e553554 | 2014-11-13 10:38:57 +0100 | [diff] [blame] | 247 | return type; |
Thomas Petazzoni | 501f928 | 2014-04-14 15:47:00 +0200 | [diff] [blame] | 248 | } |
| 249 | |
| 250 | int coherency_available(void) |
| 251 | { |
| 252 | return coherency_type() != COHERENCY_FABRIC_TYPE_NONE; |
| 253 | } |
| 254 | |
| 255 | int __init coherency_init(void) |
| 256 | { |
| 257 | int type = coherency_type(); |
| 258 | struct device_node *np; |
| 259 | |
| 260 | np = of_find_matching_node(NULL, of_coherency_table); |
| 261 | |
| 262 | if (type == COHERENCY_FABRIC_TYPE_ARMADA_370_XP) |
| 263 | armada_370_coherency_init(np); |
Thomas Petazzoni | d0de932 | 2014-04-14 15:47:06 +0200 | [diff] [blame] | 264 | else if (type == COHERENCY_FABRIC_TYPE_ARMADA_375 || |
| 265 | type == COHERENCY_FABRIC_TYPE_ARMADA_380) |
| 266 | armada_375_380_coherency_init(np); |
Thomas Petazzoni | 501f928 | 2014-04-14 15:47:00 +0200 | [diff] [blame] | 267 | |
Thomas Petazzoni | 2eb04ae | 2014-10-27 16:32:35 +0100 | [diff] [blame] | 268 | of_node_put(np); |
| 269 | |
Gregory CLEMENT | 009f131 | 2012-08-02 11:16:29 +0300 | [diff] [blame] | 270 | return 0; |
| 271 | } |
Thomas Petazzoni | 865e052 | 2013-06-05 09:04:55 +0200 | [diff] [blame] | 272 | |
| 273 | static int __init coherency_late_init(void) |
| 274 | { |
Thomas Petazzoni | ef01c6c | 2014-11-13 10:38:59 +0100 | [diff] [blame] | 275 | if (coherency_available()) |
| 276 | bus_register_notifier(&platform_bus_type, |
| 277 | &mvebu_hwcc_nb); |
Thomas Petazzoni | 865e052 | 2013-06-05 09:04:55 +0200 | [diff] [blame] | 278 | return 0; |
| 279 | } |
| 280 | |
| 281 | postcore_initcall(coherency_late_init); |
Thomas Petazzoni | b0063aa | 2014-05-13 18:04:30 +0200 | [diff] [blame] | 282 | |
Thomas Petazzoni | 8828ccc | 2014-05-20 17:13:03 +0200 | [diff] [blame] | 283 | #if IS_ENABLED(CONFIG_PCI) |
Thomas Petazzoni | b0063aa | 2014-05-13 18:04:30 +0200 | [diff] [blame] | 284 | static int __init coherency_pci_init(void) |
| 285 | { |
| 286 | if (coherency_available()) |
| 287 | bus_register_notifier(&pci_bus_type, |
Ezequiel Garcia | a728b97 | 2014-07-08 10:37:37 -0300 | [diff] [blame] | 288 | &mvebu_hwcc_pci_nb); |
Thomas Petazzoni | b0063aa | 2014-05-13 18:04:30 +0200 | [diff] [blame] | 289 | return 0; |
| 290 | } |
| 291 | |
| 292 | arch_initcall(coherency_pci_init); |
Thomas Petazzoni | 8828ccc | 2014-05-20 17:13:03 +0200 | [diff] [blame] | 293 | #endif |