blob: d4b2ab7861266e367ce87a590fb3f4fd8611318d [file] [log] [blame]
Thomas Gleixner2874c5f2019-05-27 08:55:01 +02001// SPDX-License-Identifier: GPL-2.0-or-later
Deepak Saxena8ae6e162006-06-25 05:47:38 -07002/*
3 * drivers/rtc/rtc-pl031.c
4 *
5 * Real Time Clock interface for ARM AMBA PrimeCell 031 RTC
6 *
7 * Author: Deepak Saxena <dsaxena@plexity.net>
8 *
9 * Copyright 2006 (c) MontaVista Software, Inc.
10 *
Linus Walleijc72881e2010-02-04 12:50:13 +010011 * Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com>
12 * Copyright 2010 (c) ST-Ericsson AB
Deepak Saxena8ae6e162006-06-25 05:47:38 -070013 */
Deepak Saxena8ae6e162006-06-25 05:47:38 -070014#include <linux/module.h>
15#include <linux/rtc.h>
16#include <linux/init.h>
Deepak Saxena8ae6e162006-06-25 05:47:38 -070017#include <linux/interrupt.h>
Deepak Saxena8ae6e162006-06-25 05:47:38 -070018#include <linux/amba/bus.h>
Russell King2dba8512008-04-20 12:08:04 +010019#include <linux/io.h>
Linus Walleijc72881e2010-02-04 12:50:13 +010020#include <linux/bcd.h>
21#include <linux/delay.h>
Sudeep Hollaeff6dd42015-09-21 16:46:57 +010022#include <linux/pm_wakeirq.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090023#include <linux/slab.h>
Deepak Saxena8ae6e162006-06-25 05:47:38 -070024
25/*
26 * Register definitions
27 */
28#define RTC_DR 0x00 /* Data read register */
29#define RTC_MR 0x04 /* Match register */
30#define RTC_LR 0x08 /* Data load register */
31#define RTC_CR 0x0c /* Control register */
32#define RTC_IMSC 0x10 /* Interrupt mask and set register */
33#define RTC_RIS 0x14 /* Raw interrupt status register */
34#define RTC_MIS 0x18 /* Masked interrupt status register */
35#define RTC_ICR 0x1c /* Interrupt clear register */
Linus Walleijc72881e2010-02-04 12:50:13 +010036/* ST variants have additional timer functionality */
37#define RTC_TDR 0x20 /* Timer data read register */
38#define RTC_TLR 0x24 /* Timer data load register */
39#define RTC_TCR 0x28 /* Timer control register */
40#define RTC_YDR 0x30 /* Year data read register */
41#define RTC_YMR 0x34 /* Year match register */
42#define RTC_YLR 0x38 /* Year data load register */
43
Haojian Zhuange7e034e12013-02-04 14:28:54 -080044#define RTC_CR_EN (1 << 0) /* counter enable bit */
Linus Walleijc72881e2010-02-04 12:50:13 +010045#define RTC_CR_CWEN (1 << 26) /* Clockwatch enable bit */
46
47#define RTC_TCR_EN (1 << 1) /* Periodic timer enable bit */
48
49/* Common bit definitions for Interrupt status and control registers */
50#define RTC_BIT_AI (1 << 0) /* Alarm interrupt bit */
51#define RTC_BIT_PI (1 << 1) /* Periodic interrupt bit. ST variants only. */
52
53/* Common bit definations for ST v2 for reading/writing time */
54#define RTC_SEC_SHIFT 0
55#define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */
56#define RTC_MIN_SHIFT 6
57#define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */
58#define RTC_HOUR_SHIFT 12
59#define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */
60#define RTC_WDAY_SHIFT 17
61#define RTC_WDAY_MASK (0x7 << RTC_WDAY_SHIFT) /* Day of Week [1-7] 1=Sunday */
62#define RTC_MDAY_SHIFT 20
63#define RTC_MDAY_MASK (0x1F << RTC_MDAY_SHIFT) /* Day of Month [1-31] */
64#define RTC_MON_SHIFT 25
65#define RTC_MON_MASK (0xF << RTC_MON_SHIFT) /* Month [1-12] 1=January */
66
67#define RTC_TIMER_FREQ 32768
Deepak Saxena8ae6e162006-06-25 05:47:38 -070068
Linus Walleijaff05ed2012-07-30 14:41:34 -070069/**
70 * struct pl031_vendor_data - per-vendor variations
71 * @ops: the vendor-specific operations used on this silicon version
Linus Walleij1bb457f2012-07-30 14:41:36 -070072 * @clockwatch: if this is an ST Microelectronics silicon version with a
73 * clockwatch function
74 * @st_weekday: if this is an ST Microelectronics silicon version that need
75 * the weekday fix
Mattias Wallin559a6fc2012-07-30 14:41:39 -070076 * @irqflags: special IRQ flags per variant
Linus Walleijaff05ed2012-07-30 14:41:34 -070077 */
78struct pl031_vendor_data {
79 struct rtc_class_ops ops;
Linus Walleij1bb457f2012-07-30 14:41:36 -070080 bool clockwatch;
81 bool st_weekday;
Mattias Wallin559a6fc2012-07-30 14:41:39 -070082 unsigned long irqflags;
Alexandre Belloni03f2a0e2020-03-06 01:58:08 +010083 time64_t range_min;
84 timeu64_t range_max;
Linus Walleijaff05ed2012-07-30 14:41:34 -070085};
86
Deepak Saxena8ae6e162006-06-25 05:47:38 -070087struct pl031_local {
Linus Walleijaff05ed2012-07-30 14:41:34 -070088 struct pl031_vendor_data *vendor;
Deepak Saxena8ae6e162006-06-25 05:47:38 -070089 struct rtc_device *rtc;
90 void __iomem *base;
91};
92
Linus Walleijc72881e2010-02-04 12:50:13 +010093static int pl031_alarm_irq_enable(struct device *dev,
94 unsigned int enabled)
Deepak Saxena8ae6e162006-06-25 05:47:38 -070095{
Linus Walleijc72881e2010-02-04 12:50:13 +010096 struct pl031_local *ldata = dev_get_drvdata(dev);
97 unsigned long imsc;
Deepak Saxena8ae6e162006-06-25 05:47:38 -070098
Linus Walleijc72881e2010-02-04 12:50:13 +010099 /* Clear any pending alarm interrupts. */
100 writel(RTC_BIT_AI, ldata->base + RTC_ICR);
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700101
Linus Walleijc72881e2010-02-04 12:50:13 +0100102 imsc = readl(ldata->base + RTC_IMSC);
103
104 if (enabled == 1)
105 writel(imsc | RTC_BIT_AI, ldata->base + RTC_IMSC);
106 else
107 writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC);
108
109 return 0;
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700110}
111
Linus Walleijc72881e2010-02-04 12:50:13 +0100112/*
113 * Convert Gregorian date to ST v2 RTC format.
114 */
115static int pl031_stv2_tm_to_time(struct device *dev,
116 struct rtc_time *tm, unsigned long *st_time,
117 unsigned long *bcd_year)
118{
119 int year = tm->tm_year + 1900;
120 int wday = tm->tm_wday;
121
122 /* wday masking is not working in hardware so wday must be valid */
123 if (wday < -1 || wday > 6) {
124 dev_err(dev, "invalid wday value %d\n", tm->tm_wday);
125 return -EINVAL;
126 } else if (wday == -1) {
127 /* wday is not provided, calculate it here */
Linus Walleijc72881e2010-02-04 12:50:13 +0100128 struct rtc_time calc_tm;
129
Alexandre Bellonic8ff5842020-03-06 01:58:09 +0100130 rtc_time64_to_tm(rtc_tm_to_time64(tm), &calc_tm);
Linus Walleijc72881e2010-02-04 12:50:13 +0100131 wday = calc_tm.tm_wday;
132 }
133
134 *bcd_year = (bin2bcd(year % 100) | bin2bcd(year / 100) << 8);
135
136 *st_time = ((tm->tm_mon + 1) << RTC_MON_SHIFT)
137 | (tm->tm_mday << RTC_MDAY_SHIFT)
138 | ((wday + 1) << RTC_WDAY_SHIFT)
139 | (tm->tm_hour << RTC_HOUR_SHIFT)
140 | (tm->tm_min << RTC_MIN_SHIFT)
141 | (tm->tm_sec << RTC_SEC_SHIFT);
142
143 return 0;
144}
145
146/*
147 * Convert ST v2 RTC format to Gregorian date.
148 */
149static int pl031_stv2_time_to_tm(unsigned long st_time, unsigned long bcd_year,
150 struct rtc_time *tm)
151{
152 tm->tm_year = bcd2bin(bcd_year) + (bcd2bin(bcd_year >> 8) * 100);
153 tm->tm_mon = ((st_time & RTC_MON_MASK) >> RTC_MON_SHIFT) - 1;
154 tm->tm_mday = ((st_time & RTC_MDAY_MASK) >> RTC_MDAY_SHIFT);
155 tm->tm_wday = ((st_time & RTC_WDAY_MASK) >> RTC_WDAY_SHIFT) - 1;
156 tm->tm_hour = ((st_time & RTC_HOUR_MASK) >> RTC_HOUR_SHIFT);
157 tm->tm_min = ((st_time & RTC_MIN_MASK) >> RTC_MIN_SHIFT);
158 tm->tm_sec = ((st_time & RTC_SEC_MASK) >> RTC_SEC_SHIFT);
159
160 tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year);
161 tm->tm_year -= 1900;
162
163 return 0;
164}
165
166static int pl031_stv2_read_time(struct device *dev, struct rtc_time *tm)
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700167{
168 struct pl031_local *ldata = dev_get_drvdata(dev);
169
Linus Walleijc72881e2010-02-04 12:50:13 +0100170 pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR),
171 readl(ldata->base + RTC_YDR), tm);
172
173 return 0;
174}
175
176static int pl031_stv2_set_time(struct device *dev, struct rtc_time *tm)
177{
178 unsigned long time;
179 unsigned long bcd_year;
180 struct pl031_local *ldata = dev_get_drvdata(dev);
181 int ret;
182
183 ret = pl031_stv2_tm_to_time(dev, tm, &time, &bcd_year);
184 if (ret == 0) {
185 writel(bcd_year, ldata->base + RTC_YLR);
186 writel(time, ldata->base + RTC_LR);
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700187 }
188
Linus Walleijc72881e2010-02-04 12:50:13 +0100189 return ret;
190}
191
192static int pl031_stv2_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
193{
194 struct pl031_local *ldata = dev_get_drvdata(dev);
195 int ret;
196
197 ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR),
198 readl(ldata->base + RTC_YMR), &alarm->time);
199
200 alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
201 alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
202
203 return ret;
204}
205
206static int pl031_stv2_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
207{
208 struct pl031_local *ldata = dev_get_drvdata(dev);
209 unsigned long time;
210 unsigned long bcd_year;
211 int ret;
212
Alexandre Belloni61c9fbf2020-03-06 01:58:07 +0100213 ret = pl031_stv2_tm_to_time(dev, &alarm->time,
214 &time, &bcd_year);
Linus Walleijc72881e2010-02-04 12:50:13 +0100215 if (ret == 0) {
Alexandre Belloni61c9fbf2020-03-06 01:58:07 +0100216 writel(bcd_year, ldata->base + RTC_YMR);
217 writel(time, ldata->base + RTC_MR);
Linus Walleijc72881e2010-02-04 12:50:13 +0100218
Alexandre Belloni61c9fbf2020-03-06 01:58:07 +0100219 pl031_alarm_irq_enable(dev, alarm->enabled);
Linus Walleijc72881e2010-02-04 12:50:13 +0100220 }
221
222 return ret;
223}
224
225static irqreturn_t pl031_interrupt(int irq, void *dev_id)
226{
227 struct pl031_local *ldata = dev_id;
228 unsigned long rtcmis;
229 unsigned long events = 0;
230
231 rtcmis = readl(ldata->base + RTC_MIS);
Rajkumar Kasirajanac2dee52012-05-29 15:07:40 -0700232 if (rtcmis & RTC_BIT_AI) {
233 writel(RTC_BIT_AI, ldata->base + RTC_ICR);
234 events |= (RTC_AF | RTC_IRQF);
Linus Walleijc72881e2010-02-04 12:50:13 +0100235 rtc_update_irq(ldata->rtc, 1, events);
236
237 return IRQ_HANDLED;
238 }
239
240 return IRQ_NONE;
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700241}
242
243static int pl031_read_time(struct device *dev, struct rtc_time *tm)
244{
245 struct pl031_local *ldata = dev_get_drvdata(dev);
246
Alexandre Bellonic8ff5842020-03-06 01:58:09 +0100247 rtc_time64_to_tm(readl(ldata->base + RTC_DR), tm);
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700248
249 return 0;
250}
251
252static int pl031_set_time(struct device *dev, struct rtc_time *tm)
253{
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700254 struct pl031_local *ldata = dev_get_drvdata(dev);
255
Alexandre Bellonic8ff5842020-03-06 01:58:09 +0100256 writel(rtc_tm_to_time64(tm), ldata->base + RTC_LR);
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700257
Alexandre Bellonic8ff5842020-03-06 01:58:09 +0100258 return 0;
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700259}
260
261static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
262{
263 struct pl031_local *ldata = dev_get_drvdata(dev);
264
Alexandre Bellonic8ff5842020-03-06 01:58:09 +0100265 rtc_time64_to_tm(readl(ldata->base + RTC_MR), &alarm->time);
Linus Walleijc72881e2010-02-04 12:50:13 +0100266
267 alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI;
268 alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI;
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700269
270 return 0;
271}
272
273static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
274{
275 struct pl031_local *ldata = dev_get_drvdata(dev);
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700276
Alexandre Bellonic8ff5842020-03-06 01:58:09 +0100277 writel(rtc_tm_to_time64(&alarm->time), ldata->base + RTC_MR);
Sudeep Holla4df2ef82020-07-14 13:45:56 +0100278 pl031_alarm_irq_enable(dev, alarm->enabled);
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700279
Alexandre Bellonic8ff5842020-03-06 01:58:09 +0100280 return 0;
Linus Walleijc72881e2010-02-04 12:50:13 +0100281}
282
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700283static int pl031_remove(struct amba_device *adev)
284{
285 struct pl031_local *ldata = dev_get_drvdata(&adev->dev);
286
Sudeep Hollaeff6dd42015-09-21 16:46:57 +0100287 dev_pm_clear_wake_irq(&adev->dev);
288 device_init_wakeup(&adev->dev, false);
Russell King5b64a292017-09-29 11:22:15 +0100289 if (adev->irq[0])
290 free_irq(adev->irq[0], ldata);
Russell King2dba8512008-04-20 12:08:04 +0100291 amba_release_regions(adev);
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700292
293 return 0;
294}
295
Russell Kingaa25afa2011-02-19 15:55:00 +0000296static int pl031_probe(struct amba_device *adev, const struct amba_id *id)
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700297{
298 int ret;
299 struct pl031_local *ldata;
Linus Walleijaff05ed2012-07-30 14:41:34 -0700300 struct pl031_vendor_data *vendor = id->data;
Russell Kingb86f5812017-09-29 11:22:10 +0100301 struct rtc_class_ops *ops;
Haojian Zhuange7e034e12013-02-04 14:28:54 -0800302 unsigned long time, data;
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700303
Russell King2dba8512008-04-20 12:08:04 +0100304 ret = amba_request_regions(adev, NULL);
305 if (ret)
306 goto err_req;
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700307
Russell King273c8682017-09-29 11:22:05 +0100308 ldata = devm_kzalloc(&adev->dev, sizeof(struct pl031_local),
309 GFP_KERNEL);
Russell Kingb86f5812017-09-29 11:22:10 +0100310 ops = devm_kmemdup(&adev->dev, &vendor->ops, sizeof(vendor->ops),
311 GFP_KERNEL);
312 if (!ldata || !ops) {
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700313 ret = -ENOMEM;
314 goto out;
315 }
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700316
Russell Kingb86f5812017-09-29 11:22:10 +0100317 ldata->vendor = vendor;
Russell King273c8682017-09-29 11:22:05 +0100318 ldata->base = devm_ioremap(&adev->dev, adev->res.start,
319 resource_size(&adev->res));
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700320 if (!ldata->base) {
321 ret = -ENOMEM;
Russell King273c8682017-09-29 11:22:05 +0100322 goto out;
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700323 }
324
Russell King2dba8512008-04-20 12:08:04 +0100325 amba_set_drvdata(adev, ldata);
326
Linus Walleij1bb457f2012-07-30 14:41:36 -0700327 dev_dbg(&adev->dev, "designer ID = 0x%02x\n", amba_manf(adev));
328 dev_dbg(&adev->dev, "revision = 0x%01x\n", amba_rev(adev));
Linus Walleijc72881e2010-02-04 12:50:13 +0100329
Haojian Zhuange7e034e12013-02-04 14:28:54 -0800330 data = readl(ldata->base + RTC_CR);
Linus Walleijc72881e2010-02-04 12:50:13 +0100331 /* Enable the clockwatch on ST Variants */
Linus Walleij1bb457f2012-07-30 14:41:36 -0700332 if (vendor->clockwatch)
Haojian Zhuange7e034e12013-02-04 14:28:54 -0800333 data |= RTC_CR_CWEN;
Linus Walleij3399cfb2013-02-12 13:46:19 -0800334 else
335 data |= RTC_CR_EN;
336 writel(data, ldata->base + RTC_CR);
Linus Walleijc72881e2010-02-04 12:50:13 +0100337
Rajkumar Kasirajanc0a5f4a2012-05-17 17:03:24 -0700338 /*
339 * On ST PL031 variants, the RTC reset value does not provide correct
340 * weekday for 2000-01-01. Correct the erroneous sunday to saturday.
341 */
Linus Walleij1bb457f2012-07-30 14:41:36 -0700342 if (vendor->st_weekday) {
Rajkumar Kasirajanc0a5f4a2012-05-17 17:03:24 -0700343 if (readl(ldata->base + RTC_YDR) == 0x2000) {
344 time = readl(ldata->base + RTC_DR);
345 if ((time &
346 (RTC_MON_MASK | RTC_MDAY_MASK | RTC_WDAY_MASK))
347 == 0x02120000) {
348 time = time | (0x7 << RTC_WDAY_SHIFT);
349 writel(0x2000, ldata->base + RTC_YLR);
350 writel(time, ldata->base + RTC_LR);
351 }
352 }
353 }
354
Russell Kingb86f5812017-09-29 11:22:10 +0100355 if (!adev->irq[0]) {
356 /* When there's no interrupt, no point in exposing the alarm */
357 ops->read_alarm = NULL;
358 ops->set_alarm = NULL;
359 ops->alarm_irq_enable = NULL;
360 }
361
Sudeep Hollaeff6dd42015-09-21 16:46:57 +0100362 device_init_wakeup(&adev->dev, true);
Alexandre Bellonib7aff102018-09-09 22:38:48 +0200363 ldata->rtc = devm_rtc_allocate_device(&adev->dev);
Zheng Liangacc3c8c2020-11-12 17:31:39 +0800364 if (IS_ERR(ldata->rtc)) {
365 ret = PTR_ERR(ldata->rtc);
366 goto out;
367 }
Alexandre Bellonib7aff102018-09-09 22:38:48 +0200368
369 ldata->rtc->ops = ops;
Alexandre Belloni03f2a0e2020-03-06 01:58:08 +0100370 ldata->rtc->range_min = vendor->range_min;
371 ldata->rtc->range_max = vendor->range_max;
Alexandre Bellonib7aff102018-09-09 22:38:48 +0200372
373 ret = rtc_register_device(ldata->rtc);
374 if (ret)
Russell King273c8682017-09-29 11:22:05 +0100375 goto out;
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700376
Russell King5b64a292017-09-29 11:22:15 +0100377 if (adev->irq[0]) {
378 ret = request_irq(adev->irq[0], pl031_interrupt,
379 vendor->irqflags, "rtc-pl031", ldata);
380 if (ret)
Alexandre Bellonib7aff102018-09-09 22:38:48 +0200381 goto out;
Russell King5b64a292017-09-29 11:22:15 +0100382 dev_pm_set_wake_irq(&adev->dev, adev->irq[0]);
Linus Walleijc72881e2010-02-04 12:50:13 +0100383 }
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700384 return 0;
385
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700386out:
Russell King2dba8512008-04-20 12:08:04 +0100387 amba_release_regions(adev);
388err_req:
Linus Walleijc72881e2010-02-04 12:50:13 +0100389
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700390 return ret;
391}
392
Linus Walleijc72881e2010-02-04 12:50:13 +0100393/* Operations for the original ARM version */
Linus Walleijaff05ed2012-07-30 14:41:34 -0700394static struct pl031_vendor_data arm_pl031 = {
395 .ops = {
396 .read_time = pl031_read_time,
397 .set_time = pl031_set_time,
398 .read_alarm = pl031_read_alarm,
399 .set_alarm = pl031_set_alarm,
400 .alarm_irq_enable = pl031_alarm_irq_enable,
401 },
Alexandre Belloni03f2a0e2020-03-06 01:58:08 +0100402 .range_max = U32_MAX,
Linus Walleijc72881e2010-02-04 12:50:13 +0100403};
404
405/* The First ST derivative */
Linus Walleijaff05ed2012-07-30 14:41:34 -0700406static struct pl031_vendor_data stv1_pl031 = {
407 .ops = {
408 .read_time = pl031_read_time,
409 .set_time = pl031_set_time,
410 .read_alarm = pl031_read_alarm,
411 .set_alarm = pl031_set_alarm,
412 .alarm_irq_enable = pl031_alarm_irq_enable,
413 },
Linus Walleij1bb457f2012-07-30 14:41:36 -0700414 .clockwatch = true,
415 .st_weekday = true,
Alexandre Belloni03f2a0e2020-03-06 01:58:08 +0100416 .range_max = U32_MAX,
Linus Walleijc72881e2010-02-04 12:50:13 +0100417};
418
419/* And the second ST derivative */
Linus Walleijaff05ed2012-07-30 14:41:34 -0700420static struct pl031_vendor_data stv2_pl031 = {
421 .ops = {
422 .read_time = pl031_stv2_read_time,
423 .set_time = pl031_stv2_set_time,
424 .read_alarm = pl031_stv2_read_alarm,
425 .set_alarm = pl031_stv2_set_alarm,
426 .alarm_irq_enable = pl031_alarm_irq_enable,
427 },
Linus Walleij1bb457f2012-07-30 14:41:36 -0700428 .clockwatch = true,
429 .st_weekday = true,
Mattias Wallin559a6fc2012-07-30 14:41:39 -0700430 /*
431 * This variant shares the IRQ with another block and must not
432 * suspend that IRQ line.
Sudeep Hollaeff6dd42015-09-21 16:46:57 +0100433 * TODO check if it shares with IRQF_NO_SUSPEND user, else we can
434 * remove IRQF_COND_SUSPEND
Mattias Wallin559a6fc2012-07-30 14:41:39 -0700435 */
Sudeep Hollaeff6dd42015-09-21 16:46:57 +0100436 .irqflags = IRQF_SHARED | IRQF_COND_SUSPEND,
Alexandre Belloni03f2a0e2020-03-06 01:58:08 +0100437 .range_min = RTC_TIMESTAMP_BEGIN_0000,
438 .range_max = RTC_TIMESTAMP_END_9999,
Linus Walleijc72881e2010-02-04 12:50:13 +0100439};
440
Russell Kingeb508b32017-09-29 11:22:00 +0100441static const struct amba_id pl031_ids[] = {
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700442 {
Linus Walleij2934d6a2009-12-15 16:46:13 -0800443 .id = 0x00041031,
444 .mask = 0x000fffff,
Linus Walleijaff05ed2012-07-30 14:41:34 -0700445 .data = &arm_pl031,
Linus Walleijc72881e2010-02-04 12:50:13 +0100446 },
447 /* ST Micro variants */
448 {
449 .id = 0x00180031,
450 .mask = 0x00ffffff,
Linus Walleijaff05ed2012-07-30 14:41:34 -0700451 .data = &stv1_pl031,
Linus Walleijc72881e2010-02-04 12:50:13 +0100452 },
453 {
454 .id = 0x00280031,
455 .mask = 0x00ffffff,
Linus Walleijaff05ed2012-07-30 14:41:34 -0700456 .data = &stv2_pl031,
Linus Walleij2934d6a2009-12-15 16:46:13 -0800457 },
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700458 {0, 0},
459};
460
Dave Martinf5feac22011-10-05 15:15:22 +0100461MODULE_DEVICE_TABLE(amba, pl031_ids);
462
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700463static struct amba_driver pl031_driver = {
464 .drv = {
465 .name = "rtc-pl031",
466 },
467 .id_table = pl031_ids,
468 .probe = pl031_probe,
469 .remove = pl031_remove,
470};
471
viresh kumar9e5ed092012-03-15 10:40:38 +0100472module_amba_driver(pl031_driver);
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700473
Leo Yan27675ef2015-07-29 14:13:40 +0800474MODULE_AUTHOR("Deepak Saxena <dsaxena@plexity.net>");
Deepak Saxena8ae6e162006-06-25 05:47:38 -0700475MODULE_DESCRIPTION("ARM AMBA PL031 RTC Driver");
476MODULE_LICENSE("GPL");