| Thomas Gleixner | ec8f24b | 2019-05-19 13:07:45 +0100 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
| Vivien Didelot | 0d3cd4b | 2016-06-21 12:28:19 -0400 | [diff] [blame] | 2 | config NET_DSA_MV88E6XXX |
| 3 | tristate "Marvell 88E6xxx Ethernet switch fabric support" |
| 4 | depends on NET_DSA |
| Florian Fainelli | 0717b87 | 2016-11-17 11:19:14 -0800 | [diff] [blame] | 5 | select IRQ_DOMAIN |
| Vivien Didelot | 0d3cd4b | 2016-06-21 12:28:19 -0400 | [diff] [blame] | 6 | select NET_DSA_TAG_EDSA |
| Andrew Lunn | 2bbb33b | 2016-08-22 16:01:02 +0200 | [diff] [blame] | 7 | select NET_DSA_TAG_DSA |
| Vivien Didelot | 0d3cd4b | 2016-06-21 12:28:19 -0400 | [diff] [blame] | 8 | help |
| 9 | This driver adds support for most of the Marvell 88E6xxx models of |
| 10 | Ethernet switch chips, except 88E6060. |
| Vivien Didelot | ca070c1 | 2016-09-02 14:45:34 -0400 | [diff] [blame] | 11 | |
| 12 | config NET_DSA_MV88E6XXX_GLOBAL2 |
| 13 | bool "Switch Global 2 Registers support" |
| 14 | default y |
| 15 | depends on NET_DSA_MV88E6XXX |
| 16 | help |
| 17 | This registers set at internal SMI address 0x1C provides extended |
| 18 | features like EEPROM interface, trunking, cross-chip setup, etc. |
| 19 | |
| 20 | It is required on most chips. If the chip you compile the support for |
| 21 | doesn't have such registers set, say N here. In doubt, say Y. |
| Brandon Streiff | 2fa8d3a | 2018-02-14 01:07:45 +0100 | [diff] [blame] | 22 | |
| 23 | config NET_DSA_MV88E6XXX_PTP |
| 24 | bool "PTP support for Marvell 88E6xxx" |
| 25 | default n |
| 26 | depends on NET_DSA_MV88E6XXX_GLOBAL2 |
| 27 | imply NETWORK_PHY_TIMESTAMPING |
| 28 | imply PTP_1588_CLOCK |
| 29 | help |
| 30 | Say Y to enable PTP hardware timestamping on Marvell 88E6xxx switch |
| 31 | chips that support it. |