Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Texas Instruments Ethernet Switch Driver |
| 3 | * |
| 4 | * Copyright (C) 2012 Texas Instruments |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License as |
| 8 | * published by the Free Software Foundation version 2. |
| 9 | * |
| 10 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any |
| 11 | * kind, whether express or implied; without even the implied warranty |
| 12 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/io.h> |
| 18 | #include <linux/clk.h> |
| 19 | #include <linux/timer.h> |
| 20 | #include <linux/module.h> |
| 21 | #include <linux/platform_device.h> |
| 22 | #include <linux/irqreturn.h> |
| 23 | #include <linux/interrupt.h> |
| 24 | #include <linux/if_ether.h> |
| 25 | #include <linux/etherdevice.h> |
| 26 | #include <linux/netdevice.h> |
| 27 | #include <linux/phy.h> |
| 28 | #include <linux/workqueue.h> |
| 29 | #include <linux/delay.h> |
Mugunthan V N | f150bd7 | 2012-07-17 08:09:50 +0000 | [diff] [blame] | 30 | #include <linux/pm_runtime.h> |
Mugunthan V N | 2eb32b0 | 2012-07-30 10:17:14 +0000 | [diff] [blame] | 31 | #include <linux/of.h> |
| 32 | #include <linux/of_net.h> |
| 33 | #include <linux/of_device.h> |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 34 | |
| 35 | #include <linux/platform_data/cpsw.h> |
| 36 | |
| 37 | #include "cpsw_ale.h" |
| 38 | #include "davinci_cpdma.h" |
| 39 | |
| 40 | #define CPSW_DEBUG (NETIF_MSG_HW | NETIF_MSG_WOL | \ |
| 41 | NETIF_MSG_DRV | NETIF_MSG_LINK | \ |
| 42 | NETIF_MSG_IFUP | NETIF_MSG_INTR | \ |
| 43 | NETIF_MSG_PROBE | NETIF_MSG_TIMER | \ |
| 44 | NETIF_MSG_IFDOWN | NETIF_MSG_RX_ERR | \ |
| 45 | NETIF_MSG_TX_ERR | NETIF_MSG_TX_DONE | \ |
| 46 | NETIF_MSG_PKTDATA | NETIF_MSG_TX_QUEUED | \ |
| 47 | NETIF_MSG_RX_STATUS) |
| 48 | |
| 49 | #define cpsw_info(priv, type, format, ...) \ |
| 50 | do { \ |
| 51 | if (netif_msg_##type(priv) && net_ratelimit()) \ |
| 52 | dev_info(priv->dev, format, ## __VA_ARGS__); \ |
| 53 | } while (0) |
| 54 | |
| 55 | #define cpsw_err(priv, type, format, ...) \ |
| 56 | do { \ |
| 57 | if (netif_msg_##type(priv) && net_ratelimit()) \ |
| 58 | dev_err(priv->dev, format, ## __VA_ARGS__); \ |
| 59 | } while (0) |
| 60 | |
| 61 | #define cpsw_dbg(priv, type, format, ...) \ |
| 62 | do { \ |
| 63 | if (netif_msg_##type(priv) && net_ratelimit()) \ |
| 64 | dev_dbg(priv->dev, format, ## __VA_ARGS__); \ |
| 65 | } while (0) |
| 66 | |
| 67 | #define cpsw_notice(priv, type, format, ...) \ |
| 68 | do { \ |
| 69 | if (netif_msg_##type(priv) && net_ratelimit()) \ |
| 70 | dev_notice(priv->dev, format, ## __VA_ARGS__); \ |
| 71 | } while (0) |
| 72 | |
Mugunthan V N | 5c50a85 | 2012-10-29 08:45:11 +0000 | [diff] [blame] | 73 | #define ALE_ALL_PORTS 0x7 |
| 74 | |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 75 | #define CPSW_MAJOR_VERSION(reg) (reg >> 8 & 0x7) |
| 76 | #define CPSW_MINOR_VERSION(reg) (reg & 0xff) |
| 77 | #define CPSW_RTL_VERSION(reg) ((reg >> 11) & 0x1f) |
| 78 | |
| 79 | #define CPDMA_RXTHRESH 0x0c0 |
| 80 | #define CPDMA_RXFREE 0x0e0 |
| 81 | #define CPDMA_TXHDP 0x00 |
| 82 | #define CPDMA_RXHDP 0x20 |
| 83 | #define CPDMA_TXCP 0x40 |
| 84 | #define CPDMA_RXCP 0x60 |
| 85 | |
| 86 | #define cpsw_dma_regs(base, offset) \ |
| 87 | (void __iomem *)((base) + (offset)) |
| 88 | #define cpsw_dma_rxthresh(base, offset) \ |
| 89 | (void __iomem *)((base) + (offset) + CPDMA_RXTHRESH) |
| 90 | #define cpsw_dma_rxfree(base, offset) \ |
| 91 | (void __iomem *)((base) + (offset) + CPDMA_RXFREE) |
| 92 | #define cpsw_dma_txhdp(base, offset) \ |
| 93 | (void __iomem *)((base) + (offset) + CPDMA_TXHDP) |
| 94 | #define cpsw_dma_rxhdp(base, offset) \ |
| 95 | (void __iomem *)((base) + (offset) + CPDMA_RXHDP) |
| 96 | #define cpsw_dma_txcp(base, offset) \ |
| 97 | (void __iomem *)((base) + (offset) + CPDMA_TXCP) |
| 98 | #define cpsw_dma_rxcp(base, offset) \ |
| 99 | (void __iomem *)((base) + (offset) + CPDMA_RXCP) |
| 100 | |
| 101 | #define CPSW_POLL_WEIGHT 64 |
| 102 | #define CPSW_MIN_PACKET_SIZE 60 |
| 103 | #define CPSW_MAX_PACKET_SIZE (1500 + 14 + 4 + 4) |
| 104 | |
| 105 | #define RX_PRIORITY_MAPPING 0x76543210 |
| 106 | #define TX_PRIORITY_MAPPING 0x33221100 |
| 107 | #define CPDMA_TX_PRIORITY_MAP 0x76543210 |
| 108 | |
| 109 | #define cpsw_enable_irq(priv) \ |
| 110 | do { \ |
| 111 | u32 i; \ |
| 112 | for (i = 0; i < priv->num_irqs; i++) \ |
| 113 | enable_irq(priv->irqs_table[i]); \ |
| 114 | } while (0); |
| 115 | #define cpsw_disable_irq(priv) \ |
| 116 | do { \ |
| 117 | u32 i; \ |
| 118 | for (i = 0; i < priv->num_irqs; i++) \ |
| 119 | disable_irq_nosync(priv->irqs_table[i]); \ |
| 120 | } while (0); |
| 121 | |
| 122 | static int debug_level; |
| 123 | module_param(debug_level, int, 0); |
| 124 | MODULE_PARM_DESC(debug_level, "cpsw debug level (NETIF_MSG bits)"); |
| 125 | |
| 126 | static int ale_ageout = 10; |
| 127 | module_param(ale_ageout, int, 0); |
| 128 | MODULE_PARM_DESC(ale_ageout, "cpsw ale ageout interval (seconds)"); |
| 129 | |
| 130 | static int rx_packet_max = CPSW_MAX_PACKET_SIZE; |
| 131 | module_param(rx_packet_max, int, 0); |
| 132 | MODULE_PARM_DESC(rx_packet_max, "maximum receive packet size (bytes)"); |
| 133 | |
Richard Cochran | 996a5c2 | 2012-10-29 08:45:12 +0000 | [diff] [blame] | 134 | struct cpsw_wr_regs { |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 135 | u32 id_ver; |
| 136 | u32 soft_reset; |
| 137 | u32 control; |
| 138 | u32 int_control; |
| 139 | u32 rx_thresh_en; |
| 140 | u32 rx_en; |
| 141 | u32 tx_en; |
| 142 | u32 misc_en; |
| 143 | }; |
| 144 | |
Richard Cochran | 996a5c2 | 2012-10-29 08:45:12 +0000 | [diff] [blame] | 145 | struct cpsw_ss_regs { |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 146 | u32 id_ver; |
| 147 | u32 control; |
| 148 | u32 soft_reset; |
| 149 | u32 stat_port_en; |
| 150 | u32 ptype; |
Richard Cochran | bd357af | 2012-10-29 08:45:13 +0000 | [diff] [blame^] | 151 | u32 soft_idle; |
| 152 | u32 thru_rate; |
| 153 | u32 gap_thresh; |
| 154 | u32 tx_start_wds; |
| 155 | u32 flow_control; |
| 156 | u32 vlan_ltype; |
| 157 | u32 ts_ltype; |
| 158 | u32 dlr_ltype; |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 159 | }; |
| 160 | |
| 161 | struct cpsw_slave_regs { |
| 162 | u32 max_blks; |
| 163 | u32 blk_cnt; |
| 164 | u32 flow_thresh; |
| 165 | u32 port_vlan; |
| 166 | u32 tx_pri_map; |
| 167 | u32 ts_ctl; |
| 168 | u32 ts_seq_ltype; |
| 169 | u32 ts_vlan; |
| 170 | u32 sa_lo; |
| 171 | u32 sa_hi; |
| 172 | }; |
| 173 | |
| 174 | struct cpsw_host_regs { |
| 175 | u32 max_blks; |
| 176 | u32 blk_cnt; |
| 177 | u32 flow_thresh; |
| 178 | u32 port_vlan; |
| 179 | u32 tx_pri_map; |
| 180 | u32 cpdma_tx_pri_map; |
| 181 | u32 cpdma_rx_chan_map; |
| 182 | }; |
| 183 | |
| 184 | struct cpsw_sliver_regs { |
| 185 | u32 id_ver; |
| 186 | u32 mac_control; |
| 187 | u32 mac_status; |
| 188 | u32 soft_reset; |
| 189 | u32 rx_maxlen; |
| 190 | u32 __reserved_0; |
| 191 | u32 rx_pause; |
| 192 | u32 tx_pause; |
| 193 | u32 __reserved_1; |
| 194 | u32 rx_pri_map; |
| 195 | }; |
| 196 | |
| 197 | struct cpsw_slave { |
| 198 | struct cpsw_slave_regs __iomem *regs; |
| 199 | struct cpsw_sliver_regs __iomem *sliver; |
| 200 | int slave_num; |
| 201 | u32 mac_control; |
| 202 | struct cpsw_slave_data *data; |
| 203 | struct phy_device *phy; |
| 204 | }; |
| 205 | |
| 206 | struct cpsw_priv { |
| 207 | spinlock_t lock; |
| 208 | struct platform_device *pdev; |
| 209 | struct net_device *ndev; |
| 210 | struct resource *cpsw_res; |
| 211 | struct resource *cpsw_ss_res; |
| 212 | struct napi_struct napi; |
| 213 | struct device *dev; |
| 214 | struct cpsw_platform_data data; |
Richard Cochran | 996a5c2 | 2012-10-29 08:45:12 +0000 | [diff] [blame] | 215 | struct cpsw_ss_regs __iomem *regs; |
| 216 | struct cpsw_wr_regs __iomem *wr_regs; |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 217 | struct cpsw_host_regs __iomem *host_port_regs; |
| 218 | u32 msg_enable; |
| 219 | struct net_device_stats stats; |
| 220 | int rx_packet_max; |
| 221 | int host_port; |
| 222 | struct clk *clk; |
| 223 | u8 mac_addr[ETH_ALEN]; |
| 224 | struct cpsw_slave *slaves; |
| 225 | struct cpdma_ctlr *dma; |
| 226 | struct cpdma_chan *txch, *rxch; |
| 227 | struct cpsw_ale *ale; |
| 228 | /* snapshot of IRQ numbers */ |
| 229 | u32 irqs_table[4]; |
| 230 | u32 num_irqs; |
| 231 | }; |
| 232 | |
| 233 | #define napi_to_priv(napi) container_of(napi, struct cpsw_priv, napi) |
| 234 | #define for_each_slave(priv, func, arg...) \ |
| 235 | do { \ |
| 236 | int idx; \ |
| 237 | for (idx = 0; idx < (priv)->data.slaves; idx++) \ |
| 238 | (func)((priv)->slaves + idx, ##arg); \ |
| 239 | } while (0) |
| 240 | |
Mugunthan V N | 5c50a85 | 2012-10-29 08:45:11 +0000 | [diff] [blame] | 241 | static void cpsw_ndo_set_rx_mode(struct net_device *ndev) |
| 242 | { |
| 243 | struct cpsw_priv *priv = netdev_priv(ndev); |
| 244 | |
| 245 | if (ndev->flags & IFF_PROMISC) { |
| 246 | /* Enable promiscuous mode */ |
| 247 | dev_err(priv->dev, "Ignoring Promiscuous mode\n"); |
| 248 | return; |
| 249 | } |
| 250 | |
| 251 | /* Clear all mcast from ALE */ |
| 252 | cpsw_ale_flush_multicast(priv->ale, ALE_ALL_PORTS << priv->host_port); |
| 253 | |
| 254 | if (!netdev_mc_empty(ndev)) { |
| 255 | struct netdev_hw_addr *ha; |
| 256 | |
| 257 | /* program multicast address list into ALE register */ |
| 258 | netdev_for_each_mc_addr(ha, ndev) { |
| 259 | cpsw_ale_add_mcast(priv->ale, (u8 *)ha->addr, |
| 260 | ALE_ALL_PORTS << priv->host_port, 0, 0); |
| 261 | } |
| 262 | } |
| 263 | } |
| 264 | |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 265 | static void cpsw_intr_enable(struct cpsw_priv *priv) |
| 266 | { |
Richard Cochran | 996a5c2 | 2012-10-29 08:45:12 +0000 | [diff] [blame] | 267 | __raw_writel(0xFF, &priv->wr_regs->tx_en); |
| 268 | __raw_writel(0xFF, &priv->wr_regs->rx_en); |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 269 | |
| 270 | cpdma_ctlr_int_ctrl(priv->dma, true); |
| 271 | return; |
| 272 | } |
| 273 | |
| 274 | static void cpsw_intr_disable(struct cpsw_priv *priv) |
| 275 | { |
Richard Cochran | 996a5c2 | 2012-10-29 08:45:12 +0000 | [diff] [blame] | 276 | __raw_writel(0, &priv->wr_regs->tx_en); |
| 277 | __raw_writel(0, &priv->wr_regs->rx_en); |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 278 | |
| 279 | cpdma_ctlr_int_ctrl(priv->dma, false); |
| 280 | return; |
| 281 | } |
| 282 | |
| 283 | void cpsw_tx_handler(void *token, int len, int status) |
| 284 | { |
| 285 | struct sk_buff *skb = token; |
| 286 | struct net_device *ndev = skb->dev; |
| 287 | struct cpsw_priv *priv = netdev_priv(ndev); |
| 288 | |
| 289 | if (unlikely(netif_queue_stopped(ndev))) |
| 290 | netif_start_queue(ndev); |
| 291 | priv->stats.tx_packets++; |
| 292 | priv->stats.tx_bytes += len; |
| 293 | dev_kfree_skb_any(skb); |
| 294 | } |
| 295 | |
| 296 | void cpsw_rx_handler(void *token, int len, int status) |
| 297 | { |
| 298 | struct sk_buff *skb = token; |
| 299 | struct net_device *ndev = skb->dev; |
| 300 | struct cpsw_priv *priv = netdev_priv(ndev); |
| 301 | int ret = 0; |
| 302 | |
| 303 | /* free and bail if we are shutting down */ |
| 304 | if (unlikely(!netif_running(ndev)) || |
| 305 | unlikely(!netif_carrier_ok(ndev))) { |
| 306 | dev_kfree_skb_any(skb); |
| 307 | return; |
| 308 | } |
| 309 | if (likely(status >= 0)) { |
| 310 | skb_put(skb, len); |
| 311 | skb->protocol = eth_type_trans(skb, ndev); |
| 312 | netif_receive_skb(skb); |
| 313 | priv->stats.rx_bytes += len; |
| 314 | priv->stats.rx_packets++; |
| 315 | skb = NULL; |
| 316 | } |
| 317 | |
| 318 | if (unlikely(!netif_running(ndev))) { |
| 319 | if (skb) |
| 320 | dev_kfree_skb_any(skb); |
| 321 | return; |
| 322 | } |
| 323 | |
| 324 | if (likely(!skb)) { |
| 325 | skb = netdev_alloc_skb_ip_align(ndev, priv->rx_packet_max); |
| 326 | if (WARN_ON(!skb)) |
| 327 | return; |
| 328 | |
| 329 | ret = cpdma_chan_submit(priv->rxch, skb, skb->data, |
| 330 | skb_tailroom(skb), GFP_KERNEL); |
| 331 | } |
| 332 | WARN_ON(ret < 0); |
| 333 | } |
| 334 | |
| 335 | static irqreturn_t cpsw_interrupt(int irq, void *dev_id) |
| 336 | { |
| 337 | struct cpsw_priv *priv = dev_id; |
| 338 | |
| 339 | if (likely(netif_running(priv->ndev))) { |
| 340 | cpsw_intr_disable(priv); |
| 341 | cpsw_disable_irq(priv); |
| 342 | napi_schedule(&priv->napi); |
| 343 | } |
| 344 | return IRQ_HANDLED; |
| 345 | } |
| 346 | |
| 347 | static inline int cpsw_get_slave_port(struct cpsw_priv *priv, u32 slave_num) |
| 348 | { |
| 349 | if (priv->host_port == 0) |
| 350 | return slave_num + 1; |
| 351 | else |
| 352 | return slave_num; |
| 353 | } |
| 354 | |
| 355 | static int cpsw_poll(struct napi_struct *napi, int budget) |
| 356 | { |
| 357 | struct cpsw_priv *priv = napi_to_priv(napi); |
| 358 | int num_tx, num_rx; |
| 359 | |
| 360 | num_tx = cpdma_chan_process(priv->txch, 128); |
| 361 | num_rx = cpdma_chan_process(priv->rxch, budget); |
| 362 | |
| 363 | if (num_rx || num_tx) |
| 364 | cpsw_dbg(priv, intr, "poll %d rx, %d tx pkts\n", |
| 365 | num_rx, num_tx); |
| 366 | |
| 367 | if (num_rx < budget) { |
| 368 | napi_complete(napi); |
| 369 | cpsw_intr_enable(priv); |
| 370 | cpdma_ctlr_eoi(priv->dma); |
| 371 | cpsw_enable_irq(priv); |
| 372 | } |
| 373 | |
| 374 | return num_rx; |
| 375 | } |
| 376 | |
| 377 | static inline void soft_reset(const char *module, void __iomem *reg) |
| 378 | { |
| 379 | unsigned long timeout = jiffies + HZ; |
| 380 | |
| 381 | __raw_writel(1, reg); |
| 382 | do { |
| 383 | cpu_relax(); |
| 384 | } while ((__raw_readl(reg) & 1) && time_after(timeout, jiffies)); |
| 385 | |
| 386 | WARN(__raw_readl(reg) & 1, "failed to soft-reset %s\n", module); |
| 387 | } |
| 388 | |
| 389 | #define mac_hi(mac) (((mac)[0] << 0) | ((mac)[1] << 8) | \ |
| 390 | ((mac)[2] << 16) | ((mac)[3] << 24)) |
| 391 | #define mac_lo(mac) (((mac)[4] << 0) | ((mac)[5] << 8)) |
| 392 | |
| 393 | static void cpsw_set_slave_mac(struct cpsw_slave *slave, |
| 394 | struct cpsw_priv *priv) |
| 395 | { |
| 396 | __raw_writel(mac_hi(priv->mac_addr), &slave->regs->sa_hi); |
| 397 | __raw_writel(mac_lo(priv->mac_addr), &slave->regs->sa_lo); |
| 398 | } |
| 399 | |
| 400 | static void _cpsw_adjust_link(struct cpsw_slave *slave, |
| 401 | struct cpsw_priv *priv, bool *link) |
| 402 | { |
| 403 | struct phy_device *phy = slave->phy; |
| 404 | u32 mac_control = 0; |
| 405 | u32 slave_port; |
| 406 | |
| 407 | if (!phy) |
| 408 | return; |
| 409 | |
| 410 | slave_port = cpsw_get_slave_port(priv, slave->slave_num); |
| 411 | |
| 412 | if (phy->link) { |
| 413 | mac_control = priv->data.mac_control; |
| 414 | |
| 415 | /* enable forwarding */ |
| 416 | cpsw_ale_control_set(priv->ale, slave_port, |
| 417 | ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); |
| 418 | |
| 419 | if (phy->speed == 1000) |
| 420 | mac_control |= BIT(7); /* GIGABITEN */ |
| 421 | if (phy->duplex) |
| 422 | mac_control |= BIT(0); /* FULLDUPLEXEN */ |
Daniel Mack | 342b7b7 | 2012-09-27 09:19:34 +0000 | [diff] [blame] | 423 | |
| 424 | /* set speed_in input in case RMII mode is used in 100Mbps */ |
| 425 | if (phy->speed == 100) |
| 426 | mac_control |= BIT(15); |
| 427 | |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 428 | *link = true; |
| 429 | } else { |
| 430 | mac_control = 0; |
| 431 | /* disable forwarding */ |
| 432 | cpsw_ale_control_set(priv->ale, slave_port, |
| 433 | ALE_PORT_STATE, ALE_PORT_STATE_DISABLE); |
| 434 | } |
| 435 | |
| 436 | if (mac_control != slave->mac_control) { |
| 437 | phy_print_status(phy); |
| 438 | __raw_writel(mac_control, &slave->sliver->mac_control); |
| 439 | } |
| 440 | |
| 441 | slave->mac_control = mac_control; |
| 442 | } |
| 443 | |
| 444 | static void cpsw_adjust_link(struct net_device *ndev) |
| 445 | { |
| 446 | struct cpsw_priv *priv = netdev_priv(ndev); |
| 447 | bool link = false; |
| 448 | |
| 449 | for_each_slave(priv, _cpsw_adjust_link, priv, &link); |
| 450 | |
| 451 | if (link) { |
| 452 | netif_carrier_on(ndev); |
| 453 | if (netif_running(ndev)) |
| 454 | netif_wake_queue(ndev); |
| 455 | } else { |
| 456 | netif_carrier_off(ndev); |
| 457 | netif_stop_queue(ndev); |
| 458 | } |
| 459 | } |
| 460 | |
| 461 | static inline int __show_stat(char *buf, int maxlen, const char *name, u32 val) |
| 462 | { |
| 463 | static char *leader = "........................................"; |
| 464 | |
| 465 | if (!val) |
| 466 | return 0; |
| 467 | else |
| 468 | return snprintf(buf, maxlen, "%s %s %10d\n", name, |
| 469 | leader + strlen(name), val); |
| 470 | } |
| 471 | |
| 472 | static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv) |
| 473 | { |
| 474 | char name[32]; |
| 475 | u32 slave_port; |
| 476 | |
| 477 | sprintf(name, "slave-%d", slave->slave_num); |
| 478 | |
| 479 | soft_reset(name, &slave->sliver->soft_reset); |
| 480 | |
| 481 | /* setup priority mapping */ |
| 482 | __raw_writel(RX_PRIORITY_MAPPING, &slave->sliver->rx_pri_map); |
| 483 | __raw_writel(TX_PRIORITY_MAPPING, &slave->regs->tx_pri_map); |
| 484 | |
| 485 | /* setup max packet size, and mac address */ |
| 486 | __raw_writel(priv->rx_packet_max, &slave->sliver->rx_maxlen); |
| 487 | cpsw_set_slave_mac(slave, priv); |
| 488 | |
| 489 | slave->mac_control = 0; /* no link yet */ |
| 490 | |
| 491 | slave_port = cpsw_get_slave_port(priv, slave->slave_num); |
| 492 | |
| 493 | cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast, |
| 494 | 1 << slave_port, 0, ALE_MCAST_FWD_2); |
| 495 | |
| 496 | slave->phy = phy_connect(priv->ndev, slave->data->phy_id, |
| 497 | &cpsw_adjust_link, 0, slave->data->phy_if); |
| 498 | if (IS_ERR(slave->phy)) { |
| 499 | dev_err(priv->dev, "phy %s not found on slave %d\n", |
| 500 | slave->data->phy_id, slave->slave_num); |
| 501 | slave->phy = NULL; |
| 502 | } else { |
| 503 | dev_info(priv->dev, "phy found : id is : 0x%x\n", |
| 504 | slave->phy->phy_id); |
| 505 | phy_start(slave->phy); |
| 506 | } |
| 507 | } |
| 508 | |
| 509 | static void cpsw_init_host_port(struct cpsw_priv *priv) |
| 510 | { |
| 511 | /* soft reset the controller and initialize ale */ |
| 512 | soft_reset("cpsw", &priv->regs->soft_reset); |
| 513 | cpsw_ale_start(priv->ale); |
| 514 | |
| 515 | /* switch to vlan unaware mode */ |
| 516 | cpsw_ale_control_set(priv->ale, 0, ALE_VLAN_AWARE, 0); |
| 517 | |
| 518 | /* setup host port priority mapping */ |
| 519 | __raw_writel(CPDMA_TX_PRIORITY_MAP, |
| 520 | &priv->host_port_regs->cpdma_tx_pri_map); |
| 521 | __raw_writel(0, &priv->host_port_regs->cpdma_rx_chan_map); |
| 522 | |
| 523 | cpsw_ale_control_set(priv->ale, priv->host_port, |
| 524 | ALE_PORT_STATE, ALE_PORT_STATE_FORWARD); |
| 525 | |
| 526 | cpsw_ale_add_ucast(priv->ale, priv->mac_addr, priv->host_port, 0); |
| 527 | cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast, |
| 528 | 1 << priv->host_port, 0, ALE_MCAST_FWD_2); |
| 529 | } |
| 530 | |
| 531 | static int cpsw_ndo_open(struct net_device *ndev) |
| 532 | { |
| 533 | struct cpsw_priv *priv = netdev_priv(ndev); |
| 534 | int i, ret; |
| 535 | u32 reg; |
| 536 | |
| 537 | cpsw_intr_disable(priv); |
| 538 | netif_carrier_off(ndev); |
| 539 | |
Mugunthan V N | f150bd7 | 2012-07-17 08:09:50 +0000 | [diff] [blame] | 540 | pm_runtime_get_sync(&priv->pdev->dev); |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 541 | |
| 542 | reg = __raw_readl(&priv->regs->id_ver); |
| 543 | |
| 544 | dev_info(priv->dev, "initializing cpsw version %d.%d (%d)\n", |
| 545 | CPSW_MAJOR_VERSION(reg), CPSW_MINOR_VERSION(reg), |
| 546 | CPSW_RTL_VERSION(reg)); |
| 547 | |
| 548 | /* initialize host and slave ports */ |
| 549 | cpsw_init_host_port(priv); |
| 550 | for_each_slave(priv, cpsw_slave_open, priv); |
| 551 | |
| 552 | /* setup tx dma to fixed prio and zero offset */ |
| 553 | cpdma_control_set(priv->dma, CPDMA_TX_PRIO_FIXED, 1); |
| 554 | cpdma_control_set(priv->dma, CPDMA_RX_BUFFER_OFFSET, 0); |
| 555 | |
| 556 | /* disable priority elevation and enable statistics on all ports */ |
| 557 | __raw_writel(0, &priv->regs->ptype); |
| 558 | |
| 559 | /* enable statistics collection only on the host port */ |
| 560 | __raw_writel(0x7, &priv->regs->stat_port_en); |
| 561 | |
| 562 | if (WARN_ON(!priv->data.rx_descs)) |
| 563 | priv->data.rx_descs = 128; |
| 564 | |
| 565 | for (i = 0; i < priv->data.rx_descs; i++) { |
| 566 | struct sk_buff *skb; |
| 567 | |
| 568 | ret = -ENOMEM; |
| 569 | skb = netdev_alloc_skb_ip_align(priv->ndev, |
| 570 | priv->rx_packet_max); |
| 571 | if (!skb) |
| 572 | break; |
| 573 | ret = cpdma_chan_submit(priv->rxch, skb, skb->data, |
| 574 | skb_tailroom(skb), GFP_KERNEL); |
| 575 | if (WARN_ON(ret < 0)) |
| 576 | break; |
| 577 | } |
| 578 | /* continue even if we didn't manage to submit all receive descs */ |
| 579 | cpsw_info(priv, ifup, "submitted %d rx descriptors\n", i); |
| 580 | |
| 581 | cpdma_ctlr_start(priv->dma); |
| 582 | cpsw_intr_enable(priv); |
| 583 | napi_enable(&priv->napi); |
| 584 | cpdma_ctlr_eoi(priv->dma); |
| 585 | |
| 586 | return 0; |
| 587 | } |
| 588 | |
| 589 | static void cpsw_slave_stop(struct cpsw_slave *slave, struct cpsw_priv *priv) |
| 590 | { |
| 591 | if (!slave->phy) |
| 592 | return; |
| 593 | phy_stop(slave->phy); |
| 594 | phy_disconnect(slave->phy); |
| 595 | slave->phy = NULL; |
| 596 | } |
| 597 | |
| 598 | static int cpsw_ndo_stop(struct net_device *ndev) |
| 599 | { |
| 600 | struct cpsw_priv *priv = netdev_priv(ndev); |
| 601 | |
| 602 | cpsw_info(priv, ifdown, "shutting down cpsw device\n"); |
| 603 | cpsw_intr_disable(priv); |
| 604 | cpdma_ctlr_int_ctrl(priv->dma, false); |
| 605 | cpdma_ctlr_stop(priv->dma); |
| 606 | netif_stop_queue(priv->ndev); |
| 607 | napi_disable(&priv->napi); |
| 608 | netif_carrier_off(priv->ndev); |
| 609 | cpsw_ale_stop(priv->ale); |
| 610 | for_each_slave(priv, cpsw_slave_stop, priv); |
Mugunthan V N | f150bd7 | 2012-07-17 08:09:50 +0000 | [diff] [blame] | 611 | pm_runtime_put_sync(&priv->pdev->dev); |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 612 | return 0; |
| 613 | } |
| 614 | |
| 615 | static netdev_tx_t cpsw_ndo_start_xmit(struct sk_buff *skb, |
| 616 | struct net_device *ndev) |
| 617 | { |
| 618 | struct cpsw_priv *priv = netdev_priv(ndev); |
| 619 | int ret; |
| 620 | |
| 621 | ndev->trans_start = jiffies; |
| 622 | |
| 623 | if (skb_padto(skb, CPSW_MIN_PACKET_SIZE)) { |
| 624 | cpsw_err(priv, tx_err, "packet pad failed\n"); |
| 625 | priv->stats.tx_dropped++; |
| 626 | return NETDEV_TX_OK; |
| 627 | } |
| 628 | |
| 629 | ret = cpdma_chan_submit(priv->txch, skb, skb->data, |
| 630 | skb->len, GFP_KERNEL); |
| 631 | if (unlikely(ret != 0)) { |
| 632 | cpsw_err(priv, tx_err, "desc submit failed\n"); |
| 633 | goto fail; |
| 634 | } |
| 635 | |
| 636 | return NETDEV_TX_OK; |
| 637 | fail: |
| 638 | priv->stats.tx_dropped++; |
| 639 | netif_stop_queue(ndev); |
| 640 | return NETDEV_TX_BUSY; |
| 641 | } |
| 642 | |
| 643 | static void cpsw_ndo_change_rx_flags(struct net_device *ndev, int flags) |
| 644 | { |
| 645 | /* |
| 646 | * The switch cannot operate in promiscuous mode without substantial |
| 647 | * headache. For promiscuous mode to work, we would need to put the |
| 648 | * ALE in bypass mode and route all traffic to the host port. |
| 649 | * Subsequently, the host will need to operate as a "bridge", learn, |
| 650 | * and flood as needed. For now, we simply complain here and |
| 651 | * do nothing about it :-) |
| 652 | */ |
| 653 | if ((flags & IFF_PROMISC) && (ndev->flags & IFF_PROMISC)) |
| 654 | dev_err(&ndev->dev, "promiscuity ignored!\n"); |
| 655 | |
| 656 | /* |
| 657 | * The switch cannot filter multicast traffic unless it is configured |
| 658 | * in "VLAN Aware" mode. Unfortunately, VLAN awareness requires a |
| 659 | * whole bunch of additional logic that this driver does not implement |
| 660 | * at present. |
| 661 | */ |
| 662 | if ((flags & IFF_ALLMULTI) && !(ndev->flags & IFF_ALLMULTI)) |
| 663 | dev_err(&ndev->dev, "multicast traffic cannot be filtered!\n"); |
| 664 | } |
| 665 | |
| 666 | static void cpsw_ndo_tx_timeout(struct net_device *ndev) |
| 667 | { |
| 668 | struct cpsw_priv *priv = netdev_priv(ndev); |
| 669 | |
| 670 | cpsw_err(priv, tx_err, "transmit timeout, restarting dma\n"); |
| 671 | priv->stats.tx_errors++; |
| 672 | cpsw_intr_disable(priv); |
| 673 | cpdma_ctlr_int_ctrl(priv->dma, false); |
| 674 | cpdma_chan_stop(priv->txch); |
| 675 | cpdma_chan_start(priv->txch); |
| 676 | cpdma_ctlr_int_ctrl(priv->dma, true); |
| 677 | cpsw_intr_enable(priv); |
| 678 | cpdma_ctlr_eoi(priv->dma); |
| 679 | } |
| 680 | |
| 681 | static struct net_device_stats *cpsw_ndo_get_stats(struct net_device *ndev) |
| 682 | { |
| 683 | struct cpsw_priv *priv = netdev_priv(ndev); |
| 684 | return &priv->stats; |
| 685 | } |
| 686 | |
| 687 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 688 | static void cpsw_ndo_poll_controller(struct net_device *ndev) |
| 689 | { |
| 690 | struct cpsw_priv *priv = netdev_priv(ndev); |
| 691 | |
| 692 | cpsw_intr_disable(priv); |
| 693 | cpdma_ctlr_int_ctrl(priv->dma, false); |
| 694 | cpsw_interrupt(ndev->irq, priv); |
| 695 | cpdma_ctlr_int_ctrl(priv->dma, true); |
| 696 | cpsw_intr_enable(priv); |
| 697 | cpdma_ctlr_eoi(priv->dma); |
| 698 | } |
| 699 | #endif |
| 700 | |
| 701 | static const struct net_device_ops cpsw_netdev_ops = { |
| 702 | .ndo_open = cpsw_ndo_open, |
| 703 | .ndo_stop = cpsw_ndo_stop, |
| 704 | .ndo_start_xmit = cpsw_ndo_start_xmit, |
| 705 | .ndo_change_rx_flags = cpsw_ndo_change_rx_flags, |
| 706 | .ndo_validate_addr = eth_validate_addr, |
David S. Miller | 5c473ed | 2012-03-20 00:33:59 -0400 | [diff] [blame] | 707 | .ndo_change_mtu = eth_change_mtu, |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 708 | .ndo_tx_timeout = cpsw_ndo_tx_timeout, |
| 709 | .ndo_get_stats = cpsw_ndo_get_stats, |
Mugunthan V N | 5c50a85 | 2012-10-29 08:45:11 +0000 | [diff] [blame] | 710 | .ndo_set_rx_mode = cpsw_ndo_set_rx_mode, |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 711 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 712 | .ndo_poll_controller = cpsw_ndo_poll_controller, |
| 713 | #endif |
| 714 | }; |
| 715 | |
| 716 | static void cpsw_get_drvinfo(struct net_device *ndev, |
| 717 | struct ethtool_drvinfo *info) |
| 718 | { |
| 719 | struct cpsw_priv *priv = netdev_priv(ndev); |
| 720 | strcpy(info->driver, "TI CPSW Driver v1.0"); |
| 721 | strcpy(info->version, "1.0"); |
| 722 | strcpy(info->bus_info, priv->pdev->name); |
| 723 | } |
| 724 | |
| 725 | static u32 cpsw_get_msglevel(struct net_device *ndev) |
| 726 | { |
| 727 | struct cpsw_priv *priv = netdev_priv(ndev); |
| 728 | return priv->msg_enable; |
| 729 | } |
| 730 | |
| 731 | static void cpsw_set_msglevel(struct net_device *ndev, u32 value) |
| 732 | { |
| 733 | struct cpsw_priv *priv = netdev_priv(ndev); |
| 734 | priv->msg_enable = value; |
| 735 | } |
| 736 | |
| 737 | static const struct ethtool_ops cpsw_ethtool_ops = { |
| 738 | .get_drvinfo = cpsw_get_drvinfo, |
| 739 | .get_msglevel = cpsw_get_msglevel, |
| 740 | .set_msglevel = cpsw_set_msglevel, |
| 741 | .get_link = ethtool_op_get_link, |
| 742 | }; |
| 743 | |
| 744 | static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_priv *priv) |
| 745 | { |
| 746 | void __iomem *regs = priv->regs; |
| 747 | int slave_num = slave->slave_num; |
| 748 | struct cpsw_slave_data *data = priv->data.slave_data + slave_num; |
| 749 | |
| 750 | slave->data = data; |
| 751 | slave->regs = regs + data->slave_reg_ofs; |
| 752 | slave->sliver = regs + data->sliver_reg_ofs; |
| 753 | } |
| 754 | |
Mugunthan V N | 2eb32b0 | 2012-07-30 10:17:14 +0000 | [diff] [blame] | 755 | static int cpsw_probe_dt(struct cpsw_platform_data *data, |
| 756 | struct platform_device *pdev) |
| 757 | { |
| 758 | struct device_node *node = pdev->dev.of_node; |
| 759 | struct device_node *slave_node; |
| 760 | int i = 0, ret; |
| 761 | u32 prop; |
| 762 | |
| 763 | if (!node) |
| 764 | return -EINVAL; |
| 765 | |
| 766 | if (of_property_read_u32(node, "slaves", &prop)) { |
| 767 | pr_err("Missing slaves property in the DT.\n"); |
| 768 | return -EINVAL; |
| 769 | } |
| 770 | data->slaves = prop; |
| 771 | |
| 772 | data->slave_data = kzalloc(sizeof(struct cpsw_slave_data) * |
| 773 | data->slaves, GFP_KERNEL); |
| 774 | if (!data->slave_data) { |
| 775 | pr_err("Could not allocate slave memory.\n"); |
| 776 | return -EINVAL; |
| 777 | } |
| 778 | |
| 779 | data->no_bd_ram = of_property_read_bool(node, "no_bd_ram"); |
| 780 | |
| 781 | if (of_property_read_u32(node, "cpdma_channels", &prop)) { |
| 782 | pr_err("Missing cpdma_channels property in the DT.\n"); |
| 783 | ret = -EINVAL; |
| 784 | goto error_ret; |
| 785 | } |
| 786 | data->channels = prop; |
| 787 | |
| 788 | if (of_property_read_u32(node, "host_port_no", &prop)) { |
| 789 | pr_err("Missing host_port_no property in the DT.\n"); |
| 790 | ret = -EINVAL; |
| 791 | goto error_ret; |
| 792 | } |
| 793 | data->host_port_num = prop; |
| 794 | |
| 795 | if (of_property_read_u32(node, "cpdma_reg_ofs", &prop)) { |
| 796 | pr_err("Missing cpdma_reg_ofs property in the DT.\n"); |
| 797 | ret = -EINVAL; |
| 798 | goto error_ret; |
| 799 | } |
| 800 | data->cpdma_reg_ofs = prop; |
| 801 | |
| 802 | if (of_property_read_u32(node, "cpdma_sram_ofs", &prop)) { |
| 803 | pr_err("Missing cpdma_sram_ofs property in the DT.\n"); |
| 804 | ret = -EINVAL; |
| 805 | goto error_ret; |
| 806 | } |
| 807 | data->cpdma_sram_ofs = prop; |
| 808 | |
| 809 | if (of_property_read_u32(node, "ale_reg_ofs", &prop)) { |
| 810 | pr_err("Missing ale_reg_ofs property in the DT.\n"); |
| 811 | ret = -EINVAL; |
| 812 | goto error_ret; |
| 813 | } |
| 814 | data->ale_reg_ofs = prop; |
| 815 | |
| 816 | if (of_property_read_u32(node, "ale_entries", &prop)) { |
| 817 | pr_err("Missing ale_entries property in the DT.\n"); |
| 818 | ret = -EINVAL; |
| 819 | goto error_ret; |
| 820 | } |
| 821 | data->ale_entries = prop; |
| 822 | |
| 823 | if (of_property_read_u32(node, "host_port_reg_ofs", &prop)) { |
| 824 | pr_err("Missing host_port_reg_ofs property in the DT.\n"); |
| 825 | ret = -EINVAL; |
| 826 | goto error_ret; |
| 827 | } |
| 828 | data->host_port_reg_ofs = prop; |
| 829 | |
| 830 | if (of_property_read_u32(node, "hw_stats_reg_ofs", &prop)) { |
| 831 | pr_err("Missing hw_stats_reg_ofs property in the DT.\n"); |
| 832 | ret = -EINVAL; |
| 833 | goto error_ret; |
| 834 | } |
| 835 | data->hw_stats_reg_ofs = prop; |
| 836 | |
| 837 | if (of_property_read_u32(node, "bd_ram_ofs", &prop)) { |
| 838 | pr_err("Missing bd_ram_ofs property in the DT.\n"); |
| 839 | ret = -EINVAL; |
| 840 | goto error_ret; |
| 841 | } |
| 842 | data->bd_ram_ofs = prop; |
| 843 | |
| 844 | if (of_property_read_u32(node, "bd_ram_size", &prop)) { |
| 845 | pr_err("Missing bd_ram_size property in the DT.\n"); |
| 846 | ret = -EINVAL; |
| 847 | goto error_ret; |
| 848 | } |
| 849 | data->bd_ram_size = prop; |
| 850 | |
| 851 | if (of_property_read_u32(node, "rx_descs", &prop)) { |
| 852 | pr_err("Missing rx_descs property in the DT.\n"); |
| 853 | ret = -EINVAL; |
| 854 | goto error_ret; |
| 855 | } |
| 856 | data->rx_descs = prop; |
| 857 | |
| 858 | if (of_property_read_u32(node, "mac_control", &prop)) { |
| 859 | pr_err("Missing mac_control property in the DT.\n"); |
| 860 | ret = -EINVAL; |
| 861 | goto error_ret; |
| 862 | } |
| 863 | data->mac_control = prop; |
| 864 | |
| 865 | for_each_child_of_node(node, slave_node) { |
| 866 | struct cpsw_slave_data *slave_data = data->slave_data + i; |
| 867 | const char *phy_id = NULL; |
| 868 | const void *mac_addr = NULL; |
| 869 | |
| 870 | if (of_property_read_string(slave_node, "phy_id", &phy_id)) { |
| 871 | pr_err("Missing slave[%d] phy_id property\n", i); |
| 872 | ret = -EINVAL; |
| 873 | goto error_ret; |
| 874 | } |
| 875 | slave_data->phy_id = phy_id; |
| 876 | |
| 877 | if (of_property_read_u32(slave_node, "slave_reg_ofs", &prop)) { |
| 878 | pr_err("Missing slave[%d] slave_reg_ofs property\n", i); |
| 879 | ret = -EINVAL; |
| 880 | goto error_ret; |
| 881 | } |
| 882 | slave_data->slave_reg_ofs = prop; |
| 883 | |
| 884 | if (of_property_read_u32(slave_node, "sliver_reg_ofs", |
| 885 | &prop)) { |
| 886 | pr_err("Missing slave[%d] sliver_reg_ofs property\n", |
| 887 | i); |
| 888 | ret = -EINVAL; |
| 889 | goto error_ret; |
| 890 | } |
| 891 | slave_data->sliver_reg_ofs = prop; |
| 892 | |
| 893 | mac_addr = of_get_mac_address(slave_node); |
| 894 | if (mac_addr) |
| 895 | memcpy(slave_data->mac_addr, mac_addr, ETH_ALEN); |
| 896 | |
| 897 | i++; |
| 898 | } |
| 899 | |
| 900 | return 0; |
| 901 | |
| 902 | error_ret: |
| 903 | kfree(data->slave_data); |
| 904 | return ret; |
| 905 | } |
| 906 | |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 907 | static int __devinit cpsw_probe(struct platform_device *pdev) |
| 908 | { |
| 909 | struct cpsw_platform_data *data = pdev->dev.platform_data; |
| 910 | struct net_device *ndev; |
| 911 | struct cpsw_priv *priv; |
| 912 | struct cpdma_params dma_params; |
| 913 | struct cpsw_ale_params ale_params; |
| 914 | void __iomem *regs; |
| 915 | struct resource *res; |
| 916 | int ret = 0, i, k = 0; |
| 917 | |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 918 | ndev = alloc_etherdev(sizeof(struct cpsw_priv)); |
| 919 | if (!ndev) { |
| 920 | pr_err("error allocating net_device\n"); |
| 921 | return -ENOMEM; |
| 922 | } |
| 923 | |
| 924 | platform_set_drvdata(pdev, ndev); |
| 925 | priv = netdev_priv(ndev); |
| 926 | spin_lock_init(&priv->lock); |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 927 | priv->pdev = pdev; |
| 928 | priv->ndev = ndev; |
| 929 | priv->dev = &ndev->dev; |
| 930 | priv->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG); |
| 931 | priv->rx_packet_max = max(rx_packet_max, 128); |
| 932 | |
Mugunthan V N | 2eb32b0 | 2012-07-30 10:17:14 +0000 | [diff] [blame] | 933 | if (cpsw_probe_dt(&priv->data, pdev)) { |
| 934 | pr_err("cpsw: platform data missing\n"); |
| 935 | ret = -ENODEV; |
| 936 | goto clean_ndev_ret; |
| 937 | } |
| 938 | data = &priv->data; |
| 939 | |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 940 | if (is_valid_ether_addr(data->slave_data[0].mac_addr)) { |
| 941 | memcpy(priv->mac_addr, data->slave_data[0].mac_addr, ETH_ALEN); |
| 942 | pr_info("Detected MACID = %pM", priv->mac_addr); |
| 943 | } else { |
Joe Perches | 7efd26d | 2012-07-12 19:33:06 +0000 | [diff] [blame] | 944 | eth_random_addr(priv->mac_addr); |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 945 | pr_info("Random MACID = %pM", priv->mac_addr); |
| 946 | } |
| 947 | |
| 948 | memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN); |
| 949 | |
| 950 | priv->slaves = kzalloc(sizeof(struct cpsw_slave) * data->slaves, |
| 951 | GFP_KERNEL); |
| 952 | if (!priv->slaves) { |
| 953 | ret = -EBUSY; |
| 954 | goto clean_ndev_ret; |
| 955 | } |
| 956 | for (i = 0; i < data->slaves; i++) |
| 957 | priv->slaves[i].slave_num = i; |
| 958 | |
Mugunthan V N | f150bd7 | 2012-07-17 08:09:50 +0000 | [diff] [blame] | 959 | pm_runtime_enable(&pdev->dev); |
| 960 | priv->clk = clk_get(&pdev->dev, "fck"); |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 961 | if (IS_ERR(priv->clk)) { |
Mugunthan V N | f150bd7 | 2012-07-17 08:09:50 +0000 | [diff] [blame] | 962 | dev_err(&pdev->dev, "fck is not found\n"); |
| 963 | ret = -ENODEV; |
| 964 | goto clean_slave_ret; |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 965 | } |
| 966 | |
| 967 | priv->cpsw_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 968 | if (!priv->cpsw_res) { |
| 969 | dev_err(priv->dev, "error getting i/o resource\n"); |
| 970 | ret = -ENOENT; |
| 971 | goto clean_clk_ret; |
| 972 | } |
| 973 | |
| 974 | if (!request_mem_region(priv->cpsw_res->start, |
| 975 | resource_size(priv->cpsw_res), ndev->name)) { |
| 976 | dev_err(priv->dev, "failed request i/o region\n"); |
| 977 | ret = -ENXIO; |
| 978 | goto clean_clk_ret; |
| 979 | } |
| 980 | |
| 981 | regs = ioremap(priv->cpsw_res->start, resource_size(priv->cpsw_res)); |
| 982 | if (!regs) { |
| 983 | dev_err(priv->dev, "unable to map i/o region\n"); |
| 984 | goto clean_cpsw_iores_ret; |
| 985 | } |
| 986 | priv->regs = regs; |
| 987 | priv->host_port = data->host_port_num; |
| 988 | priv->host_port_regs = regs + data->host_port_reg_ofs; |
| 989 | |
| 990 | priv->cpsw_ss_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
| 991 | if (!priv->cpsw_ss_res) { |
| 992 | dev_err(priv->dev, "error getting i/o resource\n"); |
| 993 | ret = -ENOENT; |
| 994 | goto clean_clk_ret; |
| 995 | } |
| 996 | |
| 997 | if (!request_mem_region(priv->cpsw_ss_res->start, |
| 998 | resource_size(priv->cpsw_ss_res), ndev->name)) { |
| 999 | dev_err(priv->dev, "failed request i/o region\n"); |
| 1000 | ret = -ENXIO; |
| 1001 | goto clean_clk_ret; |
| 1002 | } |
| 1003 | |
| 1004 | regs = ioremap(priv->cpsw_ss_res->start, |
| 1005 | resource_size(priv->cpsw_ss_res)); |
| 1006 | if (!regs) { |
| 1007 | dev_err(priv->dev, "unable to map i/o region\n"); |
| 1008 | goto clean_cpsw_ss_iores_ret; |
| 1009 | } |
Richard Cochran | 996a5c2 | 2012-10-29 08:45:12 +0000 | [diff] [blame] | 1010 | priv->wr_regs = regs; |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 1011 | |
| 1012 | for_each_slave(priv, cpsw_slave_init, priv); |
| 1013 | |
| 1014 | memset(&dma_params, 0, sizeof(dma_params)); |
| 1015 | dma_params.dev = &pdev->dev; |
| 1016 | dma_params.dmaregs = cpsw_dma_regs((u32)priv->regs, |
| 1017 | data->cpdma_reg_ofs); |
| 1018 | dma_params.rxthresh = cpsw_dma_rxthresh((u32)priv->regs, |
| 1019 | data->cpdma_reg_ofs); |
| 1020 | dma_params.rxfree = cpsw_dma_rxfree((u32)priv->regs, |
| 1021 | data->cpdma_reg_ofs); |
| 1022 | dma_params.txhdp = cpsw_dma_txhdp((u32)priv->regs, |
| 1023 | data->cpdma_sram_ofs); |
| 1024 | dma_params.rxhdp = cpsw_dma_rxhdp((u32)priv->regs, |
| 1025 | data->cpdma_sram_ofs); |
| 1026 | dma_params.txcp = cpsw_dma_txcp((u32)priv->regs, |
| 1027 | data->cpdma_sram_ofs); |
| 1028 | dma_params.rxcp = cpsw_dma_rxcp((u32)priv->regs, |
| 1029 | data->cpdma_sram_ofs); |
| 1030 | |
| 1031 | dma_params.num_chan = data->channels; |
| 1032 | dma_params.has_soft_reset = true; |
| 1033 | dma_params.min_packet_size = CPSW_MIN_PACKET_SIZE; |
| 1034 | dma_params.desc_mem_size = data->bd_ram_size; |
| 1035 | dma_params.desc_align = 16; |
| 1036 | dma_params.has_ext_regs = true; |
| 1037 | dma_params.desc_mem_phys = data->no_bd_ram ? 0 : |
| 1038 | (u32 __force)priv->cpsw_res->start + data->bd_ram_ofs; |
| 1039 | dma_params.desc_hw_addr = data->hw_ram_addr ? |
| 1040 | data->hw_ram_addr : dma_params.desc_mem_phys ; |
| 1041 | |
| 1042 | priv->dma = cpdma_ctlr_create(&dma_params); |
| 1043 | if (!priv->dma) { |
| 1044 | dev_err(priv->dev, "error initializing dma\n"); |
| 1045 | ret = -ENOMEM; |
| 1046 | goto clean_iomap_ret; |
| 1047 | } |
| 1048 | |
| 1049 | priv->txch = cpdma_chan_create(priv->dma, tx_chan_num(0), |
| 1050 | cpsw_tx_handler); |
| 1051 | priv->rxch = cpdma_chan_create(priv->dma, rx_chan_num(0), |
| 1052 | cpsw_rx_handler); |
| 1053 | |
| 1054 | if (WARN_ON(!priv->txch || !priv->rxch)) { |
| 1055 | dev_err(priv->dev, "error initializing dma channels\n"); |
| 1056 | ret = -ENOMEM; |
| 1057 | goto clean_dma_ret; |
| 1058 | } |
| 1059 | |
| 1060 | memset(&ale_params, 0, sizeof(ale_params)); |
| 1061 | ale_params.dev = &ndev->dev; |
| 1062 | ale_params.ale_regs = (void *)((u32)priv->regs) + |
| 1063 | ((u32)data->ale_reg_ofs); |
| 1064 | ale_params.ale_ageout = ale_ageout; |
| 1065 | ale_params.ale_entries = data->ale_entries; |
| 1066 | ale_params.ale_ports = data->slaves; |
| 1067 | |
| 1068 | priv->ale = cpsw_ale_create(&ale_params); |
| 1069 | if (!priv->ale) { |
| 1070 | dev_err(priv->dev, "error initializing ale engine\n"); |
| 1071 | ret = -ENODEV; |
| 1072 | goto clean_dma_ret; |
| 1073 | } |
| 1074 | |
| 1075 | ndev->irq = platform_get_irq(pdev, 0); |
| 1076 | if (ndev->irq < 0) { |
| 1077 | dev_err(priv->dev, "error getting irq resource\n"); |
| 1078 | ret = -ENOENT; |
| 1079 | goto clean_ale_ret; |
| 1080 | } |
| 1081 | |
| 1082 | while ((res = platform_get_resource(priv->pdev, IORESOURCE_IRQ, k))) { |
| 1083 | for (i = res->start; i <= res->end; i++) { |
| 1084 | if (request_irq(i, cpsw_interrupt, IRQF_DISABLED, |
| 1085 | dev_name(&pdev->dev), priv)) { |
| 1086 | dev_err(priv->dev, "error attaching irq\n"); |
| 1087 | goto clean_ale_ret; |
| 1088 | } |
| 1089 | priv->irqs_table[k] = i; |
| 1090 | priv->num_irqs = k; |
| 1091 | } |
| 1092 | k++; |
| 1093 | } |
| 1094 | |
| 1095 | ndev->flags |= IFF_ALLMULTI; /* see cpsw_ndo_change_rx_flags() */ |
| 1096 | |
| 1097 | ndev->netdev_ops = &cpsw_netdev_ops; |
| 1098 | SET_ETHTOOL_OPS(ndev, &cpsw_ethtool_ops); |
| 1099 | netif_napi_add(ndev, &priv->napi, cpsw_poll, CPSW_POLL_WEIGHT); |
| 1100 | |
| 1101 | /* register the network device */ |
| 1102 | SET_NETDEV_DEV(ndev, &pdev->dev); |
| 1103 | ret = register_netdev(ndev); |
| 1104 | if (ret) { |
| 1105 | dev_err(priv->dev, "error registering net device\n"); |
| 1106 | ret = -ENODEV; |
| 1107 | goto clean_irq_ret; |
| 1108 | } |
| 1109 | |
| 1110 | cpsw_notice(priv, probe, "initialized device (regs %x, irq %d)\n", |
| 1111 | priv->cpsw_res->start, ndev->irq); |
| 1112 | |
| 1113 | return 0; |
| 1114 | |
| 1115 | clean_irq_ret: |
| 1116 | free_irq(ndev->irq, priv); |
| 1117 | clean_ale_ret: |
| 1118 | cpsw_ale_destroy(priv->ale); |
| 1119 | clean_dma_ret: |
| 1120 | cpdma_chan_destroy(priv->txch); |
| 1121 | cpdma_chan_destroy(priv->rxch); |
| 1122 | cpdma_ctlr_destroy(priv->dma); |
| 1123 | clean_iomap_ret: |
| 1124 | iounmap(priv->regs); |
| 1125 | clean_cpsw_ss_iores_ret: |
| 1126 | release_mem_region(priv->cpsw_ss_res->start, |
| 1127 | resource_size(priv->cpsw_ss_res)); |
| 1128 | clean_cpsw_iores_ret: |
| 1129 | release_mem_region(priv->cpsw_res->start, |
| 1130 | resource_size(priv->cpsw_res)); |
| 1131 | clean_clk_ret: |
| 1132 | clk_put(priv->clk); |
Mugunthan V N | f150bd7 | 2012-07-17 08:09:50 +0000 | [diff] [blame] | 1133 | clean_slave_ret: |
| 1134 | pm_runtime_disable(&pdev->dev); |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 1135 | kfree(priv->slaves); |
| 1136 | clean_ndev_ret: |
| 1137 | free_netdev(ndev); |
| 1138 | return ret; |
| 1139 | } |
| 1140 | |
| 1141 | static int __devexit cpsw_remove(struct platform_device *pdev) |
| 1142 | { |
| 1143 | struct net_device *ndev = platform_get_drvdata(pdev); |
| 1144 | struct cpsw_priv *priv = netdev_priv(ndev); |
| 1145 | |
| 1146 | pr_info("removing device"); |
| 1147 | platform_set_drvdata(pdev, NULL); |
| 1148 | |
| 1149 | free_irq(ndev->irq, priv); |
| 1150 | cpsw_ale_destroy(priv->ale); |
| 1151 | cpdma_chan_destroy(priv->txch); |
| 1152 | cpdma_chan_destroy(priv->rxch); |
| 1153 | cpdma_ctlr_destroy(priv->dma); |
| 1154 | iounmap(priv->regs); |
| 1155 | release_mem_region(priv->cpsw_res->start, |
| 1156 | resource_size(priv->cpsw_res)); |
| 1157 | release_mem_region(priv->cpsw_ss_res->start, |
| 1158 | resource_size(priv->cpsw_ss_res)); |
Mugunthan V N | f150bd7 | 2012-07-17 08:09:50 +0000 | [diff] [blame] | 1159 | pm_runtime_disable(&pdev->dev); |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 1160 | clk_put(priv->clk); |
| 1161 | kfree(priv->slaves); |
| 1162 | free_netdev(ndev); |
| 1163 | |
| 1164 | return 0; |
| 1165 | } |
| 1166 | |
| 1167 | static int cpsw_suspend(struct device *dev) |
| 1168 | { |
| 1169 | struct platform_device *pdev = to_platform_device(dev); |
| 1170 | struct net_device *ndev = platform_get_drvdata(pdev); |
| 1171 | |
| 1172 | if (netif_running(ndev)) |
| 1173 | cpsw_ndo_stop(ndev); |
Mugunthan V N | f150bd7 | 2012-07-17 08:09:50 +0000 | [diff] [blame] | 1174 | pm_runtime_put_sync(&pdev->dev); |
| 1175 | |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 1176 | return 0; |
| 1177 | } |
| 1178 | |
| 1179 | static int cpsw_resume(struct device *dev) |
| 1180 | { |
| 1181 | struct platform_device *pdev = to_platform_device(dev); |
| 1182 | struct net_device *ndev = platform_get_drvdata(pdev); |
| 1183 | |
Mugunthan V N | f150bd7 | 2012-07-17 08:09:50 +0000 | [diff] [blame] | 1184 | pm_runtime_get_sync(&pdev->dev); |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 1185 | if (netif_running(ndev)) |
| 1186 | cpsw_ndo_open(ndev); |
| 1187 | return 0; |
| 1188 | } |
| 1189 | |
| 1190 | static const struct dev_pm_ops cpsw_pm_ops = { |
| 1191 | .suspend = cpsw_suspend, |
| 1192 | .resume = cpsw_resume, |
| 1193 | }; |
| 1194 | |
Mugunthan V N | 2eb32b0 | 2012-07-30 10:17:14 +0000 | [diff] [blame] | 1195 | static const struct of_device_id cpsw_of_mtable[] = { |
| 1196 | { .compatible = "ti,cpsw", }, |
| 1197 | { /* sentinel */ }, |
| 1198 | }; |
| 1199 | |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 1200 | static struct platform_driver cpsw_driver = { |
| 1201 | .driver = { |
| 1202 | .name = "cpsw", |
| 1203 | .owner = THIS_MODULE, |
| 1204 | .pm = &cpsw_pm_ops, |
Mugunthan V N | 2eb32b0 | 2012-07-30 10:17:14 +0000 | [diff] [blame] | 1205 | .of_match_table = of_match_ptr(cpsw_of_mtable), |
Mugunthan V N | df82859 | 2012-03-18 20:17:54 +0000 | [diff] [blame] | 1206 | }, |
| 1207 | .probe = cpsw_probe, |
| 1208 | .remove = __devexit_p(cpsw_remove), |
| 1209 | }; |
| 1210 | |
| 1211 | static int __init cpsw_init(void) |
| 1212 | { |
| 1213 | return platform_driver_register(&cpsw_driver); |
| 1214 | } |
| 1215 | late_initcall(cpsw_init); |
| 1216 | |
| 1217 | static void __exit cpsw_exit(void) |
| 1218 | { |
| 1219 | platform_driver_unregister(&cpsw_driver); |
| 1220 | } |
| 1221 | module_exit(cpsw_exit); |
| 1222 | |
| 1223 | MODULE_LICENSE("GPL"); |
| 1224 | MODULE_AUTHOR("Cyril Chemparathy <cyril@ti.com>"); |
| 1225 | MODULE_AUTHOR("Mugunthan V N <mugunthanvnm@ti.com>"); |
| 1226 | MODULE_DESCRIPTION("TI CPSW Ethernet driver"); |