blob: 73a208559fe2832640581fa724e947f6e6d6f338 [file] [log] [blame]
Thomas Gleixner2874c5f2019-05-27 08:55:01 +02001// SPDX-License-Identifier: GPL-2.0-or-later
Dave Jonesbf6fc9f2005-05-31 19:03:45 -07002/*
3 * sc520_freq.c: cpufreq driver for the AMD Elan sc520
4 *
5 * Copyright (C) 2005 Sean Young <sean@mess.org>
6 *
Dave Jonesbf6fc9f2005-05-31 19:03:45 -07007 * Based on elanfreq.c
8 *
9 * 2005-03-30: - initial revision
10 */
11
Joe Perches1c5864e2016-04-05 13:28:25 -070012#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070014#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/init.h>
17
18#include <linux/delay.h>
19#include <linux/cpufreq.h>
Dave Jones6072ace2009-01-18 01:27:35 -050020#include <linux/timex.h>
21#include <linux/io.h>
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070022
Andi Kleenfa8031a2012-01-26 00:09:12 +010023#include <asm/cpu_device_id.h>
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070024#include <asm/msr.h>
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070025
26#define MMCR_BASE 0xfffef000 /* The default base address */
27#define OFFS_CPUCTL 0x2 /* CPU Control Register */
28
29static __u8 __iomem *cpuctl;
30
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070031static struct cpufreq_frequency_table sc520_freq_table[] = {
Viresh Kumar7f4b0462014-03-28 19:11:47 +053032 {0, 0x01, 100000},
33 {0, 0x02, 133000},
34 {0, 0, CPUFREQ_TABLE_END},
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070035};
36
37static unsigned int sc520_freq_get_cpu_frequency(unsigned int cpu)
38{
39 u8 clockspeed_reg = *cpuctl;
40
41 switch (clockspeed_reg & 0x03) {
42 default:
Joe Perches1c5864e2016-04-05 13:28:25 -070043 pr_err("error: cpuctl register has unexpected value %02x\n",
Joe Perchesb49c22a2016-04-05 13:28:24 -070044 clockspeed_reg);
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070045 case 0x01:
46 return 100000;
47 case 0x02:
48 return 133000;
49 }
50}
51
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +053052static int sc520_freq_target(struct cpufreq_policy *policy, unsigned int state)
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070053{
54
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070055 u8 clockspeed_reg;
56
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070057 local_irq_disable();
58
59 clockspeed_reg = *cpuctl & ~0x03;
Viresh Kumar50701582013-03-30 16:25:15 +053060 *cpuctl = clockspeed_reg | sc520_freq_table[state].driver_data;
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070061
62 local_irq_enable();
63
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070064 return 0;
65}
66
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070067/*
68 * Module init and exit code
69 */
70
71static int sc520_freq_cpu_init(struct cpufreq_policy *policy)
72{
Mike Travis92cb7612007-10-19 20:35:04 +020073 struct cpuinfo_x86 *c = &cpu_data(0);
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070074
75 /* capability check */
76 if (c->x86_vendor != X86_VENDOR_AMD ||
77 c->x86 != 4 || c->x86_model != 9)
78 return -ENODEV;
79
80 /* cpuinfo and default policy values */
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070081 policy->cpuinfo.transition_latency = 1000000; /* 1ms */
Viresh Kumarf35750c2018-02-26 10:39:03 +053082 policy->freq_table = sc520_freq_table;
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070083
Viresh Kumarf35750c2018-02-26 10:39:03 +053084 return 0;
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070085}
86
87
Linus Torvalds221dee22007-02-26 14:55:48 -080088static struct cpufreq_driver sc520_freq_driver = {
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070089 .get = sc520_freq_get_cpu_frequency,
Viresh Kumara823c4a2013-10-03 20:28:24 +053090 .verify = cpufreq_generic_frequency_table_verify,
Viresh Kumar9c0ebcf2013-10-25 19:45:48 +053091 .target_index = sc520_freq_target,
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070092 .init = sc520_freq_cpu_init,
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070093 .name = "sc520_freq",
Viresh Kumara823c4a2013-10-03 20:28:24 +053094 .attr = cpufreq_generic_attr,
Dave Jonesbf6fc9f2005-05-31 19:03:45 -070095};
96
Andi Kleenfa8031a2012-01-26 00:09:12 +010097static const struct x86_cpu_id sc520_ids[] = {
Thomas Gleixnerb11d77f2020-03-24 14:51:51 +010098 X86_MATCH_VENDOR_FAM_MODEL(AMD, 4, 9, NULL),
Andi Kleenfa8031a2012-01-26 00:09:12 +010099 {}
100};
101MODULE_DEVICE_TABLE(x86cpu, sc520_ids);
Dave Jonesbf6fc9f2005-05-31 19:03:45 -0700102
103static int __init sc520_freq_init(void)
104{
Amol Lad3e743412006-10-17 10:02:55 +0530105 int err;
Dave Jonesbf6fc9f2005-05-31 19:03:45 -0700106
Andi Kleenfa8031a2012-01-26 00:09:12 +0100107 if (!x86_match_cpu(sc520_ids))
Dave Jonesbf6fc9f2005-05-31 19:03:45 -0700108 return -ENODEV;
Andi Kleenfa8031a2012-01-26 00:09:12 +0100109
Dave Jonesbf6fc9f2005-05-31 19:03:45 -0700110 cpuctl = ioremap((unsigned long)(MMCR_BASE + OFFS_CPUCTL), 1);
Dave Jones6072ace2009-01-18 01:27:35 -0500111 if (!cpuctl) {
Joe Perchesb49c22a2016-04-05 13:28:24 -0700112 pr_err("sc520_freq: error: failed to remap memory\n");
Dave Jonesbf6fc9f2005-05-31 19:03:45 -0700113 return -ENOMEM;
114 }
115
Amol Lad3e743412006-10-17 10:02:55 +0530116 err = cpufreq_register_driver(&sc520_freq_driver);
117 if (err)
118 iounmap(cpuctl);
119
120 return err;
Dave Jonesbf6fc9f2005-05-31 19:03:45 -0700121}
122
123
124static void __exit sc520_freq_exit(void)
125{
126 cpufreq_unregister_driver(&sc520_freq_driver);
127 iounmap(cpuctl);
128}
129
130
131MODULE_LICENSE("GPL");
132MODULE_AUTHOR("Sean Young <sean@mess.org>");
133MODULE_DESCRIPTION("cpufreq driver for AMD's Elan sc520 CPU");
134
135module_init(sc520_freq_init);
136module_exit(sc520_freq_exit);
137