Wu Zhangjin | 28c945c | 2010-06-01 18:29:04 +0800 | [diff] [blame] | 1 | # |
| 2 | # Loongson Processors' Support |
| 3 | # |
| 4 | |
Wu Zhangjin | 28c945c | 2010-06-01 18:29:04 +0800 | [diff] [blame] | 5 | |
Jiaxun Yang | 268a2d6 | 2019-10-20 22:43:13 +0800 | [diff] [blame] | 6 | cflags-$(CONFIG_CPU_LOONGSON64) += -Wa,--trap |
Huacai Chen | e02e07e | 2019-01-15 16:04:54 +0800 | [diff] [blame] | 7 | |
| 8 | # |
| 9 | # Some versions of binutils, not currently mainline as of 2019/02/04, support |
| 10 | # an -mfix-loongson3-llsc flag which emits a sync prior to each ll instruction |
Paul Burton | 7f56b123 | 2019-10-01 21:53:40 +0000 | [diff] [blame] | 11 | # to work around a CPU bug (see __SYNC_loongson3_war in asm/sync.h for a |
Huacai Chen | e02e07e | 2019-01-15 16:04:54 +0800 | [diff] [blame] | 12 | # description). |
| 13 | # |
| 14 | # We disable this in order to prevent the assembler meddling with the |
| 15 | # instruction that labels refer to, ie. if we label an ll instruction: |
| 16 | # |
| 17 | # 1: ll v0, 0(a0) |
| 18 | # |
| 19 | # ...then with the assembler fix applied the label may actually point at a sync |
| 20 | # instruction inserted by the assembler, and if we were using the label in an |
| 21 | # exception table the table would no longer contain the address of the ll |
| 22 | # instruction. |
| 23 | # |
| 24 | # Avoid this by explicitly disabling that assembler behaviour. If upstream |
| 25 | # binutils does not merge support for the flag then we can revisit & remove |
| 26 | # this later - for now it ensures vendor toolchains don't cause problems. |
| 27 | # |
Jiaxun Yang | 268a2d6 | 2019-10-20 22:43:13 +0800 | [diff] [blame] | 28 | cflags-$(CONFIG_CPU_LOONGSON64) += $(call as-option,-Wa$(comma)-mno-fix-loongson3-llsc,) |
Huacai Chen | e02e07e | 2019-01-15 16:04:54 +0800 | [diff] [blame] | 29 | |
Huacai Chen | 5188129 | 2016-01-21 21:09:48 +0800 | [diff] [blame] | 30 | # |
| 31 | # binutils from v2.25 on and gcc starting from v4.9.0 treat -march=loongson3a |
| 32 | # as MIPS64 R2; older versions as just R1. This leaves the possibility open |
| 33 | # that GCC might generate R2 code for -march=loongson3a which then is rejected |
| 34 | # by GAS. The cc-option can't probe for this behaviour so -march=loongson3a |
| 35 | # can't easily be used safely within the kbuild framework. |
| 36 | # |
| 37 | ifeq ($(call cc-ifversion, -ge, 0409, y), y) |
Huacai Chen | 820880c | 2016-03-17 20:41:06 +0800 | [diff] [blame] | 38 | ifeq ($(call ld-ifversion, -ge, 225000000, y), y) |
Jiaxun Yang | 268a2d6 | 2019-10-20 22:43:13 +0800 | [diff] [blame] | 39 | cflags-$(CONFIG_CPU_LOONGSON64) += \ |
Huacai Chen | 5188129 | 2016-01-21 21:09:48 +0800 | [diff] [blame] | 40 | $(call cc-option,-march=loongson3a -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) |
| 41 | else |
Jiaxun Yang | 268a2d6 | 2019-10-20 22:43:13 +0800 | [diff] [blame] | 42 | cflags-$(CONFIG_CPU_LOONGSON64) += \ |
Huacai Chen | 5188129 | 2016-01-21 21:09:48 +0800 | [diff] [blame] | 43 | $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) |
| 44 | endif |
| 45 | else |
Jiaxun Yang | 268a2d6 | 2019-10-20 22:43:13 +0800 | [diff] [blame] | 46 | cflags-$(CONFIG_CPU_LOONGSON64) += \ |
Huacai Chen | 5188129 | 2016-01-21 21:09:48 +0800 | [diff] [blame] | 47 | $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) |
| 48 | endif |
| 49 | |
Paul Burton | 2f2b4fd | 2019-10-10 18:54:03 +0000 | [diff] [blame] | 50 | # Some -march= flags enable MMI instructions, and GCC complains about that |
| 51 | # support being enabled alongside -msoft-float. Thus explicitly disable MMI. |
| 52 | cflags-y += $(call cc-option,-mno-loongson-mmi) |
| 53 | |
Wu Zhangjin | 28c945c | 2010-06-01 18:29:04 +0800 | [diff] [blame] | 54 | # |
| 55 | # Loongson Machines' Support |
| 56 | # |
| 57 | |
Huacai Chen | 30ad29b | 2015-04-21 10:00:35 +0800 | [diff] [blame] | 58 | platform-$(CONFIG_MACH_LOONGSON64) += loongson64/ |
| 59 | cflags-$(CONFIG_MACH_LOONGSON64) += -I$(srctree)/arch/mips/include/asm/mach-loongson64 -mno-branch-likely |
Jiaxun Yang | 1bdb7b7 | 2019-10-20 23:01:35 +0800 | [diff] [blame] | 60 | load-$(CONFIG_CPU_LOONGSON64) += 0xffffffff80200000 |