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Marcus Folkesson2e62c492018-03-16 16:14:11 +01001// SPDX-License-Identifier: GPL-2.0+
Lubomir Rintel938d0a82013-06-18 19:44:48 +02002/*
3 * Watchdog driver for Broadcom BCM2835
4 *
5 * "bcm2708_wdog" driver written by Luke Diamand that was obtained from
6 * branch "rpi-3.6.y" of git://github.com/raspberrypi/linux.git was used
7 * as a hardware reference for the Broadcom BCM2835 watchdog timer.
8 *
9 * Copyright (C) 2013 Lubomir Rintel <lkundrak@v3.sk>
10 *
Lubomir Rintel938d0a82013-06-18 19:44:48 +020011 */
12
Eric Anholt33a9f5b2015-04-24 12:08:54 -070013#include <linux/delay.h>
Lubomir Rintel938d0a82013-06-18 19:44:48 +020014#include <linux/types.h>
Eric Anholt5e6acc32018-12-12 15:51:47 -080015#include <linux/mfd/bcm2835-pm.h>
Lubomir Rintel938d0a82013-06-18 19:44:48 +020016#include <linux/module.h>
17#include <linux/io.h>
18#include <linux/watchdog.h>
19#include <linux/platform_device.h>
20#include <linux/of_address.h>
Eric Anholt33a9f5b2015-04-24 12:08:54 -070021#include <linux/of_platform.h>
Lubomir Rintel938d0a82013-06-18 19:44:48 +020022
23#define PM_RSTC 0x1c
Eric Anholt33a9f5b2015-04-24 12:08:54 -070024#define PM_RSTS 0x20
Lubomir Rintel938d0a82013-06-18 19:44:48 +020025#define PM_WDOG 0x24
26
27#define PM_PASSWORD 0x5a000000
28
29#define PM_WDOG_TIME_SET 0x000fffff
30#define PM_RSTC_WRCFG_CLR 0xffffffcf
Eric Anholt33a9f5b2015-04-24 12:08:54 -070031#define PM_RSTS_HADWRH_SET 0x00000040
Lubomir Rintel938d0a82013-06-18 19:44:48 +020032#define PM_RSTC_WRCFG_SET 0x00000030
33#define PM_RSTC_WRCFG_FULL_RESET 0x00000020
34#define PM_RSTC_RESET 0x00000102
35
Noralf Trønnes898e6862015-06-17 16:04:04 +020036/*
Masahiro Yamada8ab102d2017-02-27 14:28:55 -080037 * The Raspberry Pi firmware uses the RSTS register to know which partition
38 * to boot from. The partition value is spread into bits 0, 2, 4, 6, 8, 10.
39 * Partition 63 is a special partition used by the firmware to indicate halt.
Noralf Trønnes898e6862015-06-17 16:04:04 +020040 */
41#define PM_RSTS_RASPBERRYPI_HALT 0x555
42
Lubomir Rintel938d0a82013-06-18 19:44:48 +020043#define SECS_TO_WDOG_TICKS(x) ((x) << 16)
44#define WDOG_TICKS_TO_SECS(x) ((x) >> 16)
45
46struct bcm2835_wdt {
47 void __iomem *base;
48 spinlock_t lock;
49};
50
Eric Anholt5e6acc32018-12-12 15:51:47 -080051static struct bcm2835_wdt *bcm2835_power_off_wdt;
52
Lubomir Rintel938d0a82013-06-18 19:44:48 +020053static unsigned int heartbeat;
54static bool nowayout = WATCHDOG_NOWAYOUT;
55
Rasmus Villemoes054ae192016-12-12 10:48:43 +010056static bool bcm2835_wdt_is_running(struct bcm2835_wdt *wdt)
57{
58 uint32_t cur;
59
60 cur = readl(wdt->base + PM_RSTC);
61
62 return !!(cur & PM_RSTC_WRCFG_FULL_RESET);
63}
64
Lubomir Rintel938d0a82013-06-18 19:44:48 +020065static int bcm2835_wdt_start(struct watchdog_device *wdog)
66{
67 struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
68 uint32_t cur;
69 unsigned long flags;
70
71 spin_lock_irqsave(&wdt->lock, flags);
72
73 writel_relaxed(PM_PASSWORD | (SECS_TO_WDOG_TICKS(wdog->timeout) &
74 PM_WDOG_TIME_SET), wdt->base + PM_WDOG);
75 cur = readl_relaxed(wdt->base + PM_RSTC);
76 writel_relaxed(PM_PASSWORD | (cur & PM_RSTC_WRCFG_CLR) |
77 PM_RSTC_WRCFG_FULL_RESET, wdt->base + PM_RSTC);
78
79 spin_unlock_irqrestore(&wdt->lock, flags);
80
81 return 0;
82}
83
84static int bcm2835_wdt_stop(struct watchdog_device *wdog)
85{
86 struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
87
88 writel_relaxed(PM_PASSWORD | PM_RSTC_RESET, wdt->base + PM_RSTC);
Lubomir Rintel938d0a82013-06-18 19:44:48 +020089 return 0;
90}
91
Lubomir Rintel938d0a82013-06-18 19:44:48 +020092static unsigned int bcm2835_wdt_get_timeleft(struct watchdog_device *wdog)
93{
94 struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
95
96 uint32_t ret = readl_relaxed(wdt->base + PM_WDOG);
97 return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET);
98}
99
Guenter Roeck71e9b2f2017-01-04 12:26:45 -0800100static void __bcm2835_restart(struct bcm2835_wdt *wdt)
101{
102 u32 val;
103
104 /* use a timeout of 10 ticks (~150us) */
105 writel_relaxed(10 | PM_PASSWORD, wdt->base + PM_WDOG);
106 val = readl_relaxed(wdt->base + PM_RSTC);
107 val &= PM_RSTC_WRCFG_CLR;
108 val |= PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET;
109 writel_relaxed(val, wdt->base + PM_RSTC);
110
111 /* No sleeping, possibly atomic. */
112 mdelay(1);
113}
114
115static int bcm2835_restart(struct watchdog_device *wdog,
116 unsigned long action, void *data)
117{
118 struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
119
120 __bcm2835_restart(wdt);
121
122 return 0;
123}
124
Rasmus Villemoesaea4b472016-07-15 10:15:21 +0200125static const struct watchdog_ops bcm2835_wdt_ops = {
Lubomir Rintel938d0a82013-06-18 19:44:48 +0200126 .owner = THIS_MODULE,
127 .start = bcm2835_wdt_start,
128 .stop = bcm2835_wdt_stop,
Lubomir Rintel938d0a82013-06-18 19:44:48 +0200129 .get_timeleft = bcm2835_wdt_get_timeleft,
Guenter Roeck71e9b2f2017-01-04 12:26:45 -0800130 .restart = bcm2835_restart,
Lubomir Rintel938d0a82013-06-18 19:44:48 +0200131};
132
Rasmus Villemoesaea4b472016-07-15 10:15:21 +0200133static const struct watchdog_info bcm2835_wdt_info = {
Lubomir Rintel938d0a82013-06-18 19:44:48 +0200134 .options = WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE |
135 WDIOF_KEEPALIVEPING,
136 .identity = "Broadcom BCM2835 Watchdog timer",
137};
138
139static struct watchdog_device bcm2835_wdt_wdd = {
140 .info = &bcm2835_wdt_info,
141 .ops = &bcm2835_wdt_ops,
142 .min_timeout = 1,
143 .max_timeout = WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
144 .timeout = WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
145};
146
Eric Anholt33a9f5b2015-04-24 12:08:54 -0700147/*
148 * We can't really power off, but if we do the normal reset scheme, and
149 * indicate to bootcode.bin not to reboot, then most of the chip will be
150 * powered off.
151 */
152static void bcm2835_power_off(void)
153{
Eric Anholt5e6acc32018-12-12 15:51:47 -0800154 struct bcm2835_wdt *wdt = bcm2835_power_off_wdt;
Eric Anholt33a9f5b2015-04-24 12:08:54 -0700155 u32 val;
156
157 /*
158 * We set the watchdog hard reset bit here to distinguish this reset
159 * from the normal (full) reset. bootcode.bin will not reboot after a
160 * hard reset.
161 */
162 val = readl_relaxed(wdt->base + PM_RSTS);
Noralf Trønnes898e6862015-06-17 16:04:04 +0200163 val |= PM_PASSWORD | PM_RSTS_RASPBERRYPI_HALT;
Eric Anholt33a9f5b2015-04-24 12:08:54 -0700164 writel_relaxed(val, wdt->base + PM_RSTS);
165
166 /* Continue with normal reset mechanism */
Guenter Roeck71e9b2f2017-01-04 12:26:45 -0800167 __bcm2835_restart(wdt);
Eric Anholt33a9f5b2015-04-24 12:08:54 -0700168}
169
Lubomir Rintel938d0a82013-06-18 19:44:48 +0200170static int bcm2835_wdt_probe(struct platform_device *pdev)
171{
Eric Anholt5e6acc32018-12-12 15:51:47 -0800172 struct bcm2835_pm *pm = dev_get_drvdata(pdev->dev.parent);
Lubomir Rintel938d0a82013-06-18 19:44:48 +0200173 struct device *dev = &pdev->dev;
Lubomir Rintel938d0a82013-06-18 19:44:48 +0200174 struct bcm2835_wdt *wdt;
175 int err;
176
177 wdt = devm_kzalloc(dev, sizeof(struct bcm2835_wdt), GFP_KERNEL);
Jingoo Han8deea832014-02-11 15:46:43 +0900178 if (!wdt)
Lubomir Rintel938d0a82013-06-18 19:44:48 +0200179 return -ENOMEM;
Lubomir Rintel938d0a82013-06-18 19:44:48 +0200180
181 spin_lock_init(&wdt->lock);
182
Eric Anholt5e6acc32018-12-12 15:51:47 -0800183 wdt->base = pm->base;
Lubomir Rintel938d0a82013-06-18 19:44:48 +0200184
185 watchdog_set_drvdata(&bcm2835_wdt_wdd, wdt);
186 watchdog_init_timeout(&bcm2835_wdt_wdd, heartbeat, dev);
187 watchdog_set_nowayout(&bcm2835_wdt_wdd, nowayout);
Guenter Roeck5f5aa6f2017-01-10 15:21:45 -0800188 bcm2835_wdt_wdd.parent = dev;
Rasmus Villemoes054ae192016-12-12 10:48:43 +0100189 if (bcm2835_wdt_is_running(wdt)) {
190 /*
191 * The currently active timeout value (set by the
192 * bootloader) may be different from the module
193 * heartbeat parameter or the value in device
194 * tree. But we just need to set WDOG_HW_RUNNING,
195 * because then the framework will "immediately" ping
196 * the device, updating the timeout.
197 */
198 set_bit(WDOG_HW_RUNNING, &bcm2835_wdt_wdd.status);
199 }
Guenter Roeck71e9b2f2017-01-04 12:26:45 -0800200
201 watchdog_set_restart_priority(&bcm2835_wdt_wdd, 128);
202
Guenter Roeck5f5aa6f2017-01-10 15:21:45 -0800203 watchdog_stop_on_reboot(&bcm2835_wdt_wdd);
204 err = devm_watchdog_register_device(dev, &bcm2835_wdt_wdd);
Wolfram Sangd5f3e242019-05-18 23:27:19 +0200205 if (err)
Lubomir Rintel938d0a82013-06-18 19:44:48 +0200206 return err;
Lubomir Rintel938d0a82013-06-18 19:44:48 +0200207
Eric Anholt5e6acc32018-12-12 15:51:47 -0800208 if (pm_power_off == NULL) {
Eric Anholt33a9f5b2015-04-24 12:08:54 -0700209 pm_power_off = bcm2835_power_off;
Eric Anholt5e6acc32018-12-12 15:51:47 -0800210 bcm2835_power_off_wdt = wdt;
211 }
Eric Anholt33a9f5b2015-04-24 12:08:54 -0700212
Lubomir Rintel938d0a82013-06-18 19:44:48 +0200213 dev_info(dev, "Broadcom BCM2835 watchdog timer");
214 return 0;
215}
216
217static int bcm2835_wdt_remove(struct platform_device *pdev)
218{
Eric Anholt33a9f5b2015-04-24 12:08:54 -0700219 if (pm_power_off == bcm2835_power_off)
220 pm_power_off = NULL;
Lubomir Rintel938d0a82013-06-18 19:44:48 +0200221
222 return 0;
223}
224
Lubomir Rintel938d0a82013-06-18 19:44:48 +0200225static struct platform_driver bcm2835_wdt_driver = {
226 .probe = bcm2835_wdt_probe,
227 .remove = bcm2835_wdt_remove,
Lubomir Rintel938d0a82013-06-18 19:44:48 +0200228 .driver = {
229 .name = "bcm2835-wdt",
Lubomir Rintel938d0a82013-06-18 19:44:48 +0200230 },
231};
232module_platform_driver(bcm2835_wdt_driver);
233
234module_param(heartbeat, uint, 0);
235MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");
236
237module_param(nowayout, bool, 0);
238MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
239 __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
240
Stefan Wahren215e06f2019-05-15 19:14:18 +0200241MODULE_ALIAS("platform:bcm2835-wdt");
Lubomir Rintel938d0a82013-06-18 19:44:48 +0200242MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
243MODULE_DESCRIPTION("Driver for Broadcom BCM2835 watchdog timer");
244MODULE_LICENSE("GPL");