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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Thomas Gleixner61ecfa82005-11-07 11:15:31 +00002 * $Id: pmc551.h,v 1.6 2005/11/07 11:14:55 gleixner Exp $
Linus Torvalds1da177e2005-04-16 15:20:36 -07003 *
4 * PMC551 PCI Mezzanine Ram Device
5 *
6 * Author:
7 * Mark Ferrell
8 * Copyright 1999,2000 Nortel Networks
9 *
Thomas Gleixner61ecfa82005-11-07 11:15:31 +000010 * License:
Linus Torvalds1da177e2005-04-16 15:20:36 -070011 * As part of this driver was derrived from the slram.c driver it falls
12 * under the same license, which is GNU General Public License v2
13 */
14
15#ifndef __MTD_PMC551_H__
16#define __MTD_PMC551_H__
17
18#include <linux/mtd/mtd.h>
19
Thomas Gleixner61ecfa82005-11-07 11:15:31 +000020#define PMC551_VERSION "$Id: pmc551.h,v 1.6 2005/11/07 11:14:55 gleixner Exp $\n"\
Linus Torvalds1da177e2005-04-16 15:20:36 -070021 "Ramix PMC551 PCI Mezzanine Ram Driver. (C) 1999,2000 Nortel Networks.\n"
22
23/*
24 * Our personal and private information
25 */
26struct mypriv {
27 struct pci_dev *dev;
28 u_char *start;
29 u32 base_map0;
30 u32 curr_map0;
31 u32 asize;
32 struct mtd_info *nextpmc551;
Thomas Gleixner61ecfa82005-11-07 11:15:31 +000033};
Linus Torvalds1da177e2005-04-16 15:20:36 -070034
35/*
36 * Function Prototypes
37 */
38static int pmc551_erase(struct mtd_info *, struct erase_info *);
Jared Hulberta98889f2008-04-29 23:26:49 -070039static void pmc551_unpoint(struct mtd_info *, loff_t, size_t);
40static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
41 size_t *retlen, void **virt, resource_size_t *phys);
Linus Torvalds1da177e2005-04-16 15:20:36 -070042static int pmc551_read(struct mtd_info *, loff_t, size_t, size_t *, u_char *);
Thomas Gleixner61ecfa82005-11-07 11:15:31 +000043static int pmc551_write(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
Linus Torvalds1da177e2005-04-16 15:20:36 -070044
45
46/*
47 * Define the PCI ID's if the kernel doesn't define them for us
48 */
49#ifndef PCI_VENDOR_ID_V3_SEMI
50#define PCI_VENDOR_ID_V3_SEMI 0x11b0
51#endif
52
53#ifndef PCI_DEVICE_ID_V3_SEMI_V370PDC
Thomas Gleixner61ecfa82005-11-07 11:15:31 +000054#define PCI_DEVICE_ID_V3_SEMI_V370PDC 0x0200
Linus Torvalds1da177e2005-04-16 15:20:36 -070055#endif
56
57
58#define PMC551_PCI_MEM_MAP0 0x50
59#define PMC551_PCI_MEM_MAP1 0x54
60#define PMC551_PCI_MEM_MAP_MAP_ADDR_MASK 0x3ff00000
61#define PMC551_PCI_MEM_MAP_APERTURE_MASK 0x000000f0
62#define PMC551_PCI_MEM_MAP_REG_EN 0x00000002
63#define PMC551_PCI_MEM_MAP_ENABLE 0x00000001
64
65#define PMC551_SDRAM_MA 0x60
66#define PMC551_SDRAM_CMD 0x62
67#define PMC551_DRAM_CFG 0x64
68#define PMC551_SYS_CTRL_REG 0x78
69
70#define PMC551_DRAM_BLK0 0x68
71#define PMC551_DRAM_BLK1 0x6c
72#define PMC551_DRAM_BLK2 0x70
73#define PMC551_DRAM_BLK3 0x74
74#define PMC551_DRAM_BLK_GET_SIZE(x) (524288<<((x>>4)&0x0f))
75#define PMC551_DRAM_BLK_SET_COL_MUX(x,v) (((x) & ~0x00007000) | (((v) & 0x7) << 12))
76#define PMC551_DRAM_BLK_SET_ROW_MUX(x,v) (((x) & ~0x00000f00) | (((v) & 0xf) << 8))
77
78
79#endif /* __MTD_PMC551_H__ */
80