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Takashi Iwaie732d1b2016-11-10 22:17:40 +01001==================================
2ASoC Digital Audio Interface (DAI)
3==================================
4
Liam Girdwoodeb1a6af2006-10-06 18:34:51 +02005ASoC currently supports the three main Digital Audio Interfaces (DAI) found on
Mark Brown7c4dbbd2008-01-23 08:41:46 +01006SoC controllers and portable audio CODECs today, namely AC97, I2S and PCM.
Liam Girdwoodeb1a6af2006-10-06 18:34:51 +02007
8
9AC97
10====
11
Takashi Iwaie732d1b2016-11-10 22:17:40 +010012AC97 is a five wire interface commonly found on many PC sound cards. It is
Liam Girdwoodeb1a6af2006-10-06 18:34:51 +020013now also popular in many portable devices. This DAI has a reset line and time
14multiplexes its data on its SDATA_OUT (playback) and SDATA_IN (capture) lines.
15The bit clock (BCLK) is always driven by the CODEC (usually 12.288MHz) and the
16frame (FRAME) (usually 48kHz) is always driven by the controller. Each AC97
17frame is 21uS long and is divided into 13 time slots.
18
Takashi Iwaie732d1b2016-11-10 22:17:40 +010019The AC97 specification can be found at :
Justin P. Mattock0ea6e612010-07-23 20:51:24 -070020http://www.intel.com/p/en_US/business/design
Liam Girdwoodeb1a6af2006-10-06 18:34:51 +020021
22
23I2S
24===
25
Takashi Iwaie732d1b2016-11-10 22:17:40 +010026I2S is a common 4 wire DAI used in HiFi, STB and portable devices. The Tx and
Matt LaPlante01dd2fb2007-10-20 01:34:40 +020027Rx lines are used for audio transmission, whilst the bit clock (BCLK) and
Liam Girdwoodeb1a6af2006-10-06 18:34:51 +020028left/right clock (LRC) synchronise the link. I2S is flexible in that either the
29controller or CODEC can drive (master) the BCLK and LRC clock lines. Bit clock
30usually varies depending on the sample rate and the master system clock
31(SYSCLK). LRCLK is the same as the sample rate. A few devices support separate
Mark Brown7c4dbbd2008-01-23 08:41:46 +010032ADC and DAC LRCLKs, this allows for simultaneous capture and playback at
Liam Girdwoodeb1a6af2006-10-06 18:34:51 +020033different sample rates.
34
35I2S has several different operating modes:-
36
Takashi Iwaie732d1b2016-11-10 22:17:40 +010037I2S
38 MSB is transmitted on the falling edge of the first BCLK after LRC
39 transition.
Liam Girdwoodeb1a6af2006-10-06 18:34:51 +020040
Takashi Iwaie732d1b2016-11-10 22:17:40 +010041Left Justified
42 MSB is transmitted on transition of LRC.
Liam Girdwoodeb1a6af2006-10-06 18:34:51 +020043
Takashi Iwaie732d1b2016-11-10 22:17:40 +010044Right Justified
45 MSB is transmitted sample size BCLKs before LRC transition.
Liam Girdwoodeb1a6af2006-10-06 18:34:51 +020046
47PCM
48===
49
Matt LaPlante01dd2fb2007-10-20 01:34:40 +020050PCM is another 4 wire interface, very similar to I2S, which can support a more
Liam Girdwoodeb1a6af2006-10-06 18:34:51 +020051flexible protocol. It has bit clock (BCLK) and sync (SYNC) lines that are used
52to synchronise the link whilst the Tx and Rx lines are used to transmit and
53receive the audio data. Bit clock usually varies depending on sample rate
54whilst sync runs at the sample rate. PCM also supports Time Division
Matt LaPlante01dd2fb2007-10-20 01:34:40 +020055Multiplexing (TDM) in that several devices can use the bus simultaneously (this
Liam Girdwoodeb1a6af2006-10-06 18:34:51 +020056is sometimes referred to as network mode).
57
58Common PCM operating modes:-
59
Takashi Iwaie732d1b2016-11-10 22:17:40 +010060Mode A
61 MSB is transmitted on falling edge of first BCLK after FRAME/SYNC.
Liam Girdwoodeb1a6af2006-10-06 18:34:51 +020062
Takashi Iwaie732d1b2016-11-10 22:17:40 +010063Mode B
64 MSB is transmitted on rising edge of FRAME/SYNC.