Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 1 | #include <linux/types.h> |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 2 | #include <linux/init.h> |
| 3 | #include <linux/kernel_stat.h> |
| 4 | #include <linux/sched.h> |
| 5 | #include <linux/spinlock.h> |
Nicolas Kaiser | dd6bfd6 | 2006-11-07 09:56:24 +0100 | [diff] [blame] | 6 | #include <linux/interrupt.h> |
| 7 | #include <linux/mc146818rtc.h> |
Ralf Baechle | f6e2373 | 2007-07-10 17:32:56 +0100 | [diff] [blame] | 8 | #include <linux/smp.h> |
Nicolas Kaiser | dd6bfd6 | 2006-11-07 09:56:24 +0100 | [diff] [blame] | 9 | #include <linux/timex.h> |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 10 | |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 11 | #include <asm/hardirq.h> |
| 12 | #include <asm/div64.h> |
| 13 | #include <asm/cpu.h> |
David Howells | b81947c | 2012-03-28 18:30:02 +0100 | [diff] [blame] | 14 | #include <asm/setup.h> |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 15 | #include <asm/time.h> |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 16 | #include <asm/irq.h> |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 17 | #include <asm/mc146818-time.h> |
| 18 | #include <asm/msc01_ic.h> |
| 19 | |
| 20 | #include <asm/mips-boards/generic.h> |
| 21 | #include <asm/mips-boards/prom.h> |
| 22 | #include <asm/mips-boards/simint.h> |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 23 | |
| 24 | |
| 25 | unsigned long cpu_khz; |
| 26 | |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 27 | /* |
Ralf Baechle | 224dc50 | 2006-10-21 02:05:20 +0100 | [diff] [blame] | 28 | * Estimate CPU frequency. Sets mips_hpt_frequency as a side-effect |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 29 | */ |
| 30 | static unsigned int __init estimate_cpu_frequency(void) |
| 31 | { |
| 32 | unsigned int prid = read_c0_prid() & 0xffff00; |
| 33 | unsigned int count; |
| 34 | |
| 35 | #if 1 |
| 36 | /* |
| 37 | * hardwire the board frequency to 12MHz. |
| 38 | */ |
| 39 | |
| 40 | if ((prid == (PRID_COMP_MIPS | PRID_IMP_20KC)) || |
| 41 | (prid == (PRID_COMP_MIPS | PRID_IMP_25KF))) |
| 42 | count = 12000000; |
| 43 | else |
| 44 | count = 6000000; |
| 45 | #else |
| 46 | unsigned int flags; |
| 47 | |
| 48 | local_irq_save(flags); |
| 49 | |
| 50 | /* Start counter exactly on falling edge of update flag */ |
| 51 | while (CMOS_READ(RTC_REG_A) & RTC_UIP); |
| 52 | while (!(CMOS_READ(RTC_REG_A) & RTC_UIP)); |
| 53 | |
| 54 | /* Start r4k counter. */ |
| 55 | write_c0_count(0); |
| 56 | |
| 57 | /* Read counter exactly on falling edge of update flag */ |
| 58 | while (CMOS_READ(RTC_REG_A) & RTC_UIP); |
| 59 | while (!(CMOS_READ(RTC_REG_A) & RTC_UIP)); |
| 60 | |
| 61 | count = read_c0_count(); |
| 62 | |
| 63 | /* restore interrupts */ |
| 64 | local_irq_restore(flags); |
| 65 | #endif |
| 66 | |
| 67 | mips_hpt_frequency = count; |
| 68 | |
| 69 | if ((prid != (PRID_COMP_MIPS | PRID_IMP_20KC)) && |
| 70 | (prid != (PRID_COMP_MIPS | PRID_IMP_25KF))) |
| 71 | count *= 2; |
| 72 | |
| 73 | count += 5000; /* round */ |
| 74 | count -= count%10000; |
| 75 | |
| 76 | return count; |
| 77 | } |
| 78 | |
Ralf Baechle | 38760d4 | 2007-10-29 14:23:43 +0000 | [diff] [blame] | 79 | static int mips_cpu_timer_irq; |
| 80 | |
| 81 | static void mips_timer_dispatch(void) |
| 82 | { |
| 83 | do_IRQ(mips_cpu_timer_irq); |
| 84 | } |
| 85 | |
| 86 | |
Ralf Baechle | 234fcd1 | 2008-03-08 09:56:28 +0000 | [diff] [blame] | 87 | unsigned __cpuinit get_c0_compare_int(void) |
Ralf Baechle | 38760d4 | 2007-10-29 14:23:43 +0000 | [diff] [blame] | 88 | { |
| 89 | #ifdef MSC01E_INT_BASE |
| 90 | if (cpu_has_veic) { |
| 91 | set_vi_handler(MSC01E_INT_CPUCTR, mips_timer_dispatch); |
| 92 | mips_cpu_timer_irq = MSC01E_INT_BASE + MSC01E_INT_CPUCTR; |
Yoichi Yuasa | 78fe01a | 2009-07-08 15:08:19 +0900 | [diff] [blame] | 93 | |
| 94 | return mips_cpu_timer_irq; |
Ralf Baechle | 38760d4 | 2007-10-29 14:23:43 +0000 | [diff] [blame] | 95 | } |
Yoichi Yuasa | 78fe01a | 2009-07-08 15:08:19 +0900 | [diff] [blame] | 96 | #endif |
| 97 | if (cpu_has_vint) |
| 98 | set_vi_handler(cp0_compare_irq, mips_timer_dispatch); |
| 99 | mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq; |
Ralf Baechle | 38760d4 | 2007-10-29 14:23:43 +0000 | [diff] [blame] | 100 | |
| 101 | return mips_cpu_timer_irq; |
| 102 | } |
| 103 | |
Ralf Baechle | 4b55048 | 2007-10-11 23:46:08 +0100 | [diff] [blame] | 104 | void __init plat_time_init(void) |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 105 | { |
Ralf Baechle | 526a677 | 2007-10-30 15:39:18 +0000 | [diff] [blame] | 106 | unsigned int est_freq; |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 107 | |
Ralf Baechle | f6e2373 | 2007-07-10 17:32:56 +0100 | [diff] [blame] | 108 | /* Set Data mode - binary. */ |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 109 | CMOS_WRITE(CMOS_READ(RTC_CONTROL) | RTC_DM_BINARY, RTC_CONTROL); |
| 110 | |
Ralf Baechle | 49a89ef | 2007-10-11 23:46:15 +0100 | [diff] [blame] | 111 | est_freq = estimate_cpu_frequency(); |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 112 | |
Ralf Baechle | f6e2373 | 2007-07-10 17:32:56 +0100 | [diff] [blame] | 113 | printk(KERN_INFO "CPU frequency %d.%02d MHz\n", est_freq / 1000000, |
| 114 | (est_freq % 1000000) * 100 / 1000000); |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 115 | |
Ralf Baechle | f6e2373 | 2007-07-10 17:32:56 +0100 | [diff] [blame] | 116 | cpu_khz = est_freq / 1000; |
Ralf Baechle | c78cbf4 | 2005-09-30 13:59:37 +0100 | [diff] [blame] | 117 | } |