Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 1 | /* |
| 2 | * drivers/media/radio/si4713-i2c.h |
| 3 | * |
| 4 | * Property and commands definitions for Si4713 radio transmitter chip. |
| 5 | * |
| 6 | * Copyright (c) 2008 Instituto Nokia de Tecnologia - INdT |
| 7 | * Contact: Eduardo Valentin <eduardo.valentin@nokia.com> |
| 8 | * |
| 9 | * This file is licensed under the terms of the GNU General Public License |
| 10 | * version 2. This program is licensed "as is" without any warranty of any |
| 11 | * kind, whether express or implied. |
| 12 | * |
| 13 | */ |
| 14 | |
| 15 | #ifndef SI4713_I2C_H |
| 16 | #define SI4713_I2C_H |
| 17 | |
Sebastian Reichel | 98bea62 | 2014-11-10 17:34:41 -0300 | [diff] [blame] | 18 | #include <linux/platform_device.h> |
Dinesh Ram | d808f5b | 2013-10-15 12:24:39 -0300 | [diff] [blame] | 19 | #include <linux/regulator/consumer.h> |
Sebastian Reichel | fbe14a1 | 2014-10-21 12:07:01 -0300 | [diff] [blame] | 20 | #include <linux/gpio/consumer.h> |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 21 | #include <media/v4l2-subdev.h> |
Hans Verkuil | 03aa1bc | 2013-04-08 17:27:18 -0300 | [diff] [blame] | 22 | #include <media/v4l2-ctrls.h> |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 23 | #include <media/si4713.h> |
| 24 | |
| 25 | #define SI4713_PRODUCT_NUMBER 0x0D |
| 26 | |
| 27 | /* Command Timeouts */ |
| 28 | #define DEFAULT_TIMEOUT 500 |
| 29 | #define TIMEOUT_SET_PROPERTY 20 |
| 30 | #define TIMEOUT_TX_TUNE_POWER 30000 |
| 31 | #define TIMEOUT_TX_TUNE 110000 |
| 32 | #define TIMEOUT_POWER_UP 200000 |
| 33 | |
| 34 | /* |
| 35 | * Command and its arguments definitions |
| 36 | */ |
| 37 | #define SI4713_PWUP_CTSIEN (1<<7) |
| 38 | #define SI4713_PWUP_GPO2OEN (1<<6) |
| 39 | #define SI4713_PWUP_PATCH (1<<5) |
| 40 | #define SI4713_PWUP_XOSCEN (1<<4) |
| 41 | #define SI4713_PWUP_FUNC_TX 0x02 |
| 42 | #define SI4713_PWUP_FUNC_PATCH 0x0F |
| 43 | #define SI4713_PWUP_OPMOD_ANALOG 0x50 |
| 44 | #define SI4713_PWUP_OPMOD_DIGITAL 0x0F |
| 45 | #define SI4713_PWUP_NARGS 2 |
| 46 | #define SI4713_PWUP_NRESP 1 |
| 47 | #define SI4713_CMD_POWER_UP 0x01 |
| 48 | |
| 49 | #define SI4713_GETREV_NRESP 9 |
| 50 | #define SI4713_CMD_GET_REV 0x10 |
| 51 | |
| 52 | #define SI4713_PWDN_NRESP 1 |
| 53 | #define SI4713_CMD_POWER_DOWN 0x11 |
| 54 | |
| 55 | #define SI4713_SET_PROP_NARGS 5 |
| 56 | #define SI4713_SET_PROP_NRESP 1 |
| 57 | #define SI4713_CMD_SET_PROPERTY 0x12 |
| 58 | |
| 59 | #define SI4713_GET_PROP_NARGS 3 |
| 60 | #define SI4713_GET_PROP_NRESP 4 |
| 61 | #define SI4713_CMD_GET_PROPERTY 0x13 |
| 62 | |
| 63 | #define SI4713_GET_STATUS_NRESP 1 |
| 64 | #define SI4713_CMD_GET_INT_STATUS 0x14 |
| 65 | |
| 66 | #define SI4713_CMD_PATCH_ARGS 0x15 |
| 67 | #define SI4713_CMD_PATCH_DATA 0x16 |
| 68 | |
| 69 | #define SI4713_MAX_FREQ 10800 |
| 70 | #define SI4713_MIN_FREQ 7600 |
| 71 | #define SI4713_TXFREQ_NARGS 3 |
| 72 | #define SI4713_TXFREQ_NRESP 1 |
| 73 | #define SI4713_CMD_TX_TUNE_FREQ 0x30 |
| 74 | |
| 75 | #define SI4713_MAX_POWER 120 |
| 76 | #define SI4713_MIN_POWER 88 |
| 77 | #define SI4713_MAX_ANTCAP 191 |
| 78 | #define SI4713_MIN_ANTCAP 0 |
| 79 | #define SI4713_TXPWR_NARGS 4 |
| 80 | #define SI4713_TXPWR_NRESP 1 |
| 81 | #define SI4713_CMD_TX_TUNE_POWER 0x31 |
| 82 | |
| 83 | #define SI4713_TXMEA_NARGS 4 |
| 84 | #define SI4713_TXMEA_NRESP 1 |
| 85 | #define SI4713_CMD_TX_TUNE_MEASURE 0x32 |
| 86 | |
| 87 | #define SI4713_INTACK_MASK 0x01 |
| 88 | #define SI4713_TXSTATUS_NARGS 1 |
| 89 | #define SI4713_TXSTATUS_NRESP 8 |
| 90 | #define SI4713_CMD_TX_TUNE_STATUS 0x33 |
| 91 | |
| 92 | #define SI4713_OVERMOD_BIT (1 << 2) |
| 93 | #define SI4713_IALH_BIT (1 << 1) |
| 94 | #define SI4713_IALL_BIT (1 << 0) |
| 95 | #define SI4713_ASQSTATUS_NARGS 1 |
| 96 | #define SI4713_ASQSTATUS_NRESP 5 |
| 97 | #define SI4713_CMD_TX_ASQ_STATUS 0x34 |
| 98 | |
| 99 | #define SI4713_RDSBUFF_MODE_MASK 0x87 |
| 100 | #define SI4713_RDSBUFF_NARGS 7 |
| 101 | #define SI4713_RDSBUFF_NRESP 6 |
| 102 | #define SI4713_CMD_TX_RDS_BUFF 0x35 |
| 103 | |
| 104 | #define SI4713_RDSPS_PSID_MASK 0x1F |
| 105 | #define SI4713_RDSPS_NARGS 5 |
| 106 | #define SI4713_RDSPS_NRESP 1 |
| 107 | #define SI4713_CMD_TX_RDS_PS 0x36 |
| 108 | |
| 109 | #define SI4713_CMD_GPO_CTL 0x80 |
| 110 | #define SI4713_CMD_GPO_SET 0x81 |
| 111 | |
| 112 | /* |
| 113 | * Bits from status response |
| 114 | */ |
| 115 | #define SI4713_CTS (1<<7) |
| 116 | #define SI4713_ERR (1<<6) |
| 117 | #define SI4713_RDS_INT (1<<2) |
| 118 | #define SI4713_ASQ_INT (1<<1) |
| 119 | #define SI4713_STC_INT (1<<0) |
| 120 | |
| 121 | /* |
| 122 | * Property definitions |
| 123 | */ |
| 124 | #define SI4713_GPO_IEN 0x0001 |
| 125 | #define SI4713_DIG_INPUT_FORMAT 0x0101 |
| 126 | #define SI4713_DIG_INPUT_SAMPLE_RATE 0x0103 |
| 127 | #define SI4713_REFCLK_FREQ 0x0201 |
| 128 | #define SI4713_REFCLK_PRESCALE 0x0202 |
| 129 | #define SI4713_TX_COMPONENT_ENABLE 0x2100 |
| 130 | #define SI4713_TX_AUDIO_DEVIATION 0x2101 |
| 131 | #define SI4713_TX_PILOT_DEVIATION 0x2102 |
| 132 | #define SI4713_TX_RDS_DEVIATION 0x2103 |
| 133 | #define SI4713_TX_LINE_INPUT_LEVEL 0x2104 |
| 134 | #define SI4713_TX_LINE_INPUT_MUTE 0x2105 |
| 135 | #define SI4713_TX_PREEMPHASIS 0x2106 |
| 136 | #define SI4713_TX_PILOT_FREQUENCY 0x2107 |
| 137 | #define SI4713_TX_ACOMP_ENABLE 0x2200 |
| 138 | #define SI4713_TX_ACOMP_THRESHOLD 0x2201 |
| 139 | #define SI4713_TX_ACOMP_ATTACK_TIME 0x2202 |
| 140 | #define SI4713_TX_ACOMP_RELEASE_TIME 0x2203 |
| 141 | #define SI4713_TX_ACOMP_GAIN 0x2204 |
| 142 | #define SI4713_TX_LIMITER_RELEASE_TIME 0x2205 |
| 143 | #define SI4713_TX_ASQ_INTERRUPT_SOURCE 0x2300 |
| 144 | #define SI4713_TX_ASQ_LEVEL_LOW 0x2301 |
| 145 | #define SI4713_TX_ASQ_DURATION_LOW 0x2302 |
| 146 | #define SI4713_TX_ASQ_LEVEL_HIGH 0x2303 |
| 147 | #define SI4713_TX_ASQ_DURATION_HIGH 0x2304 |
| 148 | #define SI4713_TX_RDS_INTERRUPT_SOURCE 0x2C00 |
| 149 | #define SI4713_TX_RDS_PI 0x2C01 |
| 150 | #define SI4713_TX_RDS_PS_MIX 0x2C02 |
| 151 | #define SI4713_TX_RDS_PS_MISC 0x2C03 |
| 152 | #define SI4713_TX_RDS_PS_REPEAT_COUNT 0x2C04 |
| 153 | #define SI4713_TX_RDS_PS_MESSAGE_COUNT 0x2C05 |
| 154 | #define SI4713_TX_RDS_PS_AF 0x2C06 |
| 155 | #define SI4713_TX_RDS_FIFO_SIZE 0x2C07 |
| 156 | |
| 157 | #define PREEMPHASIS_USA 75 |
| 158 | #define PREEMPHASIS_EU 50 |
| 159 | #define PREEMPHASIS_DISABLED 0 |
| 160 | #define FMPE_USA 0x00 |
| 161 | #define FMPE_EU 0x01 |
| 162 | #define FMPE_DISABLED 0x02 |
| 163 | |
| 164 | #define POWER_UP 0x01 |
| 165 | #define POWER_DOWN 0x00 |
| 166 | |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 167 | #define MAX_RDS_PTY 31 |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 168 | #define MAX_RDS_DEVIATION 90000 |
Hans Verkuil | 03aa1bc | 2013-04-08 17:27:18 -0300 | [diff] [blame] | 169 | |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 170 | /* |
| 171 | * PSNAME is known to be defined as 8 character sized (RDS Spec). |
| 172 | * However, there is receivers which scroll PSNAME 8xN sized. |
| 173 | */ |
| 174 | #define MAX_RDS_PS_NAME 96 |
Hans Verkuil | 03aa1bc | 2013-04-08 17:27:18 -0300 | [diff] [blame] | 175 | |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 176 | /* |
| 177 | * MAX_RDS_RADIO_TEXT is known to be defined as 32 (2A group) or 64 (2B group) |
| 178 | * character sized (RDS Spec). |
| 179 | * However, there is receivers which scroll them as well. |
| 180 | */ |
| 181 | #define MAX_RDS_RADIO_TEXT 384 |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 182 | |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 183 | #define MAX_LIMITER_RELEASE_TIME 102390 |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 184 | #define MAX_LIMITER_DEVIATION 90000 |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 185 | |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 186 | #define MAX_PILOT_DEVIATION 90000 |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 187 | #define MAX_PILOT_FREQUENCY 19000 |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 188 | |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 189 | #define MAX_ACOMP_RELEASE_TIME 1000000 |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 190 | #define MAX_ACOMP_ATTACK_TIME 5000 |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 191 | #define MAX_ACOMP_THRESHOLD 0 |
| 192 | #define MIN_ACOMP_THRESHOLD (-40) |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 193 | #define MAX_ACOMP_GAIN 20 |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 194 | |
| 195 | /* |
| 196 | * si4713_device - private data |
| 197 | */ |
| 198 | struct si4713_device { |
| 199 | /* v4l2_subdev and i2c reference (v4l2_subdev priv data) */ |
| 200 | struct v4l2_subdev sd; |
Hans Verkuil | 03aa1bc | 2013-04-08 17:27:18 -0300 | [diff] [blame] | 201 | struct v4l2_ctrl_handler ctrl_handler; |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 202 | /* private data structures */ |
Hans Verkuil | 03aa1bc | 2013-04-08 17:27:18 -0300 | [diff] [blame] | 203 | struct { /* si4713 control cluster */ |
| 204 | /* This is one big cluster since the mute control |
| 205 | * powers off the device and after unmuting again all |
| 206 | * controls need to be set at once. The only way of doing |
| 207 | * that is by making it one big cluster. */ |
| 208 | struct v4l2_ctrl *mute; |
| 209 | struct v4l2_ctrl *rds_ps_name; |
| 210 | struct v4l2_ctrl *rds_radio_text; |
| 211 | struct v4l2_ctrl *rds_pi; |
| 212 | struct v4l2_ctrl *rds_deviation; |
| 213 | struct v4l2_ctrl *rds_pty; |
Hans Verkuil | 1abba28 | 2014-07-21 10:45:39 -0300 | [diff] [blame] | 214 | struct v4l2_ctrl *rds_compressed; |
| 215 | struct v4l2_ctrl *rds_art_head; |
| 216 | struct v4l2_ctrl *rds_stereo; |
| 217 | struct v4l2_ctrl *rds_ta; |
| 218 | struct v4l2_ctrl *rds_tp; |
| 219 | struct v4l2_ctrl *rds_ms; |
| 220 | struct v4l2_ctrl *rds_dyn_pty; |
| 221 | struct v4l2_ctrl *rds_alt_freqs_enable; |
| 222 | struct v4l2_ctrl *rds_alt_freqs; |
Hans Verkuil | 03aa1bc | 2013-04-08 17:27:18 -0300 | [diff] [blame] | 223 | struct v4l2_ctrl *compression_enabled; |
| 224 | struct v4l2_ctrl *compression_threshold; |
| 225 | struct v4l2_ctrl *compression_gain; |
| 226 | struct v4l2_ctrl *compression_attack_time; |
| 227 | struct v4l2_ctrl *compression_release_time; |
| 228 | struct v4l2_ctrl *pilot_tone_enabled; |
| 229 | struct v4l2_ctrl *pilot_tone_freq; |
| 230 | struct v4l2_ctrl *pilot_tone_deviation; |
| 231 | struct v4l2_ctrl *limiter_enabled; |
| 232 | struct v4l2_ctrl *limiter_deviation; |
| 233 | struct v4l2_ctrl *limiter_release_time; |
| 234 | struct v4l2_ctrl *tune_preemphasis; |
| 235 | struct v4l2_ctrl *tune_pwr_level; |
| 236 | struct v4l2_ctrl *tune_ant_cap; |
| 237 | }; |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 238 | struct completion work; |
Sebastian Reichel | d4471de | 2014-10-21 12:07:00 -0300 | [diff] [blame] | 239 | struct regulator *vdd; |
| 240 | struct regulator *vio; |
Sebastian Reichel | fbe14a1 | 2014-10-21 12:07:01 -0300 | [diff] [blame] | 241 | struct gpio_desc *gpio_reset; |
Sebastian Reichel | 98bea62 | 2014-11-10 17:34:41 -0300 | [diff] [blame] | 242 | struct platform_device *pd; |
Hans Verkuil | 03aa1bc | 2013-04-08 17:27:18 -0300 | [diff] [blame] | 243 | u32 power_state; |
| 244 | u32 rds_enabled; |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 245 | u32 frequency; |
| 246 | u32 preemphasis; |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 247 | u32 stereo; |
| 248 | u32 tune_rnl; |
| 249 | }; |
Sebastian Reichel | 98bea62 | 2014-11-10 17:34:41 -0300 | [diff] [blame] | 250 | |
| 251 | struct radio_si4713_platform_data { |
| 252 | struct i2c_client *subdev; |
| 253 | }; |
Eduardo Valentin | 02bee89 | 2009-08-08 08:46:53 -0300 | [diff] [blame] | 254 | #endif /* ifndef SI4713_I2C_H */ |