Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 1 | /* |
| 2 | * at91sam9m10g45ek.dts - Device Tree file for AT91SAM9M10G45-EK board |
| 3 | * |
| 4 | * Copyright (C) 2011 Atmel, |
| 5 | * 2011 Nicolas Ferre <nicolas.ferre@atmel.com> |
| 6 | * |
| 7 | * Licensed under GPLv2 or later. |
| 8 | */ |
| 9 | /dts-v1/; |
Jean-Christophe PLAGNIOL-VILLARD | 6db64d2 | 2013-05-15 01:21:50 +0800 | [diff] [blame] | 10 | #include "at91sam9g45.dtsi" |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 11 | |
| 12 | / { |
| 13 | model = "Atmel AT91SAM9M10G45-EK"; |
| 14 | compatible = "atmel,at91sam9m10g45ek", "atmel,at91sam9g45", "atmel,at91sam9"; |
| 15 | |
| 16 | chosen { |
Jean-Christophe PLAGNIOL-VILLARD | d6a0166 | 2012-01-26 02:11:06 +0800 | [diff] [blame] | 17 | bootargs = "mem=64M console=ttyS0,115200 root=/dev/mtdblock1 rw rootfstype=jffs2"; |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 18 | }; |
| 19 | |
Ludovic Desroches | dcce6ce | 2012-04-02 20:44:20 +0200 | [diff] [blame] | 20 | memory { |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 21 | reg = <0x70000000 0x4000000>; |
| 22 | }; |
| 23 | |
Jean-Christophe PLAGNIOL-VILLARD | eb5e76f | 2012-03-02 20:44:23 +0800 | [diff] [blame] | 24 | clocks { |
| 25 | #address-cells = <1>; |
| 26 | #size-cells = <1>; |
| 27 | ranges; |
| 28 | |
| 29 | main_clock: clock@0 { |
| 30 | compatible = "atmel,osc", "fixed-clock"; |
| 31 | clock-frequency = <12000000>; |
| 32 | }; |
| 33 | }; |
| 34 | |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 35 | ahb { |
| 36 | apb { |
| 37 | dbgu: serial@ffffee00 { |
| 38 | status = "okay"; |
| 39 | }; |
| 40 | |
| 41 | usart1: serial@fff90000 { |
Jean-Christophe PLAGNIOL-VILLARD | c58c0c5 | 2012-11-19 07:30:01 +0800 | [diff] [blame] | 42 | pinctrl-0 = |
| 43 | <&pinctrl_usart1 |
| 44 | &pinctrl_usart1_rts |
| 45 | &pinctrl_usart1_cts>; |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 46 | status = "okay"; |
| 47 | }; |
Nicolas Ferre | 0d4f99d | 2011-12-05 18:03:05 +0100 | [diff] [blame] | 48 | |
| 49 | macb0: ethernet@fffbc000 { |
| 50 | phy-mode = "rmii"; |
| 51 | status = "okay"; |
| 52 | }; |
Ludovic Desroches | fbc1871 | 2012-09-12 08:42:17 +0200 | [diff] [blame] | 53 | |
| 54 | i2c0: i2c@fff84000 { |
| 55 | status = "okay"; |
| 56 | }; |
| 57 | |
| 58 | i2c1: i2c@fff88000 { |
| 59 | status = "okay"; |
| 60 | }; |
Ludovic Desroches | 4134a45 | 2012-11-19 12:24:02 +0100 | [diff] [blame] | 61 | |
| 62 | mmc0: mmc@fff80000 { |
Jean-Christophe PLAGNIOL-VILLARD | 199e2ed | 2012-11-20 00:38:18 +0800 | [diff] [blame] | 63 | pinctrl-0 = < |
| 64 | &pinctrl_board_mmc0 |
| 65 | &pinctrl_mmc0_slot0_clk_cmd_dat0 |
| 66 | &pinctrl_mmc0_slot0_dat1_3>; |
Ludovic Desroches | 4134a45 | 2012-11-19 12:24:02 +0100 | [diff] [blame] | 67 | status = "okay"; |
| 68 | slot@0 { |
| 69 | reg = <0>; |
| 70 | bus-width = <4>; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 71 | cd-gpios = <&pioD 10 GPIO_ACTIVE_HIGH>; |
Ludovic Desroches | 4134a45 | 2012-11-19 12:24:02 +0100 | [diff] [blame] | 72 | }; |
| 73 | }; |
| 74 | |
| 75 | mmc1: mmc@fffd0000 { |
Jean-Christophe PLAGNIOL-VILLARD | 199e2ed | 2012-11-20 00:38:18 +0800 | [diff] [blame] | 76 | pinctrl-0 = < |
| 77 | &pinctrl_board_mmc1 |
| 78 | &pinctrl_mmc1_slot0_clk_cmd_dat0 |
| 79 | &pinctrl_mmc1_slot0_dat1_3>; |
Ludovic Desroches | 4134a45 | 2012-11-19 12:24:02 +0100 | [diff] [blame] | 80 | status = "okay"; |
| 81 | slot@0 { |
| 82 | reg = <0>; |
| 83 | bus-width = <4>; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 84 | cd-gpios = <&pioD 11 GPIO_ACTIVE_HIGH>; |
| 85 | wp-gpios = <&pioD 29 GPIO_ACTIVE_HIGH>; |
Ludovic Desroches | 4134a45 | 2012-11-19 12:24:02 +0100 | [diff] [blame] | 86 | }; |
| 87 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 199e2ed | 2012-11-20 00:38:18 +0800 | [diff] [blame] | 88 | |
| 89 | pinctrl@fffff200 { |
| 90 | mmc0 { |
| 91 | pinctrl_board_mmc0: mmc0-board { |
| 92 | atmel,pins = |
| 93 | <3 10 0x0 0x5>; /* PD10 gpio CD pin pull up and deglitch */ |
| 94 | }; |
| 95 | }; |
| 96 | |
| 97 | mmc1 { |
| 98 | pinctrl_board_mmc1: mmc1-board { |
| 99 | atmel,pins = |
| 100 | <3 11 0x0 0x5 /* PD11 gpio CD pin pull up and deglitch */ |
| 101 | 3 29 0x0 0x1>; /* PD29 gpio WP pin pull up */ |
| 102 | }; |
| 103 | }; |
| 104 | }; |
Richard Genoud | b6811e9 | 2013-04-03 14:03:05 +0800 | [diff] [blame] | 105 | |
| 106 | spi0: spi@fffa4000{ |
| 107 | status = "okay"; |
| 108 | cs-gpios = <&pioB 3 0>, <0>, <0>, <0>; |
| 109 | mtd_dataflash@0 { |
| 110 | compatible = "atmel,at45", "atmel,dataflash"; |
| 111 | spi-max-frequency = <13000000>; |
| 112 | reg = <0>; |
| 113 | }; |
| 114 | }; |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 115 | }; |
Jean-Christophe PLAGNIOL-VILLARD | d6a0166 | 2012-01-26 02:11:06 +0800 | [diff] [blame] | 116 | |
| 117 | nand0: nand@40000000 { |
| 118 | nand-bus-width = <8>; |
| 119 | nand-ecc-mode = "soft"; |
| 120 | nand-on-flash-bbt; |
| 121 | status = "okay"; |
| 122 | |
| 123 | boot@0 { |
| 124 | label = "bootstrap/uboot/kernel"; |
| 125 | reg = <0x0 0x400000>; |
| 126 | }; |
| 127 | |
| 128 | rootfs@400000 { |
| 129 | label = "rootfs"; |
| 130 | reg = <0x400000 0x3C00000>; |
| 131 | }; |
| 132 | |
| 133 | data@4000000 { |
| 134 | label = "data"; |
| 135 | reg = <0x4000000 0xC000000>; |
| 136 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 6a06245 | 2011-11-21 06:55:18 +0800 | [diff] [blame] | 137 | }; |
Jean-Christophe PLAGNIOL-VILLARD | d6a0166 | 2012-01-26 02:11:06 +0800 | [diff] [blame] | 138 | |
Jean-Christophe PLAGNIOL-VILLARD | 6a06245 | 2011-11-21 06:55:18 +0800 | [diff] [blame] | 139 | usb0: ohci@00700000 { |
| 140 | status = "okay"; |
| 141 | num-ports = <2>; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 142 | atmel,vbus-gpio = <&pioD 1 GPIO_ACTIVE_LOW |
| 143 | &pioD 3 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | d6a0166 | 2012-01-26 02:11:06 +0800 | [diff] [blame] | 144 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 62c5553 | 2011-11-22 12:11:13 +0800 | [diff] [blame] | 145 | |
| 146 | usb1: ehci@00800000 { |
| 147 | status = "okay"; |
| 148 | }; |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 149 | }; |
Jean-Christophe PLAGNIOL-VILLARD | f2ee7ac | 2012-02-04 12:26:01 +0800 | [diff] [blame] | 150 | |
| 151 | leds { |
| 152 | compatible = "gpio-leds"; |
| 153 | |
| 154 | d8 { |
| 155 | label = "d8"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 156 | gpios = <&pioD 30 GPIO_ACTIVE_HIGH>; |
Jean-Christophe PLAGNIOL-VILLARD | f2ee7ac | 2012-02-04 12:26:01 +0800 | [diff] [blame] | 157 | linux,default-trigger = "heartbeat"; |
| 158 | }; |
| 159 | |
| 160 | d6 { |
| 161 | label = "d6"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 162 | gpios = <&pioD 0 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | f2ee7ac | 2012-02-04 12:26:01 +0800 | [diff] [blame] | 163 | linux,default-trigger = "nand-disk"; |
| 164 | }; |
| 165 | |
| 166 | d7 { |
| 167 | label = "d7"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 168 | gpios = <&pioD 31 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | f2ee7ac | 2012-02-04 12:26:01 +0800 | [diff] [blame] | 169 | linux,default-trigger = "mmc0"; |
| 170 | }; |
| 171 | }; |
Jean-Christophe PLAGNIOL-VILLARD | 8a087b0 | 2012-02-04 12:42:35 +0800 | [diff] [blame] | 172 | |
| 173 | gpio_keys { |
| 174 | compatible = "gpio-keys"; |
Jean-Christophe PLAGNIOL-VILLARD | 8a087b0 | 2012-02-04 12:42:35 +0800 | [diff] [blame] | 175 | |
| 176 | left_click { |
| 177 | label = "left_click"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 178 | gpios = <&pioB 6 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | 8a087b0 | 2012-02-04 12:42:35 +0800 | [diff] [blame] | 179 | linux,code = <272>; |
| 180 | gpio-key,wakeup; |
| 181 | }; |
| 182 | |
| 183 | right_click { |
| 184 | label = "right_click"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 185 | gpios = <&pioB 7 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | 8a087b0 | 2012-02-04 12:42:35 +0800 | [diff] [blame] | 186 | linux,code = <273>; |
| 187 | gpio-key,wakeup; |
| 188 | }; |
| 189 | |
| 190 | left { |
| 191 | label = "Joystick Left"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 192 | gpios = <&pioB 14 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | 8a087b0 | 2012-02-04 12:42:35 +0800 | [diff] [blame] | 193 | linux,code = <105>; |
| 194 | }; |
| 195 | |
| 196 | right { |
| 197 | label = "Joystick Right"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 198 | gpios = <&pioB 15 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | 8a087b0 | 2012-02-04 12:42:35 +0800 | [diff] [blame] | 199 | linux,code = <106>; |
| 200 | }; |
| 201 | |
| 202 | up { |
| 203 | label = "Joystick Up"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 204 | gpios = <&pioB 16 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | 8a087b0 | 2012-02-04 12:42:35 +0800 | [diff] [blame] | 205 | linux,code = <103>; |
| 206 | }; |
| 207 | |
| 208 | down { |
| 209 | label = "Joystick Down"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 210 | gpios = <&pioB 17 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | 8a087b0 | 2012-02-04 12:42:35 +0800 | [diff] [blame] | 211 | linux,code = <108>; |
| 212 | }; |
| 213 | |
| 214 | enter { |
| 215 | label = "Joystick Press"; |
Jean-Christophe PLAGNIOL-VILLARD | 92f8629 | 2013-04-24 08:34:25 +0800 | [diff] [blame^] | 216 | gpios = <&pioB 18 GPIO_ACTIVE_LOW>; |
Jean-Christophe PLAGNIOL-VILLARD | 8a087b0 | 2012-02-04 12:42:35 +0800 | [diff] [blame] | 217 | linux,code = <28>; |
| 218 | }; |
| 219 | }; |
Nicolas Ferre | 49fe2ba | 2011-10-10 18:29:24 +0200 | [diff] [blame] | 220 | }; |