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Maxime Ripardd3ae0782013-06-09 10:40:53 +02001/*
2 * Copyright 2013 Maxime Ripard
3 *
4 * Maxime Ripard <maxime.ripard@free-electrons.com>
5 *
Maxime Ripard1d86b4b2014-09-02 19:25:26 +02006 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
Maxime Ripardd3ae0782013-06-09 10:40:53 +020010 *
Maxime Ripard1d86b4b2014-09-02 19:25:26 +020011 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public
22 * License along with this library; if not, write to the Free
23 * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
24 * MA 02110-1301 USA
25 *
26 * Or, alternatively,
27 *
28 * b) Permission is hereby granted, free of charge, to any person
29 * obtaining a copy of this software and associated documentation
30 * files (the "Software"), to deal in the Software without
31 * restriction, including without limitation the rights to use,
32 * copy, modify, merge, publish, distribute, sublicense, and/or
33 * sell copies of the Software, and to permit persons to whom the
34 * Software is furnished to do so, subject to the following
35 * conditions:
36 *
37 * The above copyright notice and this permission notice shall be
38 * included in all copies or substantial portions of the Software.
39 *
40 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
41 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
42 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
43 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
44 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
45 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
46 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
47 * OTHER DEALINGS IN THE SOFTWARE.
Maxime Ripardd3ae0782013-06-09 10:40:53 +020048 */
49
Maxime Ripard71455702014-12-16 22:59:54 +010050#include "skeleton.dtsi"
Maxime Ripardd3ae0782013-06-09 10:40:53 +020051
Maxime Ripard903b2d72015-01-30 16:42:13 +010052#include "sun5i.dtsi"
53
Maxime Ripard1f9f6a72014-12-16 22:59:56 +010054#include <dt-bindings/dma/sun4i-a10.h>
Maxime Ripard092a0c32014-12-16 22:59:57 +010055#include <dt-bindings/pinctrl/sun4i-a10.h>
Maxime Ripardd3ae0782013-06-09 10:40:53 +020056
57/ {
58 interrupt-parent = <&intc>;
59
Emilio Lópeze751cce2013-11-16 15:17:29 -030060 aliases {
61 ethernet0 = &emac;
62 };
63
Hans de Goeded5018412014-11-14 16:34:35 +010064 chosen {
65 #address-cells = <1>;
66 #size-cells = <1>;
67 ranges;
68
Hans de Goedea9f8cda2014-11-18 12:07:13 +010069 framebuffer@0 {
70 compatible = "allwinner,simple-framebuffer", "simple-framebuffer";
71 allwinner,pipeline = "de_be0-lcd0-hdmi";
Hans de Goede678e75d2014-11-16 17:09:32 +010072 clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 43>,
73 <&ahb_gates 44>;
Hans de Goeded5018412014-11-14 16:34:35 +010074 status = "disabled";
75 };
Hans de Goedefd18c7e2015-01-19 14:05:12 +010076
77 framebuffer@1 {
78 compatible = "allwinner,simple-framebuffer",
79 "simple-framebuffer";
80 allwinner,pipeline = "de_be0-lcd0";
81 clocks = <&pll5 1>, <&ahb_gates 36>, <&ahb_gates 44>;
82 status = "disabled";
83 };
Hans de Goeded5018412014-11-14 16:34:35 +010084 };
85
Maxime Ripardd3ae0782013-06-09 10:40:53 +020086 clocks {
Chen-Yu Tsai3dce8322014-02-03 09:51:42 +080087 ahb_gates: clk@01c20060 {
Maxime Ripardd3ae0782013-06-09 10:40:53 +020088 #clock-cells = <1>;
Maxime Ripard29bb8052013-07-16 11:28:58 +020089 compatible = "allwinner,sun5i-a10s-ahb-gates-clk";
Maxime Ripardd3ae0782013-06-09 10:40:53 +020090 reg = <0x01c20060 0x8>;
91 clocks = <&ahb>;
Maxime Ripard29bb8052013-07-16 11:28:58 +020092 clock-output-names = "ahb_usbotg", "ahb_ehci", "ahb_ohci",
93 "ahb_ss", "ahb_dma", "ahb_bist", "ahb_mmc0",
94 "ahb_mmc1", "ahb_mmc2", "ahb_nand", "ahb_sdram",
95 "ahb_emac", "ahb_ts", "ahb_spi0", "ahb_spi1",
96 "ahb_spi2", "ahb_gps", "ahb_stimer", "ahb_ve",
97 "ahb_tve", "ahb_lcd", "ahb_csi", "ahb_hdmi",
98 "ahb_de_be", "ahb_de_fe", "ahb_iep", "ahb_mali400";
Maxime Ripardd3ae0782013-06-09 10:40:53 +020099 };
100
Chen-Yu Tsai3dce8322014-02-03 09:51:42 +0800101 apb0_gates: clk@01c20068 {
Maxime Ripardd3ae0782013-06-09 10:40:53 +0200102 #clock-cells = <1>;
Maxime Ripard29bb8052013-07-16 11:28:58 +0200103 compatible = "allwinner,sun5i-a10s-apb0-gates-clk";
Maxime Ripardd3ae0782013-06-09 10:40:53 +0200104 reg = <0x01c20068 0x4>;
105 clocks = <&apb0>;
Maxime Ripard29bb8052013-07-16 11:28:58 +0200106 clock-output-names = "apb0_codec", "apb0_iis", "apb0_pio",
107 "apb0_ir", "apb0_keypad";
Maxime Ripardd3ae0782013-06-09 10:40:53 +0200108 };
109
Chen-Yu Tsai3dce8322014-02-03 09:51:42 +0800110 apb1_gates: clk@01c2006c {
Maxime Ripardd3ae0782013-06-09 10:40:53 +0200111 #clock-cells = <1>;
Maxime Ripard29bb8052013-07-16 11:28:58 +0200112 compatible = "allwinner,sun5i-a10s-apb1-gates-clk";
Maxime Ripardd3ae0782013-06-09 10:40:53 +0200113 reg = <0x01c2006c 0x4>;
114 clocks = <&apb1>;
115 clock-output-names = "apb1_i2c0", "apb1_i2c1",
Maxime Ripard29bb8052013-07-16 11:28:58 +0200116 "apb1_i2c2", "apb1_uart0", "apb1_uart1",
117 "apb1_uart2", "apb1_uart3";
Maxime Ripardd3ae0782013-06-09 10:40:53 +0200118 };
119 };
120
Maxime Ripard9e199292013-08-03 16:07:36 +0200121 soc@01c00000 {
Maxime Ripardd3ae0782013-06-09 10:40:53 +0200122 emac: ethernet@01c0b000 {
Maxime Ripard1c70e092014-02-02 14:49:13 +0100123 compatible = "allwinner,sun4i-a10-emac";
Maxime Ripardd3ae0782013-06-09 10:40:53 +0200124 reg = <0x01c0b000 0x1000>;
125 interrupts = <55>;
126 clocks = <&ahb_gates 17>;
127 status = "disabled";
128 };
129
Aleksei Mamlin92395f52015-01-19 22:35:22 +0300130 mdio: mdio@01c0b080 {
Maxime Ripard1c70e092014-02-02 14:49:13 +0100131 compatible = "allwinner,sun4i-a10-mdio";
Maxime Ripardd3ae0782013-06-09 10:40:53 +0200132 reg = <0x01c0b080 0x14>;
133 status = "disabled";
134 #address-cells = <1>;
135 #size-cells = <0>;
136 };
137
Maxime Ripardd3ae0782013-06-09 10:40:53 +0200138 uart0: serial@01c28000 {
139 compatible = "snps,dw-apb-uart";
140 reg = <0x01c28000 0x400>;
141 interrupts = <1>;
142 reg-shift = <2>;
143 reg-io-width = <4>;
144 clocks = <&apb1_gates 16>;
145 status = "disabled";
146 };
147
Maxime Ripardd3ae0782013-06-09 10:40:53 +0200148 uart2: serial@01c28800 {
149 compatible = "snps,dw-apb-uart";
150 reg = <0x01c28800 0x400>;
151 interrupts = <3>;
152 reg-shift = <2>;
153 reg-io-width = <4>;
154 clocks = <&apb1_gates 18>;
155 status = "disabled";
156 };
Maxime Ripard903b2d72015-01-30 16:42:13 +0100157 };
158};
Maxime Ripardd3ae0782013-06-09 10:40:53 +0200159
Maxime Ripard903b2d72015-01-30 16:42:13 +0100160&ehci0 {
161 compatible = "allwinner,sun5i-a10s-ehci", "generic-ehci";
162};
Emilio Lópezca3d4ed2013-07-07 18:31:57 -0300163
Maxime Ripard903b2d72015-01-30 16:42:13 +0100164&ohci0 {
165 compatible = "allwinner,sun5i-a10s-ohci", "generic-ohci";
166};
Emilio Lópezca3d4ed2013-07-07 18:31:57 -0300167
Maxime Ripard903b2d72015-01-30 16:42:13 +0100168&pio {
169 compatible = "allwinner,sun5i-a10s-pinctrl";
Emilio Lópezca3d4ed2013-07-07 18:31:57 -0300170
Maxime Ripard903b2d72015-01-30 16:42:13 +0100171 uart0_pins_a: uart0@0 {
172 allwinner,pins = "PB19", "PB20";
173 allwinner,function = "uart0";
174 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
175 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
176 };
Maxime Ripardf2b50022013-11-07 12:01:48 +0100177
Maxime Ripard903b2d72015-01-30 16:42:13 +0100178 uart2_pins_a: uart2@0 {
179 allwinner,pins = "PC18", "PC19";
180 allwinner,function = "uart2";
181 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
182 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
183 };
184
185 uart3_pins_a: uart3@0 {
186 allwinner,pins = "PG9", "PG10";
187 allwinner,function = "uart3";
188 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
189 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
190 };
191
192 emac_pins_a: emac0@0 {
193 allwinner,pins = "PA0", "PA1", "PA2",
194 "PA3", "PA4", "PA5", "PA6",
195 "PA7", "PA8", "PA9", "PA10",
196 "PA11", "PA12", "PA13", "PA14",
197 "PA15", "PA16";
198 allwinner,function = "emac";
199 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
200 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
201 };
202
203 mmc1_pins_a: mmc1@0 {
204 allwinner,pins = "PG3","PG4","PG5","PG6","PG7","PG8";
205 allwinner,function = "mmc1";
206 allwinner,drive = <SUN4I_PINCTRL_30_MA>;
207 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
Maxime Ripardd3ae0782013-06-09 10:40:53 +0200208 };
209};