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review.shift-gmbh.com / SHIFTPHONES / kernel / shift / mainline / 84fb225ad257442d879a1f57c79184e31fb17aea / . / arch / arm / boot / dts / am335x-boneblack.dts
blob: 55c0e954b1464427722d7bc89513af507cff6591 [file] [log] [blame]
Koen Kooi2ba35492013-09-09 16:29:21 +0200[diff] [blame]1/*
2 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10#include "am33xx.dtsi"
11#include "am335x-bone-common.dtsi"
12
Nishanth Menon9a15fff2014-09-03 11:03:10 -0500[diff] [blame]13/ {
14 model = "TI AM335x BeagleBone Black";
15 compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
16};
17
Koen Kooi2ba35492013-09-09 16:29:21 +0200[diff] [blame]18&ldo3_reg {
19 regulator-min-microvolt = <1800000>;
20 regulator-max-microvolt = <1800000>;
21 regulator-always-on;
22};
Koen Kooi1aac4a92013-09-12 20:35:33 +0200[diff] [blame]23
24&mmc1 {
25 vmmc-supply = <&vmmcsd_fixed>;
26};
27
28&mmc2 {
29 vmmc-supply = <&vmmcsd_fixed>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&emmc_pins>;
32 bus-width = <8>;
33 status = "okay";
Koen Kooi1aac4a92013-09-12 20:35:33 +0200[diff] [blame]34};
Darren Etheridge559a08e2013-09-20 15:01:42 -0500[diff] [blame]35
36&am33xx_pinmux {
37 nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
38 pinctrl-single,pins = <
Andrew F. Davisdf10ead2015-11-13 10:47:27 -0600[diff] [blame]39 AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */
40 AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
41 AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
42 AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
43 AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
44 AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
45 AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
46 AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
47 AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
48 AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
49 AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
50 AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
51 AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
52 AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
53 AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
54 AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
55 AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
56 AM33XX_IOPAD(0x8e0, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_vsync.lcd_vsync */
57 AM33XX_IOPAD(0x8e4, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_hsync.lcd_hsync */
58 AM33XX_IOPAD(0x8e8, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_pclk.lcd_pclk */
59 AM33XX_IOPAD(0x8ec, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
Darren Etheridge559a08e2013-09-20 15:01:42 -0500[diff] [blame]60 >;
61 };
62 nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
63 pinctrl-single,pins = <
Andrew F. Davisdf10ead2015-11-13 10:47:27 -0600[diff] [blame]64 AM33XX_IOPAD(0x9b0, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr0 */
Darren Etheridge559a08e2013-09-20 15:01:42 -0500[diff] [blame]65 >;
66 };
67};
68
69&lcdc {
70 status = "okay";
Jyri Sarha34c900a2015-05-08 14:27:19 +0300[diff] [blame]71 port {
72 lcdc_0: endpoint@0 {
73 remote-endpoint = <&hdmi_0>;
74 };
75 };
Darren Etheridge559a08e2013-09-20 15:01:42 -0500[diff] [blame]76};
77
Jyri Sarha34c900a2015-05-08 14:27:19 +0300[diff] [blame]78&i2c0 {
79 tda19988 {
80 compatible = "nxp,tda998x";
81 reg = <0x70>;
Darren Etheridge559a08e2013-09-20 15:01:42 -0500[diff] [blame]82 pinctrl-names = "default", "off";
83 pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
84 pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
Jyri Sarha34c900a2015-05-08 14:27:19 +0300[diff] [blame]85
86 port {
87 hdmi_0: endpoint@0 {
88 remote-endpoint = <&lcdc_0>;
89 };
90 };
Darren Etheridge559a08e2013-09-20 15:01:42 -0500[diff] [blame]91 };
92};
Johan Hovold672e2b12014-12-10 15:53:29 -0800[diff] [blame]93
94&rtc {
Johan Hovold094d3ee2014-12-10 15:54:14 -0800[diff] [blame]95 system-power-controller;
Johan Hovold672e2b12014-12-10 15:53:29 -0800[diff] [blame]96};