blob: 36be9b61918760e2edfa8e87be82e017a773c5df [file] [log] [blame]
Dan Williams7a678322015-08-19 00:34:34 -04001/*
2 * Copyright (c) 2015, Christoph Hellwig.
3 * Copyright (c) 2015, Intel Corporation.
4 */
5#include <linux/platform_device.h>
Dan Williamsf7256dc2015-11-11 16:46:33 -08006#include <linux/memory_hotplug.h>
Dan Williams7a678322015-08-19 00:34:34 -04007#include <linux/libnvdimm.h>
8#include <linux/module.h>
9
10static const struct attribute_group *e820_pmem_attribute_groups[] = {
11 &nvdimm_bus_attribute_group,
12 NULL,
13};
14
15static const struct attribute_group *e820_pmem_region_attribute_groups[] = {
16 &nd_region_attribute_group,
17 &nd_device_attribute_group,
18 NULL,
19};
20
21static int e820_pmem_remove(struct platform_device *pdev)
22{
23 struct nvdimm_bus *nvdimm_bus = platform_get_drvdata(pdev);
24
25 nvdimm_bus_unregister(nvdimm_bus);
26 return 0;
27}
28
Dan Williamsf7256dc2015-11-11 16:46:33 -080029#ifdef CONFIG_MEMORY_HOTPLUG
30static int e820_range_to_nid(resource_size_t addr)
31{
32 return memory_add_physaddr_to_nid(addr);
33}
34#else
35static int e820_range_to_nid(resource_size_t addr)
36{
37 return NUMA_NO_NODE;
38}
39#endif
40
Dan Williamsd76401a2018-06-02 11:43:39 -070041static int e820_register_one(struct resource *res, void *data)
42{
43 struct nd_region_desc ndr_desc;
44 struct nvdimm_bus *nvdimm_bus = data;
45
46 memset(&ndr_desc, 0, sizeof(ndr_desc));
47 ndr_desc.res = res;
48 ndr_desc.attr_groups = e820_pmem_region_attribute_groups;
49 ndr_desc.numa_node = e820_range_to_nid(res->start);
Dan Williams8fc5c732018-11-09 12:43:07 -080050 ndr_desc.target_node = ndr_desc.numa_node;
Dan Williamsd76401a2018-06-02 11:43:39 -070051 set_bit(ND_REGION_PAGEMAP, &ndr_desc.flags);
52 if (!nvdimm_pmem_region_create(nvdimm_bus, &ndr_desc))
53 return -ENXIO;
54 return 0;
55}
56
Dan Williams7a678322015-08-19 00:34:34 -040057static int e820_pmem_probe(struct platform_device *pdev)
58{
59 static struct nvdimm_bus_descriptor nd_desc;
60 struct device *dev = &pdev->dev;
61 struct nvdimm_bus *nvdimm_bus;
Dan Williamsd76401a2018-06-02 11:43:39 -070062 int rc = -ENXIO;
Dan Williams7a678322015-08-19 00:34:34 -040063
64 nd_desc.attr_groups = e820_pmem_attribute_groups;
65 nd_desc.provider_name = "e820";
Dan Williamsbc9775d2016-07-21 20:03:19 -070066 nd_desc.module = THIS_MODULE;
Dan Williams7a678322015-08-19 00:34:34 -040067 nvdimm_bus = nvdimm_bus_register(dev, &nd_desc);
68 if (!nvdimm_bus)
69 goto err;
70 platform_set_drvdata(pdev, nvdimm_bus);
71
Dan Williamsd76401a2018-06-02 11:43:39 -070072 rc = walk_iomem_res_desc(IORES_DESC_PERSISTENT_MEMORY_LEGACY,
73 IORESOURCE_MEM, 0, -1, nvdimm_bus, e820_register_one);
74 if (rc)
75 goto err;
Dan Williams7a678322015-08-19 00:34:34 -040076 return 0;
Dan Williamsd76401a2018-06-02 11:43:39 -070077err:
Dan Williams7a678322015-08-19 00:34:34 -040078 nvdimm_bus_unregister(nvdimm_bus);
79 dev_err(dev, "failed to register legacy persistent memory ranges\n");
Dan Williamsd76401a2018-06-02 11:43:39 -070080 return rc;
Dan Williams7a678322015-08-19 00:34:34 -040081}
82
83static struct platform_driver e820_pmem_driver = {
84 .probe = e820_pmem_probe,
85 .remove = e820_pmem_remove,
86 .driver = {
87 .name = "e820_pmem",
88 },
89};
90
Johannes Thumshirn3a71b3c2016-12-05 09:23:20 +010091module_platform_driver(e820_pmem_driver);
Dan Williams7a678322015-08-19 00:34:34 -040092
93MODULE_ALIAS("platform:e820_pmem*");
94MODULE_LICENSE("GPL v2");
95MODULE_AUTHOR("Intel Corporation");