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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001/* SPDX-License-Identifier: GPL-2.0 */
Barry Song7bf21bc2014-01-15 14:11:34 +08002#define SIRFSOC_CLKC_CLK_EN0 0x0000
3#define SIRFSOC_CLKC_CLK_EN1 0x0004
4#define SIRFSOC_CLKC_REF_CFG 0x0014
5#define SIRFSOC_CLKC_CPU_CFG 0x0018
6#define SIRFSOC_CLKC_MEM_CFG 0x001c
7#define SIRFSOC_CLKC_SYS_CFG 0x0020
8#define SIRFSOC_CLKC_IO_CFG 0x0024
9#define SIRFSOC_CLKC_DSP_CFG 0x0028
10#define SIRFSOC_CLKC_GFX_CFG 0x002c
11#define SIRFSOC_CLKC_MM_CFG 0x0030
12#define SIRFSOC_CLKC_LCD_CFG 0x0034
13#define SIRFSOC_CLKC_MMC_CFG 0x0038
14#define SIRFSOC_CLKC_PLL1_CFG0 0x0040
15#define SIRFSOC_CLKC_PLL2_CFG0 0x0044
16#define SIRFSOC_CLKC_PLL3_CFG0 0x0048
17#define SIRFSOC_CLKC_PLL1_CFG1 0x004c
18#define SIRFSOC_CLKC_PLL2_CFG1 0x0050
19#define SIRFSOC_CLKC_PLL3_CFG1 0x0054
20#define SIRFSOC_CLKC_PLL1_CFG2 0x0058
21#define SIRFSOC_CLKC_PLL2_CFG2 0x005c
22#define SIRFSOC_CLKC_PLL3_CFG2 0x0060
23#define SIRFSOC_USBPHY_PLL_CTRL 0x0008
24#define SIRFSOC_USBPHY_PLL_POWERDOWN BIT(1)
25#define SIRFSOC_USBPHY_PLL_BYPASS BIT(2)
26#define SIRFSOC_USBPHY_PLL_LOCK BIT(3)