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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002 * S390 version
Heiko Carstensa53c8fa2012-07-20 11:15:04 +02003 * Copyright IBM Corp. 1999, 2000
Linus Torvalds1da177e2005-04-16 15:20:36 -07004 * Author(s): Hartmut Penner (hp@de.ibm.com)
5 * Ulrich Weigand (weigand@de.ibm.com)
6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
7 *
8 * Derived from "include/asm-i386/pgtable.h"
9 */
10
11#ifndef _ASM_S390_PGTABLE_H
12#define _ASM_S390_PGTABLE_H
13
Linus Torvalds1da177e2005-04-16 15:20:36 -070014/*
15 * The Linux memory management assumes a three-level page table setup. For
16 * s390 31 bit we "fold" the mid level into the top-level page table, so
17 * that we physically have the same two-level page table as the s390 mmu
18 * expects in 31 bit mode. For s390 64 bit we use three of the five levels
19 * the hardware provides (region first and region second tables are not
20 * used).
21 *
22 * The "pgd_xxx()" functions are trivial for a folded two-level
23 * setup: the pgd is never bad, and a pmd always exists (as it's folded
24 * into the pgd entry)
25 *
26 * This file contains the functions and defines necessary to modify and use
27 * the S390 page table tree.
28 */
29#ifndef __ASSEMBLY__
Heiko Carstens9789db02008-07-14 09:59:11 +020030#include <linux/sched.h>
Heiko Carstens2dcea572006-09-29 01:58:41 -070031#include <linux/mm_types.h>
Martin Schwidefskyabf09be2012-11-07 13:17:37 +010032#include <linux/page-flags.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070033#include <asm/bug.h>
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +020034#include <asm/page.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070035
Linus Torvalds1da177e2005-04-16 15:20:36 -070036extern pgd_t swapper_pg_dir[] __attribute__ ((aligned (4096)));
37extern void paging_init(void);
Heiko Carstens2b67fc42007-02-05 21:16:47 +010038extern void vmem_map_init(void);
Linus Torvalds1da177e2005-04-16 15:20:36 -070039
40/*
41 * The S390 doesn't have any external MMU info: the kernel page
42 * tables contain all the necessary information.
43 */
Russell King4b3073e2009-12-18 16:40:18 +000044#define update_mmu_cache(vma, address, ptep) do { } while (0)
David Millerb113da62012-10-08 16:34:25 -070045#define update_mmu_cache_pmd(vma, address, ptep) do { } while (0)
Linus Torvalds1da177e2005-04-16 15:20:36 -070046
47/*
Martin Schwidefsky238ec4e2010-10-25 16:10:07 +020048 * ZERO_PAGE is a global shared page that is always zero; used
Linus Torvalds1da177e2005-04-16 15:20:36 -070049 * for zero-mapped memory areas etc..
50 */
Martin Schwidefsky238ec4e2010-10-25 16:10:07 +020051
52extern unsigned long empty_zero_page;
53extern unsigned long zero_page_mask;
54
55#define ZERO_PAGE(vaddr) \
56 (virt_to_page((void *)(empty_zero_page + \
57 (((unsigned long)(vaddr)) &zero_page_mask))))
Kirill A. Shutemov816422a2012-12-12 13:52:36 -080058#define __HAVE_COLOR_ZERO_PAGE
Martin Schwidefsky238ec4e2010-10-25 16:10:07 +020059
Linus Torvalds1da177e2005-04-16 15:20:36 -070060#endif /* !__ASSEMBLY__ */
61
62/*
63 * PMD_SHIFT determines the size of the area a second-level page
64 * table can map
65 * PGDIR_SHIFT determines what a third-level page table entry can map
66 */
Heiko Carstensf4815ac2012-05-23 16:24:51 +020067#ifndef CONFIG_64BIT
Martin Schwidefsky146e4b32008-02-09 18:24:35 +010068# define PMD_SHIFT 20
69# define PUD_SHIFT 20
70# define PGDIR_SHIFT 20
Heiko Carstensf4815ac2012-05-23 16:24:51 +020071#else /* CONFIG_64BIT */
Martin Schwidefsky146e4b32008-02-09 18:24:35 +010072# define PMD_SHIFT 20
Martin Schwidefsky190a1d72007-10-22 12:52:48 +020073# define PUD_SHIFT 31
Martin Schwidefsky5a216a22008-02-09 18:24:36 +010074# define PGDIR_SHIFT 42
Heiko Carstensf4815ac2012-05-23 16:24:51 +020075#endif /* CONFIG_64BIT */
Linus Torvalds1da177e2005-04-16 15:20:36 -070076
77#define PMD_SIZE (1UL << PMD_SHIFT)
78#define PMD_MASK (~(PMD_SIZE-1))
Martin Schwidefsky190a1d72007-10-22 12:52:48 +020079#define PUD_SIZE (1UL << PUD_SHIFT)
80#define PUD_MASK (~(PUD_SIZE-1))
Martin Schwidefsky5a216a22008-02-09 18:24:36 +010081#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
82#define PGDIR_MASK (~(PGDIR_SIZE-1))
Linus Torvalds1da177e2005-04-16 15:20:36 -070083
84/*
85 * entries per page directory level: the S390 is two-level, so
86 * we don't really have any PMD directory physically.
87 * for S390 segment-table entries are combined to one PGD
88 * that leads to 1024 pte per pgd
89 */
Martin Schwidefsky146e4b32008-02-09 18:24:35 +010090#define PTRS_PER_PTE 256
Heiko Carstensf4815ac2012-05-23 16:24:51 +020091#ifndef CONFIG_64BIT
Martin Schwidefsky146e4b32008-02-09 18:24:35 +010092#define PTRS_PER_PMD 1
Martin Schwidefsky5a216a22008-02-09 18:24:36 +010093#define PTRS_PER_PUD 1
Heiko Carstensf4815ac2012-05-23 16:24:51 +020094#else /* CONFIG_64BIT */
Martin Schwidefsky146e4b32008-02-09 18:24:35 +010095#define PTRS_PER_PMD 2048
Martin Schwidefsky5a216a22008-02-09 18:24:36 +010096#define PTRS_PER_PUD 2048
Heiko Carstensf4815ac2012-05-23 16:24:51 +020097#endif /* CONFIG_64BIT */
Martin Schwidefsky146e4b32008-02-09 18:24:35 +010098#define PTRS_PER_PGD 2048
Linus Torvalds1da177e2005-04-16 15:20:36 -070099
Hugh Dickinsd455a362005-04-19 13:29:23 -0700100#define FIRST_USER_ADDRESS 0
101
Linus Torvalds1da177e2005-04-16 15:20:36 -0700102#define pte_ERROR(e) \
103 printk("%s:%d: bad pte %p.\n", __FILE__, __LINE__, (void *) pte_val(e))
104#define pmd_ERROR(e) \
105 printk("%s:%d: bad pmd %p.\n", __FILE__, __LINE__, (void *) pmd_val(e))
Martin Schwidefsky190a1d72007-10-22 12:52:48 +0200106#define pud_ERROR(e) \
107 printk("%s:%d: bad pud %p.\n", __FILE__, __LINE__, (void *) pud_val(e))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700108#define pgd_ERROR(e) \
109 printk("%s:%d: bad pgd %p.\n", __FILE__, __LINE__, (void *) pgd_val(e))
110
111#ifndef __ASSEMBLY__
112/*
Heiko Carstensc972cc62012-10-05 16:52:18 +0200113 * The vmalloc and module area will always be on the topmost area of the kernel
114 * mapping. We reserve 96MB (31bit) / 128GB (64bit) for vmalloc and modules.
115 * On 64 bit kernels we have a 2GB area at the top of the vmalloc area where
116 * modules will reside. That makes sure that inter module branches always
117 * happen without trampolines and in addition the placement within a 2GB frame
118 * is branch prediction unit friendly.
Heiko Carstens8b62bc92006-12-04 15:40:56 +0100119 */
Heiko Carstens239a64252009-06-12 10:26:33 +0200120extern unsigned long VMALLOC_START;
Martin Schwidefsky14045eb2011-12-27 11:27:07 +0100121extern unsigned long VMALLOC_END;
122extern struct page *vmemmap;
Heiko Carstens239a64252009-06-12 10:26:33 +0200123
Martin Schwidefsky14045eb2011-12-27 11:27:07 +0100124#define VMEM_MAX_PHYS ((unsigned long) vmemmap)
Christian Borntraeger5fd9c6e2008-01-26 14:11:00 +0100125
Heiko Carstensc972cc62012-10-05 16:52:18 +0200126#ifdef CONFIG_64BIT
127extern unsigned long MODULES_VADDR;
128extern unsigned long MODULES_END;
129#define MODULES_VADDR MODULES_VADDR
130#define MODULES_END MODULES_END
131#define MODULES_LEN (1UL << 31)
132#endif
133
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134/*
135 * A 31 bit pagetable entry of S390 has following format:
136 * | PFRA | | OS |
137 * 0 0IP0
138 * 00000000001111111111222222222233
139 * 01234567890123456789012345678901
140 *
141 * I Page-Invalid Bit: Page is not available for address-translation
142 * P Page-Protection Bit: Store access not possible for page
143 *
144 * A 31 bit segmenttable entry of S390 has following format:
145 * | P-table origin | |PTL
146 * 0 IC
147 * 00000000001111111111222222222233
148 * 01234567890123456789012345678901
149 *
150 * I Segment-Invalid Bit: Segment is not available for address-translation
151 * C Common-Segment Bit: Segment is not private (PoP 3-30)
152 * PTL Page-Table-Length: Page-table length (PTL+1*16 entries -> up to 256)
153 *
154 * The 31 bit segmenttable origin of S390 has following format:
155 *
156 * |S-table origin | | STL |
157 * X **GPS
158 * 00000000001111111111222222222233
159 * 01234567890123456789012345678901
160 *
161 * X Space-Switch event:
162 * G Segment-Invalid Bit: *
163 * P Private-Space Bit: Segment is not private (PoP 3-30)
164 * S Storage-Alteration:
165 * STL Segment-Table-Length: Segment-table length (STL+1*16 entries -> up to 2048)
166 *
167 * A 64 bit pagetable entry of S390 has following format:
Christian Borntraeger6a985c62009-12-07 12:52:11 +0100168 * | PFRA |0IPC| OS |
Linus Torvalds1da177e2005-04-16 15:20:36 -0700169 * 0000000000111111111122222222223333333333444444444455555555556666
170 * 0123456789012345678901234567890123456789012345678901234567890123
171 *
172 * I Page-Invalid Bit: Page is not available for address-translation
173 * P Page-Protection Bit: Store access not possible for page
Christian Borntraeger6a985c62009-12-07 12:52:11 +0100174 * C Change-bit override: HW is not required to set change bit
Linus Torvalds1da177e2005-04-16 15:20:36 -0700175 *
176 * A 64 bit segmenttable entry of S390 has following format:
177 * | P-table origin | TT
178 * 0000000000111111111122222222223333333333444444444455555555556666
179 * 0123456789012345678901234567890123456789012345678901234567890123
180 *
181 * I Segment-Invalid Bit: Segment is not available for address-translation
182 * C Common-Segment Bit: Segment is not private (PoP 3-30)
183 * P Page-Protection Bit: Store access not possible for page
184 * TT Type 00
185 *
186 * A 64 bit region table entry of S390 has following format:
187 * | S-table origin | TF TTTL
188 * 0000000000111111111122222222223333333333444444444455555555556666
189 * 0123456789012345678901234567890123456789012345678901234567890123
190 *
191 * I Segment-Invalid Bit: Segment is not available for address-translation
192 * TT Type 01
193 * TF
Martin Schwidefsky190a1d72007-10-22 12:52:48 +0200194 * TL Table length
Linus Torvalds1da177e2005-04-16 15:20:36 -0700195 *
196 * The 64 bit regiontable origin of S390 has following format:
197 * | region table origon | DTTL
198 * 0000000000111111111122222222223333333333444444444455555555556666
199 * 0123456789012345678901234567890123456789012345678901234567890123
200 *
201 * X Space-Switch event:
202 * G Segment-Invalid Bit:
203 * P Private-Space Bit:
204 * S Storage-Alteration:
205 * R Real space
206 * TL Table-Length:
207 *
208 * A storage key has the following format:
209 * | ACC |F|R|C|0|
210 * 0 3 4 5 6 7
211 * ACC: access key
212 * F : fetch protection bit
213 * R : referenced bit
214 * C : changed bit
215 */
216
217/* Hardware bits in the page table entry */
Christian Borntraeger6a985c62009-12-07 12:52:11 +0100218#define _PAGE_CO 0x100 /* HW Change-bit override */
Martin Schwidefsky83377482006-10-18 18:30:51 +0200219#define _PAGE_RO 0x200 /* HW read-only bit */
220#define _PAGE_INVALID 0x400 /* HW invalid bit */
Martin Schwidefsky3610cce2007-10-22 12:52:47 +0200221
222/* Software bits in the page table entry */
Martin Schwidefsky83377482006-10-18 18:30:51 +0200223#define _PAGE_SWT 0x001 /* SW pte type bit t */
224#define _PAGE_SWX 0x002 /* SW pte type bit x */
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100225#define _PAGE_SWC 0x004 /* SW pte changed bit */
226#define _PAGE_SWR 0x008 /* SW pte referenced bit */
227#define _PAGE_SWW 0x010 /* SW pte write bit */
228#define _PAGE_SPECIAL 0x020 /* SW associated with special page */
Nick Piggina08cb622008-04-28 02:13:03 -0700229#define __HAVE_ARCH_PTE_SPECIAL
Linus Torvalds1da177e2005-04-16 15:20:36 -0700230
Nick Piggin138c9022008-07-08 11:31:06 +0200231/* Set of bits not changed in pte_modify */
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100232#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_SPECIAL | _PAGE_CO | \
233 _PAGE_SWC | _PAGE_SWR)
Nick Piggin138c9022008-07-08 11:31:06 +0200234
Martin Schwidefsky83377482006-10-18 18:30:51 +0200235/* Six different types of pages. */
Gerald Schaefer9282ed92006-09-20 15:59:37 +0200236#define _PAGE_TYPE_EMPTY 0x400
237#define _PAGE_TYPE_NONE 0x401
Martin Schwidefsky83377482006-10-18 18:30:51 +0200238#define _PAGE_TYPE_SWAP 0x403
239#define _PAGE_TYPE_FILE 0x601 /* bit 0x002 is used for offset !! */
Gerald Schaefer9282ed92006-09-20 15:59:37 +0200240#define _PAGE_TYPE_RO 0x200
241#define _PAGE_TYPE_RW 0x000
Linus Torvalds1da177e2005-04-16 15:20:36 -0700242
Martin Schwidefsky83377482006-10-18 18:30:51 +0200243/*
Gerald Schaefer53492b12008-04-30 13:38:46 +0200244 * Only four types for huge pages, using the invalid bit and protection bit
245 * of a segment table entry.
246 */
247#define _HPAGE_TYPE_EMPTY 0x020 /* _SEGMENT_ENTRY_INV */
248#define _HPAGE_TYPE_NONE 0x220
249#define _HPAGE_TYPE_RO 0x200 /* _SEGMENT_ENTRY_RO */
250#define _HPAGE_TYPE_RW 0x000
251
252/*
Martin Schwidefsky83377482006-10-18 18:30:51 +0200253 * PTE type bits are rather complicated. handle_pte_fault uses pte_present,
254 * pte_none and pte_file to find out the pte type WITHOUT holding the page
255 * table lock. ptep_clear_flush on the other hand uses ptep_clear_flush to
256 * invalidate a given pte. ipte sets the hw invalid bit and clears all tlbs
257 * for the page. The page table entry is set to _PAGE_TYPE_EMPTY afterwards.
258 * This change is done while holding the lock, but the intermediate step
259 * of a previously valid pte with the hw invalid bit set can be observed by
260 * handle_pte_fault. That makes it necessary that all valid pte types with
261 * the hw invalid bit set must be distinguishable from the four pte types
262 * empty, none, swap and file.
263 *
264 * irxt ipte irxt
265 * _PAGE_TYPE_EMPTY 1000 -> 1000
266 * _PAGE_TYPE_NONE 1001 -> 1001
267 * _PAGE_TYPE_SWAP 1011 -> 1011
268 * _PAGE_TYPE_FILE 11?1 -> 11?1
269 * _PAGE_TYPE_RO 0100 -> 1100
270 * _PAGE_TYPE_RW 0000 -> 1000
271 *
Gerald Schaeferc1821c22007-02-05 21:18:17 +0100272 * pte_none is true for bits combinations 1000, 1010, 1100, 1110
Martin Schwidefsky83377482006-10-18 18:30:51 +0200273 * pte_present is true for bits combinations 0000, 0010, 0100, 0110, 1001
274 * pte_file is true for bits combinations 1101, 1111
Gerald Schaeferc1821c22007-02-05 21:18:17 +0100275 * swap pte is 1011 and 0001, 0011, 0101, 0111 are invalid.
Martin Schwidefsky83377482006-10-18 18:30:51 +0200276 */
277
Heiko Carstensf4815ac2012-05-23 16:24:51 +0200278#ifndef CONFIG_64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -0700279
Martin Schwidefsky3610cce2007-10-22 12:52:47 +0200280/* Bits in the segment table address-space-control-element */
281#define _ASCE_SPACE_SWITCH 0x80000000UL /* space switch event */
282#define _ASCE_ORIGIN_MASK 0x7ffff000UL /* segment table origin */
283#define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
284#define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
285#define _ASCE_TABLE_LENGTH 0x7f /* 128 x 64 entries = 8k */
286
Linus Torvalds1da177e2005-04-16 15:20:36 -0700287/* Bits in the segment table entry */
Martin Schwidefsky3610cce2007-10-22 12:52:47 +0200288#define _SEGMENT_ENTRY_ORIGIN 0x7fffffc0UL /* page table origin */
Martin Schwidefsky80217142010-10-25 16:10:11 +0200289#define _SEGMENT_ENTRY_RO 0x200 /* page protection bit */
Martin Schwidefsky3610cce2007-10-22 12:52:47 +0200290#define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */
291#define _SEGMENT_ENTRY_COMMON 0x10 /* common segment bit */
292#define _SEGMENT_ENTRY_PTL 0x0f /* page table length */
293
294#define _SEGMENT_ENTRY (_SEGMENT_ENTRY_PTL)
295#define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INV)
296
Martin Schwidefsky6c61cfe2011-06-06 14:14:42 +0200297/* Page status table bits for virtualization */
298#define RCP_ACC_BITS 0xf0000000UL
299#define RCP_FP_BIT 0x08000000UL
300#define RCP_PCL_BIT 0x00800000UL
301#define RCP_HR_BIT 0x00400000UL
302#define RCP_HC_BIT 0x00200000UL
303#define RCP_GR_BIT 0x00040000UL
304#define RCP_GC_BIT 0x00020000UL
305
306/* User dirty / referenced bit for KVM's migration feature */
307#define KVM_UR_BIT 0x00008000UL
308#define KVM_UC_BIT 0x00004000UL
309
Heiko Carstensf4815ac2012-05-23 16:24:51 +0200310#else /* CONFIG_64BIT */
Martin Schwidefsky3610cce2007-10-22 12:52:47 +0200311
312/* Bits in the segment/region table address-space-control-element */
313#define _ASCE_ORIGIN ~0xfffUL/* segment table origin */
314#define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
315#define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
316#define _ASCE_SPACE_SWITCH 0x40 /* space switch event */
317#define _ASCE_REAL_SPACE 0x20 /* real space control */
318#define _ASCE_TYPE_MASK 0x0c /* asce table type mask */
319#define _ASCE_TYPE_REGION1 0x0c /* region first table type */
320#define _ASCE_TYPE_REGION2 0x08 /* region second table type */
321#define _ASCE_TYPE_REGION3 0x04 /* region third table type */
322#define _ASCE_TYPE_SEGMENT 0x00 /* segment table type */
323#define _ASCE_TABLE_LENGTH 0x03 /* region table length */
324
325/* Bits in the region table entry */
326#define _REGION_ENTRY_ORIGIN ~0xfffUL/* region/segment table origin */
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100327#define _REGION_ENTRY_RO 0x200 /* region protection bit */
Martin Schwidefsky3610cce2007-10-22 12:52:47 +0200328#define _REGION_ENTRY_INV 0x20 /* invalid region table entry */
329#define _REGION_ENTRY_TYPE_MASK 0x0c /* region/segment table type mask */
330#define _REGION_ENTRY_TYPE_R1 0x0c /* region first table type */
331#define _REGION_ENTRY_TYPE_R2 0x08 /* region second table type */
332#define _REGION_ENTRY_TYPE_R3 0x04 /* region third table type */
333#define _REGION_ENTRY_LENGTH 0x03 /* region third length */
334
335#define _REGION1_ENTRY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_LENGTH)
336#define _REGION1_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R1 | _REGION_ENTRY_INV)
337#define _REGION2_ENTRY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_LENGTH)
338#define _REGION2_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R2 | _REGION_ENTRY_INV)
339#define _REGION3_ENTRY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_LENGTH)
340#define _REGION3_ENTRY_EMPTY (_REGION_ENTRY_TYPE_R3 | _REGION_ENTRY_INV)
341
Heiko Carstens18da2362012-10-08 09:18:26 +0200342#define _REGION3_ENTRY_LARGE 0x400 /* RTTE-format control, large page */
Heiko Carstens1819ed12013-02-16 11:47:27 +0100343#define _REGION3_ENTRY_RO 0x200 /* page protection bit */
344#define _REGION3_ENTRY_CO 0x100 /* change-recording override */
Heiko Carstens18da2362012-10-08 09:18:26 +0200345
Martin Schwidefsky3610cce2007-10-22 12:52:47 +0200346/* Bits in the segment table entry */
Heiko Carstensea815312013-03-21 12:50:39 +0100347#define _SEGMENT_ENTRY_ORIGIN_LARGE ~0xfffffUL /* large page address */
Martin Schwidefsky3610cce2007-10-22 12:52:47 +0200348#define _SEGMENT_ENTRY_ORIGIN ~0x7ffUL/* segment table origin */
349#define _SEGMENT_ENTRY_RO 0x200 /* page protection bit */
350#define _SEGMENT_ENTRY_INV 0x20 /* invalid segment table entry */
351
352#define _SEGMENT_ENTRY (0)
353#define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INV)
354
Gerald Schaefer53492b12008-04-30 13:38:46 +0200355#define _SEGMENT_ENTRY_LARGE 0x400 /* STE-format control, large page */
356#define _SEGMENT_ENTRY_CO 0x100 /* change-recording override */
Gerald Schaefer75077af2012-10-08 16:30:15 -0700357#define _SEGMENT_ENTRY_SPLIT_BIT 0 /* THP splitting bit number */
358#define _SEGMENT_ENTRY_SPLIT (1UL << _SEGMENT_ENTRY_SPLIT_BIT)
Gerald Schaefer53492b12008-04-30 13:38:46 +0200359
Gerald Schaefer1ae1c1d2012-10-08 16:30:24 -0700360/* Set of bits not changed in pmd_modify */
361#define _SEGMENT_CHG_MASK (_SEGMENT_ENTRY_ORIGIN | _SEGMENT_ENTRY_LARGE \
362 | _SEGMENT_ENTRY_SPLIT | _SEGMENT_ENTRY_CO)
363
Martin Schwidefsky6c61cfe2011-06-06 14:14:42 +0200364/* Page status table bits for virtualization */
365#define RCP_ACC_BITS 0xf000000000000000UL
366#define RCP_FP_BIT 0x0800000000000000UL
367#define RCP_PCL_BIT 0x0080000000000000UL
368#define RCP_HR_BIT 0x0040000000000000UL
369#define RCP_HC_BIT 0x0020000000000000UL
370#define RCP_GR_BIT 0x0004000000000000UL
371#define RCP_GC_BIT 0x0002000000000000UL
372
373/* User dirty / referenced bit for KVM's migration feature */
374#define KVM_UR_BIT 0x0000800000000000UL
375#define KVM_UC_BIT 0x0000400000000000UL
376
Heiko Carstensf4815ac2012-05-23 16:24:51 +0200377#endif /* CONFIG_64BIT */
Martin Schwidefsky3610cce2007-10-22 12:52:47 +0200378
379/*
380 * A user page table pointer has the space-switch-event bit, the
381 * private-space-control bit and the storage-alteration-event-control
382 * bit set. A kernel page table pointer doesn't need them.
383 */
384#define _ASCE_USER_BITS (_ASCE_SPACE_SWITCH | _ASCE_PRIVATE_SPACE | \
385 _ASCE_ALT_EVENT)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700386
Linus Torvalds1da177e2005-04-16 15:20:36 -0700387/*
Gerald Schaefer9282ed92006-09-20 15:59:37 +0200388 * Page protection definitions.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700389 */
Gerald Schaefer9282ed92006-09-20 15:59:37 +0200390#define PAGE_NONE __pgprot(_PAGE_TYPE_NONE)
391#define PAGE_RO __pgprot(_PAGE_TYPE_RO)
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100392#define PAGE_RW __pgprot(_PAGE_TYPE_RO | _PAGE_SWW)
393#define PAGE_RWC __pgprot(_PAGE_TYPE_RW | _PAGE_SWW | _PAGE_SWC)
Gerald Schaefer9282ed92006-09-20 15:59:37 +0200394
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100395#define PAGE_KERNEL PAGE_RWC
Heiko Carstensbddb7ae2013-01-30 16:38:55 +0100396#define PAGE_SHARED PAGE_KERNEL
Gerald Schaefer9282ed92006-09-20 15:59:37 +0200397#define PAGE_COPY PAGE_RO
Linus Torvalds1da177e2005-04-16 15:20:36 -0700398
399/*
Martin Schwidefsky043d0702011-05-23 10:24:23 +0200400 * On s390 the page table entry has an invalid bit and a read-only bit.
401 * Read permission implies execute permission and write permission
402 * implies read permission.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700403 */
404 /*xwr*/
Gerald Schaefer9282ed92006-09-20 15:59:37 +0200405#define __P000 PAGE_NONE
406#define __P001 PAGE_RO
407#define __P010 PAGE_RO
408#define __P011 PAGE_RO
Martin Schwidefsky043d0702011-05-23 10:24:23 +0200409#define __P100 PAGE_RO
410#define __P101 PAGE_RO
411#define __P110 PAGE_RO
412#define __P111 PAGE_RO
Linus Torvalds1da177e2005-04-16 15:20:36 -0700413
Gerald Schaefer9282ed92006-09-20 15:59:37 +0200414#define __S000 PAGE_NONE
415#define __S001 PAGE_RO
416#define __S010 PAGE_RW
417#define __S011 PAGE_RW
Martin Schwidefsky043d0702011-05-23 10:24:23 +0200418#define __S100 PAGE_RO
419#define __S101 PAGE_RO
420#define __S110 PAGE_RW
421#define __S111 PAGE_RW
Linus Torvalds1da177e2005-04-16 15:20:36 -0700422
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200423static inline int mm_exclusive(struct mm_struct *mm)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700424{
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200425 return likely(mm == current->active_mm &&
426 atomic_read(&mm->context.attach_count) <= 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700427}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700428
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200429static inline int mm_has_pgste(struct mm_struct *mm)
430{
431#ifdef CONFIG_PGSTE
432 if (unlikely(mm->context.has_pgste))
433 return 1;
434#endif
435 return 0;
436}
Linus Torvalds1da177e2005-04-16 15:20:36 -0700437/*
438 * pgd/pmd/pte query functions
439 */
Heiko Carstensf4815ac2012-05-23 16:24:51 +0200440#ifndef CONFIG_64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -0700441
Adrian Bunk4448aaf2005-11-08 21:34:42 -0800442static inline int pgd_present(pgd_t pgd) { return 1; }
443static inline int pgd_none(pgd_t pgd) { return 0; }
444static inline int pgd_bad(pgd_t pgd) { return 0; }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700445
Martin Schwidefsky190a1d72007-10-22 12:52:48 +0200446static inline int pud_present(pud_t pud) { return 1; }
447static inline int pud_none(pud_t pud) { return 0; }
Heiko Carstens18da2362012-10-08 09:18:26 +0200448static inline int pud_large(pud_t pud) { return 0; }
Martin Schwidefsky190a1d72007-10-22 12:52:48 +0200449static inline int pud_bad(pud_t pud) { return 0; }
450
Heiko Carstensf4815ac2012-05-23 16:24:51 +0200451#else /* CONFIG_64BIT */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700452
Martin Schwidefsky5a216a22008-02-09 18:24:36 +0100453static inline int pgd_present(pgd_t pgd)
454{
Martin Schwidefsky6252d702008-02-09 18:24:37 +0100455 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
456 return 1;
Martin Schwidefsky5a216a22008-02-09 18:24:36 +0100457 return (pgd_val(pgd) & _REGION_ENTRY_ORIGIN) != 0UL;
458}
459
460static inline int pgd_none(pgd_t pgd)
461{
Martin Schwidefsky6252d702008-02-09 18:24:37 +0100462 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
463 return 0;
Martin Schwidefsky5a216a22008-02-09 18:24:36 +0100464 return (pgd_val(pgd) & _REGION_ENTRY_INV) != 0UL;
465}
466
467static inline int pgd_bad(pgd_t pgd)
468{
Martin Schwidefsky6252d702008-02-09 18:24:37 +0100469 /*
470 * With dynamic page table levels the pgd can be a region table
471 * entry or a segment table entry. Check for the bit that are
472 * invalid for either table entry.
473 */
Martin Schwidefsky5a216a22008-02-09 18:24:36 +0100474 unsigned long mask =
Martin Schwidefsky6252d702008-02-09 18:24:37 +0100475 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INV &
Martin Schwidefsky5a216a22008-02-09 18:24:36 +0100476 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
477 return (pgd_val(pgd) & mask) != 0;
478}
Martin Schwidefsky190a1d72007-10-22 12:52:48 +0200479
480static inline int pud_present(pud_t pud)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700481{
Martin Schwidefsky6252d702008-02-09 18:24:37 +0100482 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
483 return 1;
Martin Schwidefsky0d017922007-12-17 16:25:48 +0100484 return (pud_val(pud) & _REGION_ENTRY_ORIGIN) != 0UL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700485}
486
Martin Schwidefsky190a1d72007-10-22 12:52:48 +0200487static inline int pud_none(pud_t pud)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700488{
Martin Schwidefsky6252d702008-02-09 18:24:37 +0100489 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R3)
490 return 0;
Martin Schwidefsky0d017922007-12-17 16:25:48 +0100491 return (pud_val(pud) & _REGION_ENTRY_INV) != 0UL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700492}
493
Heiko Carstens18da2362012-10-08 09:18:26 +0200494static inline int pud_large(pud_t pud)
495{
496 if ((pud_val(pud) & _REGION_ENTRY_TYPE_MASK) != _REGION_ENTRY_TYPE_R3)
497 return 0;
498 return !!(pud_val(pud) & _REGION3_ENTRY_LARGE);
499}
500
Martin Schwidefsky190a1d72007-10-22 12:52:48 +0200501static inline int pud_bad(pud_t pud)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700502{
Martin Schwidefsky6252d702008-02-09 18:24:37 +0100503 /*
504 * With dynamic page table levels the pud can be a region table
505 * entry or a segment table entry. Check for the bit that are
506 * invalid for either table entry.
507 */
Martin Schwidefsky5a216a22008-02-09 18:24:36 +0100508 unsigned long mask =
Martin Schwidefsky6252d702008-02-09 18:24:37 +0100509 ~_SEGMENT_ENTRY_ORIGIN & ~_REGION_ENTRY_INV &
Martin Schwidefsky5a216a22008-02-09 18:24:36 +0100510 ~_REGION_ENTRY_TYPE_MASK & ~_REGION_ENTRY_LENGTH;
511 return (pud_val(pud) & mask) != 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700512}
513
Heiko Carstensf4815ac2012-05-23 16:24:51 +0200514#endif /* CONFIG_64BIT */
Martin Schwidefsky3610cce2007-10-22 12:52:47 +0200515
Adrian Bunk4448aaf2005-11-08 21:34:42 -0800516static inline int pmd_present(pmd_t pmd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700517{
Gerald Schaeferd8e7a332012-10-25 17:42:50 +0200518 unsigned long mask = _SEGMENT_ENTRY_INV | _SEGMENT_ENTRY_RO;
519 return (pmd_val(pmd) & mask) == _HPAGE_TYPE_NONE ||
520 !(pmd_val(pmd) & _SEGMENT_ENTRY_INV);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700521}
522
Adrian Bunk4448aaf2005-11-08 21:34:42 -0800523static inline int pmd_none(pmd_t pmd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700524{
Gerald Schaeferd8e7a332012-10-25 17:42:50 +0200525 return (pmd_val(pmd) & _SEGMENT_ENTRY_INV) &&
526 !(pmd_val(pmd) & _SEGMENT_ENTRY_RO);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700527}
528
Heiko Carstens378b1e72012-10-01 12:58:34 +0200529static inline int pmd_large(pmd_t pmd)
530{
531#ifdef CONFIG_64BIT
532 return !!(pmd_val(pmd) & _SEGMENT_ENTRY_LARGE);
533#else
534 return 0;
535#endif
536}
537
Adrian Bunk4448aaf2005-11-08 21:34:42 -0800538static inline int pmd_bad(pmd_t pmd)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700539{
Martin Schwidefsky3610cce2007-10-22 12:52:47 +0200540 unsigned long mask = ~_SEGMENT_ENTRY_ORIGIN & ~_SEGMENT_ENTRY_INV;
541 return (pmd_val(pmd) & mask) != _SEGMENT_ENTRY;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700542}
543
Gerald Schaefer75077af2012-10-08 16:30:15 -0700544#define __HAVE_ARCH_PMDP_SPLITTING_FLUSH
545extern void pmdp_splitting_flush(struct vm_area_struct *vma,
546 unsigned long addr, pmd_t *pmdp);
547
Gerald Schaefer1ae1c1d2012-10-08 16:30:24 -0700548#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
549extern int pmdp_set_access_flags(struct vm_area_struct *vma,
550 unsigned long address, pmd_t *pmdp,
551 pmd_t entry, int dirty);
552
553#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
554extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
555 unsigned long address, pmd_t *pmdp);
556
557#define __HAVE_ARCH_PMD_WRITE
558static inline int pmd_write(pmd_t pmd)
559{
560 return (pmd_val(pmd) & _SEGMENT_ENTRY_RO) == 0;
561}
562
563static inline int pmd_young(pmd_t pmd)
564{
565 return 0;
566}
567
Adrian Bunk4448aaf2005-11-08 21:34:42 -0800568static inline int pte_none(pte_t pte)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700569{
Martin Schwidefsky83377482006-10-18 18:30:51 +0200570 return (pte_val(pte) & _PAGE_INVALID) && !(pte_val(pte) & _PAGE_SWT);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700571}
572
Adrian Bunk4448aaf2005-11-08 21:34:42 -0800573static inline int pte_present(pte_t pte)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700574{
Martin Schwidefsky83377482006-10-18 18:30:51 +0200575 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT | _PAGE_SWX;
576 return (pte_val(pte) & mask) == _PAGE_TYPE_NONE ||
577 (!(pte_val(pte) & _PAGE_INVALID) &&
578 !(pte_val(pte) & _PAGE_SWT));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700579}
580
Adrian Bunk4448aaf2005-11-08 21:34:42 -0800581static inline int pte_file(pte_t pte)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700582{
Martin Schwidefsky83377482006-10-18 18:30:51 +0200583 unsigned long mask = _PAGE_RO | _PAGE_INVALID | _PAGE_SWT;
584 return (pte_val(pte) & mask) == _PAGE_TYPE_FILE;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700585}
586
Nick Piggin7e675132008-04-28 02:13:00 -0700587static inline int pte_special(pte_t pte)
588{
Nick Piggina08cb622008-04-28 02:13:03 -0700589 return (pte_val(pte) & _PAGE_SPECIAL);
Nick Piggin7e675132008-04-28 02:13:00 -0700590}
591
Martin Schwidefskyba8a9222007-10-22 12:52:44 +0200592#define __HAVE_ARCH_PTE_SAME
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200593static inline int pte_same(pte_t a, pte_t b)
Christian Borntraeger5b7baf02008-03-25 18:47:12 +0100594{
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200595 return pte_val(a) == pte_val(b);
Christian Borntraeger5b7baf02008-03-25 18:47:12 +0100596}
597
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200598static inline pgste_t pgste_get_lock(pte_t *ptep)
599{
600 unsigned long new = 0;
601#ifdef CONFIG_PGSTE
602 unsigned long old;
603
604 preempt_disable();
605 asm(
606 " lg %0,%2\n"
607 "0: lgr %1,%0\n"
608 " nihh %0,0xff7f\n" /* clear RCP_PCL_BIT in old */
609 " oihh %1,0x0080\n" /* set RCP_PCL_BIT in new */
610 " csg %0,%1,%2\n"
611 " jl 0b\n"
612 : "=&d" (old), "=&d" (new), "=Q" (ptep[PTRS_PER_PTE])
613 : "Q" (ptep[PTRS_PER_PTE]) : "cc");
614#endif
615 return __pgste(new);
616}
617
618static inline void pgste_set_unlock(pte_t *ptep, pgste_t pgste)
Christian Borntraeger5b7baf02008-03-25 18:47:12 +0100619{
620#ifdef CONFIG_PGSTE
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200621 asm(
622 " nihh %1,0xff7f\n" /* clear RCP_PCL_BIT */
623 " stg %1,%0\n"
624 : "=Q" (ptep[PTRS_PER_PTE])
625 : "d" (pgste_val(pgste)), "Q" (ptep[PTRS_PER_PTE]) : "cc");
Christian Borntraeger5b7baf02008-03-25 18:47:12 +0100626 preempt_enable();
627#endif
628}
629
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200630static inline pgste_t pgste_update_all(pte_t *ptep, pgste_t pgste)
Christian Borntraeger5b7baf02008-03-25 18:47:12 +0100631{
632#ifdef CONFIG_PGSTE
Heiko Carstensa43a9d92011-05-29 12:40:50 +0200633 unsigned long address, bits;
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200634 unsigned char skey;
Christian Borntraeger5b7baf02008-03-25 18:47:12 +0100635
Martin Schwidefsky09b53882011-11-14 11:19:00 +0100636 if (!pte_present(*ptep))
637 return pgste;
Heiko Carstensa43a9d92011-05-29 12:40:50 +0200638 address = pte_val(*ptep) & PAGE_MASK;
639 skey = page_get_storage_key(address);
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200640 bits = skey & (_PAGE_CHANGED | _PAGE_REFERENCED);
641 /* Clear page changed & referenced bit in the storage key */
Carsten Otte7c818782011-12-01 13:32:16 +0100642 if (bits & _PAGE_CHANGED)
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100643 page_set_storage_key(address, skey ^ bits, 0);
Carsten Otte7c818782011-12-01 13:32:16 +0100644 else if (bits)
645 page_reset_referenced(address);
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200646 /* Transfer page changed & referenced bit to guest bits in pgste */
647 pgste_val(pgste) |= bits << 48; /* RCP_GR_BIT & RCP_GC_BIT */
648 /* Get host changed & referenced bits from pgste */
649 bits |= (pgste_val(pgste) & (RCP_HR_BIT | RCP_HC_BIT)) >> 52;
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100650 /* Transfer page changed & referenced bit to kvm user bits */
651 pgste_val(pgste) |= bits << 45; /* KVM_UR_BIT & KVM_UC_BIT */
652 /* Clear relevant host bits in pgste. */
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200653 pgste_val(pgste) &= ~(RCP_HR_BIT | RCP_HC_BIT);
654 pgste_val(pgste) &= ~(RCP_ACC_BITS | RCP_FP_BIT);
655 /* Copy page access key and fetch protection bit to pgste */
656 pgste_val(pgste) |=
657 (unsigned long) (skey & (_PAGE_ACC_BITS | _PAGE_FP_BIT)) << 56;
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100658 /* Transfer referenced bit to pte */
659 pte_val(*ptep) |= (bits & _PAGE_REFERENCED) << 1;
Christian Borntraeger5b7baf02008-03-25 18:47:12 +0100660#endif
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200661 return pgste;
662
663}
664
665static inline pgste_t pgste_update_young(pte_t *ptep, pgste_t pgste)
666{
667#ifdef CONFIG_PGSTE
668 int young;
669
Martin Schwidefsky09b53882011-11-14 11:19:00 +0100670 if (!pte_present(*ptep))
671 return pgste;
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100672 /* Get referenced bit from storage key */
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200673 young = page_reset_referenced(pte_val(*ptep) & PAGE_MASK);
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100674 if (young)
675 pgste_val(pgste) |= RCP_GR_BIT;
676 /* Get host referenced bit from pgste */
677 if (pgste_val(pgste) & RCP_HR_BIT) {
678 pgste_val(pgste) &= ~RCP_HR_BIT;
679 young = 1;
680 }
681 /* Transfer referenced bit to kvm user bits and pte */
682 if (young) {
683 pgste_val(pgste) |= KVM_UR_BIT;
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200684 pte_val(*ptep) |= _PAGE_SWR;
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100685 }
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200686#endif
687 return pgste;
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200688}
689
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100690static inline void pgste_set_key(pte_t *ptep, pgste_t pgste, pte_t entry)
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200691{
692#ifdef CONFIG_PGSTE
Heiko Carstensa43a9d92011-05-29 12:40:50 +0200693 unsigned long address;
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200694 unsigned long okey, nkey;
695
Martin Schwidefsky09b53882011-11-14 11:19:00 +0100696 if (!pte_present(entry))
697 return;
698 address = pte_val(entry) & PAGE_MASK;
Heiko Carstensa43a9d92011-05-29 12:40:50 +0200699 okey = nkey = page_get_storage_key(address);
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200700 nkey &= ~(_PAGE_ACC_BITS | _PAGE_FP_BIT);
701 /* Set page access key and fetch protection bit from pgste */
702 nkey |= (pgste_val(pgste) & (RCP_ACC_BITS | RCP_FP_BIT)) >> 56;
703 if (okey != nkey)
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100704 page_set_storage_key(address, nkey, 0);
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200705#endif
706}
707
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100708static inline void pgste_set_pte(pte_t *ptep, pte_t entry)
709{
710 if (!MACHINE_HAS_ESOP && (pte_val(entry) & _PAGE_SWW)) {
711 /*
712 * Without enhanced suppression-on-protection force
713 * the dirty bit on for all writable ptes.
714 */
715 pte_val(entry) |= _PAGE_SWC;
716 pte_val(entry) &= ~_PAGE_RO;
717 }
718 *ptep = entry;
719}
720
Martin Schwidefskye5992f22011-07-24 10:48:20 +0200721/**
722 * struct gmap_struct - guest address space
723 * @mm: pointer to the parent mm_struct
724 * @table: pointer to the page directory
Christian Borntraeger480e5922011-09-20 17:07:28 +0200725 * @asce: address space control element for gmap page table
Martin Schwidefskye5992f22011-07-24 10:48:20 +0200726 * @crst_list: list of all crst tables used in the guest address space
727 */
728struct gmap {
729 struct list_head list;
730 struct mm_struct *mm;
731 unsigned long *table;
Christian Borntraeger480e5922011-09-20 17:07:28 +0200732 unsigned long asce;
Martin Schwidefskye5992f22011-07-24 10:48:20 +0200733 struct list_head crst_list;
734};
735
736/**
737 * struct gmap_rmap - reverse mapping for segment table entries
738 * @next: pointer to the next gmap_rmap structure in the list
739 * @entry: pointer to a segment table entry
740 */
741struct gmap_rmap {
742 struct list_head list;
743 unsigned long *entry;
744};
745
746/**
747 * struct gmap_pgtable - gmap information attached to a page table
748 * @vmaddr: address of the 1MB segment in the process virtual memory
749 * @mapper: list of segment table entries maping a page table
750 */
751struct gmap_pgtable {
752 unsigned long vmaddr;
753 struct list_head mapper;
754};
755
756struct gmap *gmap_alloc(struct mm_struct *mm);
757void gmap_free(struct gmap *gmap);
758void gmap_enable(struct gmap *gmap);
759void gmap_disable(struct gmap *gmap);
760int gmap_map_segment(struct gmap *gmap, unsigned long from,
761 unsigned long to, unsigned long length);
762int gmap_unmap_segment(struct gmap *gmap, unsigned long to, unsigned long len);
Carsten Otte499069e2011-10-30 15:17:02 +0100763unsigned long __gmap_fault(unsigned long address, struct gmap *);
Martin Schwidefskye5992f22011-07-24 10:48:20 +0200764unsigned long gmap_fault(unsigned long address, struct gmap *);
Christian Borntraeger388186b2011-10-30 15:17:03 +0100765void gmap_discard(unsigned long from, unsigned long to, struct gmap *);
Martin Schwidefskye5992f22011-07-24 10:48:20 +0200766
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200767/*
768 * Certain architectures need to do special things when PTEs
769 * within a page table are directly modified. Thus, the following
770 * hook is made available.
771 */
772static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
773 pte_t *ptep, pte_t entry)
774{
775 pgste_t pgste;
776
777 if (mm_has_pgste(mm)) {
778 pgste = pgste_get_lock(ptep);
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100779 pgste_set_key(ptep, pgste, entry);
780 pgste_set_pte(ptep, entry);
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200781 pgste_set_unlock(ptep, pgste);
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100782 } else {
783 if (!(pte_val(entry) & _PAGE_INVALID) && MACHINE_HAS_EDAT1)
784 pte_val(entry) |= _PAGE_CO;
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200785 *ptep = entry;
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100786 }
Christian Borntraeger5b7baf02008-03-25 18:47:12 +0100787}
788
Linus Torvalds1da177e2005-04-16 15:20:36 -0700789/*
790 * query functions pte_write/pte_dirty/pte_young only work if
791 * pte_present() is true. Undefined behaviour if not..
792 */
Adrian Bunk4448aaf2005-11-08 21:34:42 -0800793static inline int pte_write(pte_t pte)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700794{
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100795 return (pte_val(pte) & _PAGE_SWW) != 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700796}
797
Adrian Bunk4448aaf2005-11-08 21:34:42 -0800798static inline int pte_dirty(pte_t pte)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700799{
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100800 return (pte_val(pte) & _PAGE_SWC) != 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700801}
802
Adrian Bunk4448aaf2005-11-08 21:34:42 -0800803static inline int pte_young(pte_t pte)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700804{
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200805#ifdef CONFIG_PGSTE
806 if (pte_val(pte) & _PAGE_SWR)
807 return 1;
808#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700809 return 0;
810}
811
Linus Torvalds1da177e2005-04-16 15:20:36 -0700812/*
813 * pgd/pmd/pte modification functions
814 */
815
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200816static inline void pgd_clear(pgd_t *pgd)
Martin Schwidefsky5a216a22008-02-09 18:24:36 +0100817{
Heiko Carstensf4815ac2012-05-23 16:24:51 +0200818#ifdef CONFIG_64BIT
Martin Schwidefsky6252d702008-02-09 18:24:37 +0100819 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
820 pgd_val(*pgd) = _REGION2_ENTRY_EMPTY;
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200821#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700822}
823
Martin Schwidefsky6252d702008-02-09 18:24:37 +0100824static inline void pud_clear(pud_t *pud)
Gerald Schaeferc1821c22007-02-05 21:18:17 +0100825{
Heiko Carstensf4815ac2012-05-23 16:24:51 +0200826#ifdef CONFIG_64BIT
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200827 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
828 pud_val(*pud) = _REGION3_ENTRY_EMPTY;
829#endif
Gerald Schaeferc1821c22007-02-05 21:18:17 +0100830}
Martin Schwidefsky146e4b32008-02-09 18:24:35 +0100831
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200832static inline void pmd_clear(pmd_t *pmdp)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700833{
Martin Schwidefsky3610cce2007-10-22 12:52:47 +0200834 pmd_val(*pmdp) = _SEGMENT_ENTRY_EMPTY;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700835}
836
Adrian Bunk4448aaf2005-11-08 21:34:42 -0800837static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700838{
Gerald Schaefer9282ed92006-09-20 15:59:37 +0200839 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700840}
841
842/*
843 * The following pte modification functions only work if
844 * pte_present() is true. Undefined behaviour if not..
845 */
Adrian Bunk4448aaf2005-11-08 21:34:42 -0800846static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700847{
Nick Piggin138c9022008-07-08 11:31:06 +0200848 pte_val(pte) &= _PAGE_CHG_MASK;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700849 pte_val(pte) |= pgprot_val(newprot);
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100850 if ((pte_val(pte) & _PAGE_SWC) && (pte_val(pte) & _PAGE_SWW))
851 pte_val(pte) &= ~_PAGE_RO;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700852 return pte;
853}
854
Adrian Bunk4448aaf2005-11-08 21:34:42 -0800855static inline pte_t pte_wrprotect(pte_t pte)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700856{
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100857 pte_val(pte) &= ~_PAGE_SWW;
Gerald Schaefer9282ed92006-09-20 15:59:37 +0200858 /* Do not clobber _PAGE_TYPE_NONE pages! */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700859 if (!(pte_val(pte) & _PAGE_INVALID))
860 pte_val(pte) |= _PAGE_RO;
861 return pte;
862}
863
Adrian Bunk4448aaf2005-11-08 21:34:42 -0800864static inline pte_t pte_mkwrite(pte_t pte)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700865{
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100866 pte_val(pte) |= _PAGE_SWW;
867 if (pte_val(pte) & _PAGE_SWC)
868 pte_val(pte) &= ~_PAGE_RO;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700869 return pte;
870}
871
Adrian Bunk4448aaf2005-11-08 21:34:42 -0800872static inline pte_t pte_mkclean(pte_t pte)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700873{
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200874 pte_val(pte) &= ~_PAGE_SWC;
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100875 /* Do not clobber _PAGE_TYPE_NONE pages! */
876 if (!(pte_val(pte) & _PAGE_INVALID))
877 pte_val(pte) |= _PAGE_RO;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700878 return pte;
879}
880
Adrian Bunk4448aaf2005-11-08 21:34:42 -0800881static inline pte_t pte_mkdirty(pte_t pte)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700882{
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100883 pte_val(pte) |= _PAGE_SWC;
884 if (pte_val(pte) & _PAGE_SWW)
885 pte_val(pte) &= ~_PAGE_RO;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700886 return pte;
887}
888
Adrian Bunk4448aaf2005-11-08 21:34:42 -0800889static inline pte_t pte_mkold(pte_t pte)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700890{
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200891#ifdef CONFIG_PGSTE
892 pte_val(pte) &= ~_PAGE_SWR;
893#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700894 return pte;
895}
896
Adrian Bunk4448aaf2005-11-08 21:34:42 -0800897static inline pte_t pte_mkyoung(pte_t pte)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700898{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700899 return pte;
900}
901
Nick Piggin7e675132008-04-28 02:13:00 -0700902static inline pte_t pte_mkspecial(pte_t pte)
903{
Nick Piggina08cb622008-04-28 02:13:03 -0700904 pte_val(pte) |= _PAGE_SPECIAL;
Nick Piggin7e675132008-04-28 02:13:00 -0700905 return pte;
906}
907
Heiko Carstens84afdce2010-10-25 16:10:36 +0200908#ifdef CONFIG_HUGETLB_PAGE
909static inline pte_t pte_mkhuge(pte_t pte)
910{
911 /*
912 * PROT_NONE needs to be remapped from the pte type to the ste type.
913 * The HW invalid bit is also different for pte and ste. The pte
914 * invalid bit happens to be the same as the ste _SEGMENT_ENTRY_LARGE
915 * bit, so we don't have to clear it.
916 */
917 if (pte_val(pte) & _PAGE_INVALID) {
918 if (pte_val(pte) & _PAGE_SWT)
919 pte_val(pte) |= _HPAGE_TYPE_NONE;
920 pte_val(pte) |= _SEGMENT_ENTRY_INV;
921 }
922 /*
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100923 * Clear SW pte bits, there are no SW bits in a segment table entry.
Heiko Carstens84afdce2010-10-25 16:10:36 +0200924 */
Martin Schwidefskyabf09be2012-11-07 13:17:37 +0100925 pte_val(pte) &= ~(_PAGE_SWT | _PAGE_SWX | _PAGE_SWC |
926 _PAGE_SWR | _PAGE_SWW);
Heiko Carstens84afdce2010-10-25 16:10:36 +0200927 /*
928 * Also set the change-override bit because we don't need dirty bit
929 * tracking for hugetlbfs pages.
930 */
931 pte_val(pte) |= (_SEGMENT_ENTRY_LARGE | _SEGMENT_ENTRY_CO);
932 return pte;
933}
934#endif
935
Florian Funke15e86b02008-10-10 21:33:26 +0200936/*
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200937 * Get (and clear) the user dirty bit for a pte.
Florian Funke15e86b02008-10-10 21:33:26 +0200938 */
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200939static inline int ptep_test_and_clear_user_dirty(struct mm_struct *mm,
940 pte_t *ptep)
Florian Funke15e86b02008-10-10 21:33:26 +0200941{
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200942 pgste_t pgste;
943 int dirty = 0;
Florian Funke15e86b02008-10-10 21:33:26 +0200944
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200945 if (mm_has_pgste(mm)) {
946 pgste = pgste_get_lock(ptep);
947 pgste = pgste_update_all(ptep, pgste);
948 dirty = !!(pgste_val(pgste) & KVM_UC_BIT);
949 pgste_val(pgste) &= ~KVM_UC_BIT;
950 pgste_set_unlock(ptep, pgste);
951 return dirty;
Florian Funke15e86b02008-10-10 21:33:26 +0200952 }
Florian Funke15e86b02008-10-10 21:33:26 +0200953 return dirty;
954}
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200955
956/*
957 * Get (and clear) the user referenced bit for a pte.
958 */
959static inline int ptep_test_and_clear_user_young(struct mm_struct *mm,
960 pte_t *ptep)
961{
962 pgste_t pgste;
963 int young = 0;
964
965 if (mm_has_pgste(mm)) {
966 pgste = pgste_get_lock(ptep);
967 pgste = pgste_update_young(ptep, pgste);
968 young = !!(pgste_val(pgste) & KVM_UR_BIT);
969 pgste_val(pgste) &= ~KVM_UR_BIT;
970 pgste_set_unlock(ptep, pgste);
971 }
972 return young;
973}
Florian Funke15e86b02008-10-10 21:33:26 +0200974
Martin Schwidefskyba8a9222007-10-22 12:52:44 +0200975#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
976static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
977 unsigned long addr, pte_t *ptep)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700978{
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200979 pgste_t pgste;
980 pte_t pte;
Christian Borntraeger5b7baf02008-03-25 18:47:12 +0100981
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +0200982 if (mm_has_pgste(vma->vm_mm)) {
983 pgste = pgste_get_lock(ptep);
984 pgste = pgste_update_young(ptep, pgste);
985 pte = *ptep;
986 *ptep = pte_mkold(pte);
987 pgste_set_unlock(ptep, pgste);
988 return pte_young(pte);
989 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700990 return 0;
991}
992
Martin Schwidefskyba8a9222007-10-22 12:52:44 +0200993#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
994static inline int ptep_clear_flush_young(struct vm_area_struct *vma,
995 unsigned long address, pte_t *ptep)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700996{
Christian Borntraeger5b7baf02008-03-25 18:47:12 +0100997 /* No need to flush TLB
998 * On s390 reference bits are in storage key and never in TLB
999 * With virtualization we handle the reference bit, without we
1000 * we can simply return */
Christian Borntraeger5b7baf02008-03-25 18:47:12 +01001001 return ptep_test_and_clear_young(vma, address, ptep);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001002}
1003
Gerald Schaefer9282ed92006-09-20 15:59:37 +02001004static inline void __ptep_ipte(unsigned long address, pte_t *ptep)
1005{
1006 if (!(pte_val(*ptep) & _PAGE_INVALID)) {
Heiko Carstensf4815ac2012-05-23 16:24:51 +02001007#ifndef CONFIG_64BIT
Martin Schwidefsky146e4b32008-02-09 18:24:35 +01001008 /* pto must point to the start of the segment table */
Gerald Schaefer9282ed92006-09-20 15:59:37 +02001009 pte_t *pto = (pte_t *) (((unsigned long) ptep) & 0x7ffffc00);
1010#else
1011 /* ipte in zarch mode can do the math */
1012 pte_t *pto = ptep;
1013#endif
Martin Schwidefsky94c12cc2006-09-28 16:56:43 +02001014 asm volatile(
1015 " ipte %2,%3"
1016 : "=m" (*ptep) : "m" (*ptep),
1017 "a" (pto), "a" (address));
Gerald Schaefer9282ed92006-09-20 15:59:37 +02001018 }
Gerald Schaefer9282ed92006-09-20 15:59:37 +02001019}
1020
Martin Schwidefskyba8a9222007-10-22 12:52:44 +02001021/*
1022 * This is hard to understand. ptep_get_and_clear and ptep_clear_flush
1023 * both clear the TLB for the unmapped pte. The reason is that
1024 * ptep_get_and_clear is used in common code (e.g. change_pte_range)
1025 * to modify an active pte. The sequence is
1026 * 1) ptep_get_and_clear
1027 * 2) set_pte_at
1028 * 3) flush_tlb_range
1029 * On s390 the tlb needs to get flushed with the modification of the pte
1030 * if the pte is active. The only way how this can be implemented is to
1031 * have ptep_get_and_clear do the tlb flush. In exchange flush_tlb_range
1032 * is a nop.
1033 */
1034#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +02001035static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
1036 unsigned long address, pte_t *ptep)
1037{
1038 pgste_t pgste;
1039 pte_t pte;
1040
1041 mm->context.flush_mm = 1;
1042 if (mm_has_pgste(mm))
1043 pgste = pgste_get_lock(ptep);
1044
1045 pte = *ptep;
1046 if (!mm_exclusive(mm))
1047 __ptep_ipte(address, ptep);
1048 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
1049
1050 if (mm_has_pgste(mm)) {
1051 pgste = pgste_update_all(&pte, pgste);
1052 pgste_set_unlock(ptep, pgste);
1053 }
1054 return pte;
1055}
1056
1057#define __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
1058static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
1059 unsigned long address,
1060 pte_t *ptep)
1061{
1062 pte_t pte;
1063
1064 mm->context.flush_mm = 1;
1065 if (mm_has_pgste(mm))
1066 pgste_get_lock(ptep);
1067
1068 pte = *ptep;
1069 if (!mm_exclusive(mm))
1070 __ptep_ipte(address, ptep);
1071 return pte;
1072}
1073
1074static inline void ptep_modify_prot_commit(struct mm_struct *mm,
1075 unsigned long address,
1076 pte_t *ptep, pte_t pte)
1077{
Martin Schwidefskyabf09be2012-11-07 13:17:37 +01001078 if (mm_has_pgste(mm)) {
1079 pgste_set_pte(ptep, pte);
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +02001080 pgste_set_unlock(ptep, *(pgste_t *)(ptep + PTRS_PER_PTE));
Martin Schwidefskyabf09be2012-11-07 13:17:37 +01001081 } else
1082 *ptep = pte;
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +02001083}
Martin Schwidefskyba8a9222007-10-22 12:52:44 +02001084
1085#define __HAVE_ARCH_PTEP_CLEAR_FLUSH
Martin Schwidefskyf0e47c22007-07-17 04:03:03 -07001086static inline pte_t ptep_clear_flush(struct vm_area_struct *vma,
1087 unsigned long address, pte_t *ptep)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001088{
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +02001089 pgste_t pgste;
1090 pte_t pte;
1091
1092 if (mm_has_pgste(vma->vm_mm))
1093 pgste = pgste_get_lock(ptep);
1094
1095 pte = *ptep;
1096 __ptep_ipte(address, ptep);
1097 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
1098
1099 if (mm_has_pgste(vma->vm_mm)) {
1100 pgste = pgste_update_all(&pte, pgste);
1101 pgste_set_unlock(ptep, pgste);
1102 }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001103 return pte;
1104}
1105
Martin Schwidefskyba8a9222007-10-22 12:52:44 +02001106/*
1107 * The batched pte unmap code uses ptep_get_and_clear_full to clear the
1108 * ptes. Here an optimization is possible. tlb_gather_mmu flushes all
1109 * tlbs of an mm if it can guarantee that the ptes of the mm_struct
1110 * cannot be accessed while the batched unmap is running. In this case
1111 * full==1 and a simple pte_clear is enough. See tlb.h.
1112 */
1113#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
1114static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +02001115 unsigned long address,
Martin Schwidefskyba8a9222007-10-22 12:52:44 +02001116 pte_t *ptep, int full)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001117{
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +02001118 pgste_t pgste;
1119 pte_t pte;
Martin Schwidefskyba8a9222007-10-22 12:52:44 +02001120
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +02001121 if (mm_has_pgste(mm))
1122 pgste = pgste_get_lock(ptep);
1123
1124 pte = *ptep;
1125 if (!full)
1126 __ptep_ipte(address, ptep);
1127 pte_val(*ptep) = _PAGE_TYPE_EMPTY;
1128
1129 if (mm_has_pgste(mm)) {
1130 pgste = pgste_update_all(&pte, pgste);
1131 pgste_set_unlock(ptep, pgste);
1132 }
Martin Schwidefskyba8a9222007-10-22 12:52:44 +02001133 return pte;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001134}
1135
Martin Schwidefskyba8a9222007-10-22 12:52:44 +02001136#define __HAVE_ARCH_PTEP_SET_WRPROTECT
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +02001137static inline pte_t ptep_set_wrprotect(struct mm_struct *mm,
1138 unsigned long address, pte_t *ptep)
1139{
1140 pgste_t pgste;
1141 pte_t pte = *ptep;
1142
1143 if (pte_write(pte)) {
1144 mm->context.flush_mm = 1;
1145 if (mm_has_pgste(mm))
1146 pgste = pgste_get_lock(ptep);
1147
1148 if (!mm_exclusive(mm))
1149 __ptep_ipte(address, ptep);
Martin Schwidefskyabf09be2012-11-07 13:17:37 +01001150 pte = pte_wrprotect(pte);
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +02001151
Martin Schwidefskyabf09be2012-11-07 13:17:37 +01001152 if (mm_has_pgste(mm)) {
1153 pgste_set_pte(ptep, pte);
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +02001154 pgste_set_unlock(ptep, pgste);
Martin Schwidefskyabf09be2012-11-07 13:17:37 +01001155 } else
1156 *ptep = pte;
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +02001157 }
1158 return pte;
1159}
Martin Schwidefskyba8a9222007-10-22 12:52:44 +02001160
1161#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +02001162static inline int ptep_set_access_flags(struct vm_area_struct *vma,
1163 unsigned long address, pte_t *ptep,
1164 pte_t entry, int dirty)
1165{
1166 pgste_t pgste;
1167
1168 if (pte_same(*ptep, entry))
1169 return 0;
1170 if (mm_has_pgste(vma->vm_mm))
1171 pgste = pgste_get_lock(ptep);
1172
1173 __ptep_ipte(address, ptep);
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +02001174
Martin Schwidefskyabf09be2012-11-07 13:17:37 +01001175 if (mm_has_pgste(vma->vm_mm)) {
1176 pgste_set_pte(ptep, entry);
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +02001177 pgste_set_unlock(ptep, pgste);
Martin Schwidefskyabf09be2012-11-07 13:17:37 +01001178 } else
1179 *ptep = entry;
Martin Schwidefskyb2fa47e2011-05-23 10:24:40 +02001180 return 1;
1181}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001182
1183/*
Linus Torvalds1da177e2005-04-16 15:20:36 -07001184 * Conversion functions: convert a page and protection to a page entry,
1185 * and a page entry and page directory to the page they refer to.
1186 */
1187static inline pte_t mk_pte_phys(unsigned long physpage, pgprot_t pgprot)
1188{
1189 pte_t __pte;
1190 pte_val(__pte) = physpage + pgprot_val(pgprot);
1191 return __pte;
1192}
1193
Heiko Carstens2dcea572006-09-29 01:58:41 -07001194static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
1195{
Heiko Carstens0b2b6e1d2006-10-04 20:02:23 +02001196 unsigned long physpage = page_to_phys(page);
Martin Schwidefskyabf09be2012-11-07 13:17:37 +01001197 pte_t __pte = mk_pte_phys(physpage, pgprot);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001198
Martin Schwidefskyabf09be2012-11-07 13:17:37 +01001199 if ((pte_val(__pte) & _PAGE_SWW) && PageDirty(page)) {
1200 pte_val(__pte) |= _PAGE_SWC;
1201 pte_val(__pte) &= ~_PAGE_RO;
1202 }
1203 return __pte;
Heiko Carstens2dcea572006-09-29 01:58:41 -07001204}
1205
Linus Torvalds1da177e2005-04-16 15:20:36 -07001206#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
Martin Schwidefsky190a1d72007-10-22 12:52:48 +02001207#define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
1208#define pmd_index(address) (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
1209#define pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE-1))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001210
Martin Schwidefsky190a1d72007-10-22 12:52:48 +02001211#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001212#define pgd_offset_k(address) pgd_offset(&init_mm, address)
1213
Heiko Carstensf4815ac2012-05-23 16:24:51 +02001214#ifndef CONFIG_64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -07001215
Martin Schwidefsky190a1d72007-10-22 12:52:48 +02001216#define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1217#define pud_deref(pmd) ({ BUG(); 0UL; })
1218#define pgd_deref(pmd) ({ BUG(); 0UL; })
1219
1220#define pud_offset(pgd, address) ((pud_t *) pgd)
1221#define pmd_offset(pud, address) ((pmd_t *) pud + pmd_index(address))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001222
Heiko Carstensf4815ac2012-05-23 16:24:51 +02001223#else /* CONFIG_64BIT */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001224
Martin Schwidefsky190a1d72007-10-22 12:52:48 +02001225#define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1226#define pud_deref(pud) (pud_val(pud) & _REGION_ENTRY_ORIGIN)
Martin Schwidefsky5a216a22008-02-09 18:24:36 +01001227#define pgd_deref(pgd) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN)
Martin Schwidefsky190a1d72007-10-22 12:52:48 +02001228
Martin Schwidefsky5a216a22008-02-09 18:24:36 +01001229static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
1230{
Martin Schwidefsky6252d702008-02-09 18:24:37 +01001231 pud_t *pud = (pud_t *) pgd;
1232 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
1233 pud = (pud_t *) pgd_deref(*pgd);
Martin Schwidefsky5a216a22008-02-09 18:24:36 +01001234 return pud + pud_index(address);
1235}
Martin Schwidefsky190a1d72007-10-22 12:52:48 +02001236
1237static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
1238{
Martin Schwidefsky6252d702008-02-09 18:24:37 +01001239 pmd_t *pmd = (pmd_t *) pud;
1240 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
1241 pmd = (pmd_t *) pud_deref(*pud);
Martin Schwidefsky190a1d72007-10-22 12:52:48 +02001242 return pmd + pmd_index(address);
1243}
Linus Torvalds1da177e2005-04-16 15:20:36 -07001244
Heiko Carstensf4815ac2012-05-23 16:24:51 +02001245#endif /* CONFIG_64BIT */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001246
Martin Schwidefsky190a1d72007-10-22 12:52:48 +02001247#define pfn_pte(pfn,pgprot) mk_pte_phys(__pa((pfn) << PAGE_SHIFT),(pgprot))
1248#define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
1249#define pte_page(x) pfn_to_page(pte_pfn(x))
1250
1251#define pmd_page(pmd) pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT)
1252
1253/* Find an entry in the lowest level page table.. */
1254#define pte_offset(pmd, addr) ((pte_t *) pmd_deref(*(pmd)) + pte_index(addr))
1255#define pte_offset_kernel(pmd, address) pte_offset(pmd,address)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001256#define pte_offset_map(pmd, address) pte_offset_kernel(pmd, address)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001257#define pte_unmap(pte) do { } while (0)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001258
Gerald Schaefer1ae1c1d2012-10-08 16:30:24 -07001259static inline void __pmd_idte(unsigned long address, pmd_t *pmdp)
1260{
1261 unsigned long sto = (unsigned long) pmdp -
1262 pmd_index(address) * sizeof(pmd_t);
1263
1264 if (!(pmd_val(*pmdp) & _SEGMENT_ENTRY_INV)) {
1265 asm volatile(
1266 " .insn rrf,0xb98e0000,%2,%3,0,0"
1267 : "=m" (*pmdp)
1268 : "m" (*pmdp), "a" (sto),
1269 "a" ((address & HPAGE_MASK))
1270 : "cc"
1271 );
1272 }
1273}
1274
Gerald Schaefer75077af2012-10-08 16:30:15 -07001275#ifdef CONFIG_TRANSPARENT_HUGEPAGE
Gerald Schaeferd8e7a332012-10-25 17:42:50 +02001276
1277#define SEGMENT_NONE __pgprot(_HPAGE_TYPE_NONE)
1278#define SEGMENT_RO __pgprot(_HPAGE_TYPE_RO)
1279#define SEGMENT_RW __pgprot(_HPAGE_TYPE_RW)
1280
Gerald Schaefer9501d092012-10-08 16:30:18 -07001281#define __HAVE_ARCH_PGTABLE_DEPOSIT
1282extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable);
1283
1284#define __HAVE_ARCH_PGTABLE_WITHDRAW
1285extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm);
1286
Gerald Schaefer75077af2012-10-08 16:30:15 -07001287static inline int pmd_trans_splitting(pmd_t pmd)
1288{
1289 return pmd_val(pmd) & _SEGMENT_ENTRY_SPLIT;
1290}
Gerald Schaefer1ae1c1d2012-10-08 16:30:24 -07001291
1292static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
1293 pmd_t *pmdp, pmd_t entry)
1294{
Martin Schwidefskyabf09be2012-11-07 13:17:37 +01001295 if (!(pmd_val(entry) & _SEGMENT_ENTRY_INV) && MACHINE_HAS_EDAT1)
1296 pmd_val(entry) |= _SEGMENT_ENTRY_CO;
Gerald Schaefer1ae1c1d2012-10-08 16:30:24 -07001297 *pmdp = entry;
1298}
1299
1300static inline unsigned long massage_pgprot_pmd(pgprot_t pgprot)
1301{
Gerald Schaeferd8e7a332012-10-25 17:42:50 +02001302 /*
1303 * pgprot is PAGE_NONE, PAGE_RO, or PAGE_RW (see __Pxxx / __Sxxx)
1304 * Convert to segment table entry format.
1305 */
1306 if (pgprot_val(pgprot) == pgprot_val(PAGE_NONE))
1307 return pgprot_val(SEGMENT_NONE);
1308 if (pgprot_val(pgprot) == pgprot_val(PAGE_RO))
1309 return pgprot_val(SEGMENT_RO);
1310 return pgprot_val(SEGMENT_RW);
Gerald Schaefer1ae1c1d2012-10-08 16:30:24 -07001311}
1312
1313static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
1314{
1315 pmd_val(pmd) &= _SEGMENT_CHG_MASK;
1316 pmd_val(pmd) |= massage_pgprot_pmd(newprot);
1317 return pmd;
1318}
1319
1320static inline pmd_t pmd_mkhuge(pmd_t pmd)
1321{
1322 pmd_val(pmd) |= _SEGMENT_ENTRY_LARGE;
1323 return pmd;
1324}
1325
1326static inline pmd_t pmd_mkwrite(pmd_t pmd)
1327{
Gerald Schaeferd8e7a332012-10-25 17:42:50 +02001328 /* Do not clobber _HPAGE_TYPE_NONE pages! */
1329 if (!(pmd_val(pmd) & _SEGMENT_ENTRY_INV))
1330 pmd_val(pmd) &= ~_SEGMENT_ENTRY_RO;
Gerald Schaefer1ae1c1d2012-10-08 16:30:24 -07001331 return pmd;
1332}
1333
1334static inline pmd_t pmd_wrprotect(pmd_t pmd)
1335{
1336 pmd_val(pmd) |= _SEGMENT_ENTRY_RO;
1337 return pmd;
1338}
1339
1340static inline pmd_t pmd_mkdirty(pmd_t pmd)
1341{
1342 /* No dirty bit in the segment table entry. */
1343 return pmd;
1344}
1345
1346static inline pmd_t pmd_mkold(pmd_t pmd)
1347{
1348 /* No referenced bit in the segment table entry. */
1349 return pmd;
1350}
1351
1352static inline pmd_t pmd_mkyoung(pmd_t pmd)
1353{
1354 /* No referenced bit in the segment table entry. */
1355 return pmd;
1356}
1357
1358#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1359static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
1360 unsigned long address, pmd_t *pmdp)
1361{
1362 unsigned long pmd_addr = pmd_val(*pmdp) & HPAGE_MASK;
1363 long tmp, rc;
1364 int counter;
1365
1366 rc = 0;
1367 if (MACHINE_HAS_RRBM) {
1368 counter = PTRS_PER_PTE >> 6;
1369 asm volatile(
1370 "0: .insn rre,0xb9ae0000,%0,%3\n" /* rrbm */
1371 " ogr %1,%0\n"
1372 " la %3,0(%4,%3)\n"
1373 " brct %2,0b\n"
1374 : "=&d" (tmp), "+&d" (rc), "+d" (counter),
1375 "+a" (pmd_addr)
1376 : "a" (64 * 4096UL) : "cc");
1377 rc = !!rc;
1378 } else {
1379 counter = PTRS_PER_PTE;
1380 asm volatile(
1381 "0: rrbe 0,%2\n"
1382 " la %2,0(%3,%2)\n"
1383 " brc 12,1f\n"
1384 " lhi %0,1\n"
1385 "1: brct %1,0b\n"
1386 : "+d" (rc), "+d" (counter), "+a" (pmd_addr)
1387 : "a" (4096UL) : "cc");
1388 }
1389 return rc;
1390}
1391
1392#define __HAVE_ARCH_PMDP_GET_AND_CLEAR
1393static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
1394 unsigned long address, pmd_t *pmdp)
1395{
1396 pmd_t pmd = *pmdp;
1397
1398 __pmd_idte(address, pmdp);
1399 pmd_clear(pmdp);
1400 return pmd;
1401}
1402
1403#define __HAVE_ARCH_PMDP_CLEAR_FLUSH
1404static inline pmd_t pmdp_clear_flush(struct vm_area_struct *vma,
1405 unsigned long address, pmd_t *pmdp)
1406{
1407 return pmdp_get_and_clear(vma->vm_mm, address, pmdp);
1408}
1409
1410#define __HAVE_ARCH_PMDP_INVALIDATE
1411static inline void pmdp_invalidate(struct vm_area_struct *vma,
1412 unsigned long address, pmd_t *pmdp)
1413{
1414 __pmd_idte(address, pmdp);
1415}
1416
Gerald Schaeferbe328652013-01-21 16:48:07 +01001417#define __HAVE_ARCH_PMDP_SET_WRPROTECT
1418static inline void pmdp_set_wrprotect(struct mm_struct *mm,
1419 unsigned long address, pmd_t *pmdp)
1420{
1421 pmd_t pmd = *pmdp;
1422
1423 if (pmd_write(pmd)) {
1424 __pmd_idte(address, pmdp);
1425 set_pmd_at(mm, address, pmdp, pmd_wrprotect(pmd));
1426 }
1427}
1428
Gerald Schaefer1ae1c1d2012-10-08 16:30:24 -07001429static inline pmd_t mk_pmd_phys(unsigned long physpage, pgprot_t pgprot)
1430{
1431 pmd_t __pmd;
1432 pmd_val(__pmd) = physpage + massage_pgprot_pmd(pgprot);
1433 return __pmd;
1434}
1435
1436#define pfn_pmd(pfn, pgprot) mk_pmd_phys(__pa((pfn) << PAGE_SHIFT), (pgprot))
1437#define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
1438
1439static inline int pmd_trans_huge(pmd_t pmd)
1440{
1441 return pmd_val(pmd) & _SEGMENT_ENTRY_LARGE;
1442}
1443
1444static inline int has_transparent_hugepage(void)
1445{
1446 return MACHINE_HAS_HPAGE ? 1 : 0;
1447}
1448
1449static inline unsigned long pmd_pfn(pmd_t pmd)
1450{
Gerald Schaefer171c4002013-01-09 18:49:51 +01001451 return pmd_val(pmd) >> PAGE_SHIFT;
Gerald Schaefer1ae1c1d2012-10-08 16:30:24 -07001452}
Gerald Schaefer75077af2012-10-08 16:30:15 -07001453#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
1454
Linus Torvalds1da177e2005-04-16 15:20:36 -07001455/*
1456 * 31 bit swap entry format:
1457 * A page-table entry has some bits we have to treat in a special way.
1458 * Bits 0, 20 and bit 23 have to be zero, otherwise an specification
1459 * exception will occur instead of a page translation exception. The
1460 * specifiation exception has the bad habit not to store necessary
1461 * information in the lowcore.
1462 * Bit 21 and bit 22 are the page invalid bit and the page protection
1463 * bit. We set both to indicate a swapped page.
1464 * Bit 30 and 31 are used to distinguish the different page types. For
1465 * a swapped page these bits need to be zero.
1466 * This leaves the bits 1-19 and bits 24-29 to store type and offset.
1467 * We use the 5 bits from 25-29 for the type and the 20 bits from 1-19
1468 * plus 24 for the offset.
1469 * 0| offset |0110|o|type |00|
1470 * 0 0000000001111111111 2222 2 22222 33
1471 * 0 1234567890123456789 0123 4 56789 01
1472 *
1473 * 64 bit swap entry format:
1474 * A page-table entry has some bits we have to treat in a special way.
1475 * Bits 52 and bit 55 have to be zero, otherwise an specification
1476 * exception will occur instead of a page translation exception. The
1477 * specifiation exception has the bad habit not to store necessary
1478 * information in the lowcore.
1479 * Bit 53 and bit 54 are the page invalid bit and the page protection
1480 * bit. We set both to indicate a swapped page.
1481 * Bit 62 and 63 are used to distinguish the different page types. For
1482 * a swapped page these bits need to be zero.
1483 * This leaves the bits 0-51 and bits 56-61 to store type and offset.
1484 * We use the 5 bits from 57-61 for the type and the 53 bits from 0-51
1485 * plus 56 for the offset.
1486 * | offset |0110|o|type |00|
1487 * 0000000000111111111122222222223333333333444444444455 5555 5 55566 66
1488 * 0123456789012345678901234567890123456789012345678901 2345 6 78901 23
1489 */
Heiko Carstensf4815ac2012-05-23 16:24:51 +02001490#ifndef CONFIG_64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -07001491#define __SWP_OFFSET_MASK (~0UL >> 12)
1492#else
1493#define __SWP_OFFSET_MASK (~0UL >> 11)
1494#endif
Adrian Bunk4448aaf2005-11-08 21:34:42 -08001495static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001496{
1497 pte_t pte;
1498 offset &= __SWP_OFFSET_MASK;
Gerald Schaefer9282ed92006-09-20 15:59:37 +02001499 pte_val(pte) = _PAGE_TYPE_SWAP | ((type & 0x1f) << 2) |
Linus Torvalds1da177e2005-04-16 15:20:36 -07001500 ((offset & 1UL) << 7) | ((offset & ~1UL) << 11);
1501 return pte;
1502}
1503
1504#define __swp_type(entry) (((entry).val >> 2) & 0x1f)
1505#define __swp_offset(entry) (((entry).val >> 11) | (((entry).val >> 7) & 1))
1506#define __swp_entry(type,offset) ((swp_entry_t) { pte_val(mk_swap_pte((type),(offset))) })
1507
1508#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
1509#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
1510
Heiko Carstensf4815ac2012-05-23 16:24:51 +02001511#ifndef CONFIG_64BIT
Linus Torvalds1da177e2005-04-16 15:20:36 -07001512# define PTE_FILE_MAX_BITS 26
Heiko Carstensf4815ac2012-05-23 16:24:51 +02001513#else /* CONFIG_64BIT */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001514# define PTE_FILE_MAX_BITS 59
Heiko Carstensf4815ac2012-05-23 16:24:51 +02001515#endif /* CONFIG_64BIT */
Linus Torvalds1da177e2005-04-16 15:20:36 -07001516
1517#define pte_to_pgoff(__pte) \
1518 ((((__pte).pte >> 12) << 7) + (((__pte).pte >> 1) & 0x7f))
1519
1520#define pgoff_to_pte(__off) \
1521 ((pte_t) { ((((__off) & 0x7f) << 1) + (((__off) >> 7) << 12)) \
Gerald Schaefer9282ed92006-09-20 15:59:37 +02001522 | _PAGE_TYPE_FILE })
Linus Torvalds1da177e2005-04-16 15:20:36 -07001523
1524#endif /* !__ASSEMBLY__ */
1525
1526#define kern_addr_valid(addr) (1)
1527
Heiko Carstens17f34582008-04-30 13:38:47 +02001528extern int vmem_add_mapping(unsigned long start, unsigned long size);
1529extern int vmem_remove_mapping(unsigned long start, unsigned long size);
Carsten Otte402b0862008-03-25 18:47:10 +01001530extern int s390_enable_sie(void);
Heiko Carstensf4eb07c2006-12-08 15:56:07 +01001531
Linus Torvalds1da177e2005-04-16 15:20:36 -07001532/*
1533 * No page table caches to initialise
1534 */
Heiko Carstens765a0ca2013-03-23 10:29:01 +01001535static inline void pgtable_cache_init(void) { }
1536static inline void check_pgt_cache(void) { }
Linus Torvalds1da177e2005-04-16 15:20:36 -07001537
Linus Torvalds1da177e2005-04-16 15:20:36 -07001538#include <asm-generic/pgtable.h>
1539
1540#endif /* _S390_PAGE_H */