| Mark Salter | 6bbfd89 | 2011-10-04 11:18:46 -0400 | [diff] [blame^] | 1 | /* |
| 2 | * External Memory Interface |
| 3 | * |
| 4 | * Copyright (C) 2011 Texas Instruments Incorporated |
| 5 | * Author: Mark Salter <msalter@redhat.com> |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | #include <linux/of.h> |
| 12 | #include <linux/of_address.h> |
| 13 | #include <linux/io.h> |
| 14 | #include <asm/soc.h> |
| 15 | #include <asm/dscr.h> |
| 16 | |
| 17 | #define NUM_EMIFA_CHIP_ENABLES 4 |
| 18 | |
| 19 | struct emifa_regs { |
| 20 | u32 midr; |
| 21 | u32 stat; |
| 22 | u32 reserved1[6]; |
| 23 | u32 bprio; |
| 24 | u32 reserved2[23]; |
| 25 | u32 ce_config; |
| 26 | u32 cecfg[NUM_EMIFA_CHIP_ENABLES]; |
| 27 | u32 reserved3[4]; |
| 28 | u32 awcc; |
| 29 | u32 reserved4[7]; |
| 30 | u32 intraw; |
| 31 | u32 intmsk; |
| 32 | u32 intmskset; |
| 33 | u32 intmskclr; |
| 34 | }; |
| 35 | |
| 36 | static struct of_device_id emifa_match[] __initdata = { |
| 37 | { .compatible = "ti,c64x+emifa" }, |
| 38 | {} |
| 39 | }; |
| 40 | |
| 41 | /* |
| 42 | * Parse device tree for existence of an EMIF (External Memory Interface) |
| 43 | * and initialize it if found. |
| 44 | */ |
| 45 | static int __init c6x_emifa_init(void) |
| 46 | { |
| 47 | struct emifa_regs __iomem *regs; |
| 48 | struct device_node *node; |
| 49 | const __be32 *p; |
| 50 | u32 val; |
| 51 | int i, len, err; |
| 52 | |
| 53 | node = of_find_matching_node(NULL, emifa_match); |
| 54 | if (!node) |
| 55 | return 0; |
| 56 | |
| 57 | regs = of_iomap(node, 0); |
| 58 | if (!regs) |
| 59 | return 0; |
| 60 | |
| 61 | /* look for a dscr-based enable for emifa pin buffers */ |
| 62 | err = of_property_read_u32_array(node, "ti,dscr-dev-enable", &val, 1); |
| 63 | if (!err) |
| 64 | dscr_set_devstate(val, DSCR_DEVSTATE_ENABLED); |
| 65 | |
| 66 | /* set up the chip enables */ |
| 67 | p = of_get_property(node, "ti,emifa-ce-config", &len); |
| 68 | if (p) { |
| 69 | len /= sizeof(u32); |
| 70 | if (len > NUM_EMIFA_CHIP_ENABLES) |
| 71 | len = NUM_EMIFA_CHIP_ENABLES; |
| 72 | for (i = 0; i <= len; i++) |
| 73 | soc_writel(be32_to_cpup(&p[i]), ®s->cecfg[i]); |
| 74 | } |
| 75 | |
| 76 | err = of_property_read_u32_array(node, "ti,emifa-burst-priority", &val, 1); |
| 77 | if (!err) |
| 78 | soc_writel(val, ®s->bprio); |
| 79 | |
| 80 | err = of_property_read_u32_array(node, "ti,emifa-async-wait-control", &val, 1); |
| 81 | if (!err) |
| 82 | soc_writel(val, ®s->awcc); |
| 83 | |
| 84 | iounmap(regs); |
| 85 | of_node_put(node); |
| 86 | return 0; |
| 87 | } |
| 88 | pure_initcall(c6x_emifa_init); |