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Greg Kroah-Hartmanb2441312017-11-01 15:07:57 +01001# SPDX-License-Identifier: GPL-2.0
Kishon Vijay Abraham I26a84b32012-08-22 14:10:02 +05302#
3# Bus Devices
4#
5
6menu "Bus devices"
7
Geert Uytterhoeven13fbf3c2015-02-05 11:11:24 +01008config ARM_CCI
Olof Johansson47f36e42015-04-03 13:38:43 -07009 bool
10
11config ARM_CCI400_COMMON
12 bool
13 select ARM_CCI
14
Olof Johansson47f36e42015-04-03 13:38:43 -070015config ARM_CCI400_PORT_CTRL
16 bool
17 depends on ARM && OF && CPU_V7
18 select ARM_CCI400_COMMON
19 help
20 Low level power management driver for CCI400 cache coherent
21 interconnect for ARM platforms.
Geert Uytterhoeven13fbf3c2015-02-05 11:11:24 +010022
Linus Walleijccea5e82020-02-13 13:41:23 +010023config ARM_INTEGRATOR_LM
24 bool "ARM Integrator Logic Module bus"
25 depends on HAS_IOMEM
26 depends on ARCH_INTEGRATOR || COMPILE_TEST
27 default ARCH_INTEGRATOR
28 help
29 Say y here to enable support for the ARM Logic Module bus
30 found on the ARM Integrator AP (Application Platform)
31
Florian Fainelli44127b72014-05-19 13:05:59 -070032config BRCMSTB_GISB_ARB
33 bool "Broadcom STB GISB bus arbiter"
Doug Berger8c7aa172017-03-29 17:29:13 -070034 depends on ARM || ARM64 || MIPS
Florian Fainellib0ec6332016-04-16 13:46:14 -070035 default ARCH_BRCMSTB || BMIPS_GENERIC
Florian Fainelli44127b72014-05-19 13:05:59 -070036 help
37 Driver for the Broadcom Set Top Box System-on-a-chip internal bus
38 arbiter. This driver provides timeout and target abort error handling
39 and internal bus master decoding.
40
Serge Semin8f936622020-05-26 15:59:27 +030041config BT1_APB
Serge Semindc20e932020-05-28 22:31:12 +030042 bool "Baikal-T1 APB-bus driver"
Serge Semin8f936622020-05-26 15:59:27 +030043 depends on MIPS_BAIKAL_T1 || COMPILE_TEST
44 select REGMAP_MMIO
45 help
46 Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs.
47 IO requests are routed to this bus by means of the DW AMBA 3 AXI
48 Interconnect. In case of any APB protocol collisions, slave device
49 not responding on timeout an IRQ is raised with an erroneous address
50 reported to the APB terminator (APB Errors Handler Block). This
51 driver provides the interrupt handler to detect the erroneous
52 address, prints an error message about the address fault, updates an
53 errors counter. The counter and the APB-bus operations timeout can be
54 accessed via corresponding sysfs nodes.
55
Serge Semin63cb7712020-05-26 15:59:26 +030056config BT1_AXI
Serge Semin22e795b2020-05-28 22:31:13 +030057 bool "Baikal-T1 AXI-bus driver"
Serge Semin63cb7712020-05-26 15:59:26 +030058 depends on MIPS_BAIKAL_T1 || COMPILE_TEST
59 select MFD_SYSCON
60 help
61 AXI3-bus is the main communication bus connecting all high-speed
62 peripheral IP-cores with RAM controller and with MIPS P5600 cores on
63 Baikal-T1 SoC. Traffic arbitration is done by means of DW AMBA 3 AXI
64 Interconnect (so called AXI Main Interconnect) routing IO requests
65 from one SoC block to another. This driver provides a way to detect
66 any bus protocol errors and device not responding situations by
67 means of an embedded on top of the interconnect errors handler
68 block (EHB). AXI Interconnect QoS arbitration tuning is currently
69 unsupported.
70
Marek BehĂșn5bc7f992019-08-12 18:11:14 +020071config MOXTET
72 tristate "CZ.NIC Turris Mox module configuration bus"
73 depends on SPI_MASTER && OF
74 help
75 Say yes here to add support for the module configuration bus found
76 on CZ.NIC's Turris Mox. This is needed for the ability to discover
77 the order in which the modules are connected and to get/set some of
78 their settings. For example the GPIOs on Mox SFP module are
79 configured through this bus.
80
Zhichang Yuanadf38bb2018-03-21 17:23:02 -050081config HISILICON_LPC
82 bool "Support for ISA I/O space on HiSilicon Hip06/7"
John Garry3e5cd202019-11-05 01:22:18 +080083 depends on (ARM64 && ARCH_HISI) || (COMPILE_TEST && !ALPHA && !HEXAGON && !PARISC && !C6X)
84 depends on HAS_IOMEM
85 select INDIRECT_PIO if ARM64
Zhichang Yuanadf38bb2018-03-21 17:23:02 -050086 help
87 Driver to enable I/O access to devices attached to the Low Pin
88 Count bus on the HiSilicon Hip06/7 SoC.
89
Huang Shijie85bf6d42013-05-28 14:20:07 +080090config IMX_WEIM
91 bool "Freescale EIM DRIVER"
92 depends on ARCH_MXC
93 help
Alexander Shiyan3f98b6b2013-06-29 08:27:54 +040094 Driver for i.MX WEIM controller.
Huang Shijie85bf6d42013-05-28 14:20:07 +080095 The WEIM(Wireless External Interface Module) works like a bus.
96 You can attach many different devices on it, such as NOR, onenand.
Huang Shijie85bf6d42013-05-28 14:20:07 +080097
James Hogan8286ae02015-03-25 15:39:50 +000098config MIPS_CDMM
99 bool "MIPS Common Device Memory Map (CDMM) Driver"
Serge Semin16274e52020-07-14 15:57:51 +0300100 depends on CPU_MIPSR2 || CPU_MIPSR5
James Hogan8286ae02015-03-25 15:39:50 +0000101 help
102 Driver needed for the MIPS Common Device Memory Map bus in MIPS
103 cores. This bus is for per-CPU tightly coupled devices such as the
104 Fast Debug Channel (FDC).
105
106 For this to work, either your bootloader needs to enable the CDMM
107 region at an unused physical address on the boot CPU, or else your
108 platform code needs to implement mips_cdmm_phys_base() (see
109 asm/cdmm.h).
110
Thomas Petazzonifddddb52013-03-21 17:59:14 +0100111config MVEBU_MBUS
112 bool
113 depends on PLAT_ORION
114 help
115 Driver needed for the MBus configuration on Marvell EBU SoCs
116 (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP).
117
Geert Uytterhoeven13fbf3c2015-02-05 11:11:24 +0100118config OMAP_INTERCONNECT
119 tristate "OMAP INTERCONNECT DRIVER"
120 depends on ARCH_OMAP2PLUS
121
122 help
123 Driver to enable OMAP interconnect error handling driver.
124
Kishon Vijay Abraham I26a84b32012-08-22 14:10:02 +0530125config OMAP_OCP2SCP
126 tristate "OMAP OCP2SCP DRIVER"
Tony Lindgren770b6cb2012-12-16 12:28:46 -0800127 depends on ARCH_OMAP2PLUS
Kishon Vijay Abraham I26a84b32012-08-22 14:10:02 +0530128 help
129 Driver to enable ocp2scp module which transforms ocp interface
130 protocol to scp protocol. In OMAP4, USB PHY is connected via
131 OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via
132 OCP2SCP.
133
Linus Walleij335a1272016-07-08 00:11:02 +0200134config QCOM_EBI2
135 bool "Qualcomm External Bus Interface 2 (EBI2)"
Linus Walleijd6db68b2016-10-02 23:53:59 +0200136 depends on HAS_IOMEM
Linus Walleij5fac7e82016-10-04 13:56:19 +0200137 depends on ARCH_QCOM || COMPILE_TEST
Linus Walleijc5d8ccf2017-01-12 08:08:55 +0100138 default ARCH_QCOM
Linus Walleij335a1272016-07-08 00:11:02 +0200139 help
140 Say y here to enable support for the Qualcomm External Bus
141 Interface 2, which can be used to connect things like NAND Flash,
142 SRAM, ethernet adapters, FPGAs and LCD displays.
143
Geert Uytterhoeven89d463e2015-02-05 11:11:28 +0100144config SIMPLE_PM_BUS
Paul Gortmakera248efb2017-11-30 12:57:00 +0100145 tristate "Simple Power-Managed Bus Driver"
Geert Uytterhoeven89d463e2015-02-05 11:11:28 +0100146 depends on OF && PM
Santosh Shilimkar0ee72612012-09-14 14:50:34 +0530147 help
Geert Uytterhoeven89d463e2015-02-05 11:11:28 +0100148 Driver for transparent busses that don't need a real driver, but
149 where the bus controller is part of a PM domain, or under the control
150 of a functional clock, and thus relies on runtime PM for managing
151 this PM domain and/or clock.
152 An example of such a bus controller is the Renesas Bus State
153 Controller (BSC, sometimes called "LBSC within Bus Bridge", or
154 "External Bus Interface") as found on several Renesas ARM SoCs.
Pawel Molla33b0da2014-07-22 18:32:59 +0100155
Icenowy Zheng8818e862018-06-22 20:45:36 +0800156config SUN50I_DE2_BUS
157 bool "Allwinner A64 DE2 Bus Driver"
158 default ARM64
159 depends on ARCH_SUNXI
160 select SUNXI_SRAM
161 help
162 Say y here to enable support for Allwinner A64 DE2 bus driver. It's
163 mostly transparent, but a SRAM region needs to be claimed in the SRAM
164 controller to make the all blocks in the DE2 part accessible.
165
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200166config SUNXI_RSB
167 tristate "Allwinner sunXi Reduced Serial Bus Driver"
Jagan Tekidc1a37b2017-08-12 11:10:41 +0530168 default MACH_SUN8I || MACH_SUN9I || ARM64
Chen-Yu Tsaid787dcd2015-10-23 20:41:31 +0200169 depends on ARCH_SUNXI
170 select REGMAP
171 help
172 Say y here to enable support for Allwinner's Reduced Serial Bus
173 (RSB) support. This controller is responsible for communicating
174 with various RSB based devices, such as AXP223, AXP8XX PMICs,
175 and AC100/AC200 ICs.
176
Jon Hunter46a88532016-06-17 13:40:32 +0100177config TEGRA_ACONNECT
Thierry Reding2d301c02016-06-30 17:07:05 +0200178 tristate "Tegra ACONNECT Bus Driver"
Jon Hunter46a88532016-06-17 13:40:32 +0100179 depends on ARCH_TEGRA_210_SOC
180 depends on OF && PM
Jon Hunter46a88532016-06-17 13:40:32 +0100181 help
182 Driver for the Tegra ACONNECT bus which is used to interface with
183 the devices inside the Audio Processing Engine (APE) for Tegra210.
184
Mirza Krak40eb4772016-11-07 09:30:05 +0100185config TEGRA_GMI
186 tristate "Tegra Generic Memory Interface bus driver"
187 depends on ARCH_TEGRA
188 help
189 Driver for the Tegra Generic Memory Interface bus which can be used
190 to attach devices such as NOR, UART, FPGA and more.
191
David Lechner7cabf922019-09-01 17:58:22 -0500192config TI_PWMSS
193 bool
David Lechnerf2137292019-09-01 17:58:24 -0500194 default y if (ARCH_OMAP2PLUS) && (PWM_TIECAP || PWM_TIEHRPWM || TI_EQEP)
David Lechner7cabf922019-09-01 17:58:22 -0500195 help
196 PWM Subsystem driver support for AM33xx SOC.
197
198 PWM submodules require PWM config space access from submodule
199 drivers and require common parent driver support.
200
Tony Lindgren0eecc632017-10-10 14:23:43 -0700201config TI_SYSC
202 bool "TI sysc interconnect target module driver"
203 depends on ARCH_OMAP2PLUS
204 help
205 Generic driver for Texas Instruments interconnect target module
206 found on many TI SoCs.
207
Sebastien Bourdelin5b143d2a2017-11-01 13:14:33 -0400208config TS_NBUS
209 tristate "Technologic Systems NBUS Driver"
210 depends on SOC_IMX28
211 depends on OF_GPIO && PWM
212 help
213 Driver for the Technologic Systems NBUS which is used to interface
214 with the peripherals in the FPGA of the TS-4600 SoM.
215
Masahiro Yamada4b7f48d2015-12-09 15:52:59 +0900216config UNIPHIER_SYSTEM_BUS
Masahiro Yamada047a5552016-01-23 23:06:28 +0900217 tristate "UniPhier System Bus driver"
Masahiro Yamada4b7f48d2015-12-09 15:52:59 +0900218 depends on ARCH_UNIPHIER && OF
219 default y
220 help
221 Support for UniPhier System Bus, a simple external bus. This is
222 needed to use on-board devices connected to UniPhier SoCs.
223
Pawel Moll3b9334a2014-04-30 16:46:29 +0100224config VEXPRESS_CONFIG
Rob Herring70e47582020-04-29 15:58:24 -0500225 tristate "Versatile Express configuration bus"
Pawel Moll3b9334a2014-04-30 16:46:29 +0100226 default y if ARCH_VEXPRESS
227 depends on ARM || ARM64
Arnd Bergmannb33cdd22014-05-26 17:25:22 +0200228 depends on OF
Pawel Moll3b9334a2014-04-30 16:46:29 +0100229 select REGMAP
230 help
231 Platform configuration infrastructure for the ARM Ltd.
232 Versatile Express.
Bartosz Golaszewski8e7223f2016-10-31 15:45:35 +0100233
234config DA8XX_MSTPRI
235 bool "TI da8xx master peripheral priority driver"
236 depends on ARCH_DAVINCI_DA8XX
237 help
238 Driver for Texas Instruments da8xx master peripheral priority
239 configuration. Allows to adjust the priorities of all master
240 peripherals.
241
Bogdan Purcareata6bd067c2018-02-05 08:07:42 -0600242source "drivers/bus/fsl-mc/Kconfig"
Manivannan Sadhasivam0cbf2602020-02-20 15:28:40 +0530243source "drivers/bus/mhi/Kconfig"
Bogdan Purcareata6bd067c2018-02-05 08:07:42 -0600244
Kishon Vijay Abraham I26a84b32012-08-22 14:10:02 +0530245endmenu