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Thomas Gleixnerc82ee6d2019-05-19 15:51:48 +02001/* SPDX-License-Identifier: GPL-2.0-or-later */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002
3/*
Jeff Garzikaf36d7f2005-08-28 20:18:39 -04004 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
5 * Copyright 2003-2004 Jeff Garzik
6 *
Jeff Garzikaf36d7f2005-08-28 20:18:39 -04007 * libata documentation is available via 'make {ps|pdf}docs',
Mauro Carvalho Chehab9bb9a392017-05-16 09:16:37 -03008 * as Documentation/driver-api/libata.rst
Jeff Garzikaf36d7f2005-08-28 20:18:39 -04009 *
10 * Hardware documentation available from http://www.t13.org/
Linus Torvalds1da177e2005-04-16 15:20:36 -070011 */
12
13#ifndef __LINUX_ATA_H__
14#define __LINUX_ATA_H__
15
Matthew Wilcox0c659b82009-04-02 10:37:25 -040016#include <linux/kernel.h>
17#include <linux/string.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070018#include <linux/types.h>
Bartlomiej Zolnierkiewicz93734a22008-10-10 22:39:31 +020019#include <asm/byteorder.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070020
21/* defines only for the constants which don't work well as enums */
22#define ATA_DMA_BOUNDARY 0xffffUL
23#define ATA_DMA_MASK 0xffffffffULL
24
25enum {
26 /* various global constants */
27 ATA_MAX_DEVICES = 2, /* per bus/port */
28 ATA_MAX_PRD = 256, /* we could make these 256/256 */
29 ATA_SECT_SIZE = 512,
Albert Lee18d6e9d2007-04-02 11:34:15 +080030 ATA_MAX_SECTORS_128 = 128,
Jeff Garzik8b881b02006-06-11 09:59:27 -040031 ATA_MAX_SECTORS = 256,
David Milburnaf34d632015-07-13 11:48:23 -050032 ATA_MAX_SECTORS_1024 = 1024,
Tom Yan35303d52016-07-15 05:09:02 +080033 ATA_MAX_SECTORS_LBA48 = 65535,/* avoid count to be 0000h */
Tony Battersbyf8d8e572007-10-30 11:44:35 -040034 ATA_MAX_SECTORS_TAPE = 65535,
Tom Yan29838602016-07-13 04:31:23 +080035 ATA_MAX_TRIM_RNUM = 64, /* 512-byte payload / (6-byte LBA + 2-byte range per entry) */
Linus Torvalds1da177e2005-04-16 15:20:36 -070036
37 ATA_ID_WORDS = 256,
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +020038 ATA_ID_CONFIG = 0,
39 ATA_ID_CYLS = 1,
40 ATA_ID_HEADS = 3,
41 ATA_ID_SECTORS = 6,
Tejun Heoa0cf7332007-01-02 20:18:49 +090042 ATA_ID_SERNO = 10,
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +020043 ATA_ID_BUF_SIZE = 21,
Tejun Heoa0cf7332007-01-02 20:18:49 +090044 ATA_ID_FW_REV = 23,
45 ATA_ID_PROD = 27,
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +020046 ATA_ID_MAX_MULTSECT = 47,
Christoph Hellwige8f11db2017-08-29 14:42:06 +020047 ATA_ID_DWORD_IO = 48, /* before ATA-8 */
48 ATA_ID_TRUSTED = 48, /* ATA-8 and later */
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +020049 ATA_ID_CAPABILITY = 49,
Alan Cox11e29e22005-10-21 18:46:32 -040050 ATA_ID_OLD_PIO_MODES = 51,
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +020051 ATA_ID_OLD_DMA_MODES = 52,
Alan Cox11e29e22005-10-21 18:46:32 -040052 ATA_ID_FIELD_VALID = 53,
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +020053 ATA_ID_CUR_CYLS = 54,
54 ATA_ID_CUR_HEADS = 55,
55 ATA_ID_CUR_SECTORS = 56,
56 ATA_ID_MULTSECT = 59,
57 ATA_ID_LBA_CAPACITY = 60,
58 ATA_ID_SWDMA_MODES = 62,
Linus Torvalds1da177e2005-04-16 15:20:36 -070059 ATA_ID_MWDMA_MODES = 63,
Alan Cox11e29e22005-10-21 18:46:32 -040060 ATA_ID_PIO_MODES = 64,
61 ATA_ID_EIDE_DMA_MIN = 65,
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +020062 ATA_ID_EIDE_DMA_TIME = 66,
Alan Cox11e29e22005-10-21 18:46:32 -040063 ATA_ID_EIDE_PIO = 67,
64 ATA_ID_EIDE_PIO_IORDY = 68,
Martin K. Petersene78db4d2009-11-26 22:46:03 -050065 ATA_ID_ADDITIONAL_SUPP = 69,
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +020066 ATA_ID_QUEUE_DEPTH = 75,
Shane Huang583661a2012-09-07 22:38:20 +080067 ATA_ID_SATA_CAPABILITY = 76,
68 ATA_ID_SATA_CAPABILITY_2 = 77,
69 ATA_ID_FEATURE_SUPP = 78,
Alan Cox11e29e22005-10-21 18:46:32 -040070 ATA_ID_MAJOR_VER = 80,
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +020071 ATA_ID_COMMAND_SET_1 = 82,
72 ATA_ID_COMMAND_SET_2 = 83,
73 ATA_ID_CFSSE = 84,
74 ATA_ID_CFS_ENABLE_1 = 85,
75 ATA_ID_CFS_ENABLE_2 = 86,
76 ATA_ID_CSF_DEFAULT = 87,
77 ATA_ID_UDMA_MODES = 88,
78 ATA_ID_HW_CONFIG = 93,
79 ATA_ID_SPG = 98,
80 ATA_ID_LBA_CAPACITY_2 = 100,
Christoph Hellwig18f0f972009-11-17 10:00:47 -050081 ATA_ID_SECTOR_SIZE = 106,
Hannes Reinecke6b3b9d72011-03-07 08:56:44 +010082 ATA_ID_WWN = 108,
Grant Grundler295124d2010-08-17 10:56:53 -070083 ATA_ID_LOGICAL_SECTOR_SIZE = 117, /* and 118 */
Hannes Reineckefe7173c2015-03-27 16:46:36 +010084 ATA_ID_COMMAND_SET_3 = 119,
85 ATA_ID_COMMAND_SET_4 = 120,
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +020086 ATA_ID_LAST_LUN = 126,
87 ATA_ID_DLF = 128,
88 ATA_ID_CSFO = 129,
89 ATA_ID_CFA_POWER = 160,
Sergei Shtylyovd42ad152009-03-05 17:20:55 +010090 ATA_ID_CFA_KEY_MGMT = 162,
91 ATA_ID_CFA_MODES = 163,
Matthew Wilcox0c659b82009-04-02 10:37:25 -040092 ATA_ID_DATA_SET_MGMT = 169,
Shaun Tancheff7b203092016-08-21 23:23:19 -050093 ATA_ID_SCT_CMD_XPORT = 206,
Jens Axboe8bff7c62008-09-24 13:05:10 +020094 ATA_ID_ROT_SPEED = 217,
Linus Torvalds1da177e2005-04-16 15:20:36 -070095 ATA_ID_PIO4 = (1 << 1),
96
Tejun Heoa0cf7332007-01-02 20:18:49 +090097 ATA_ID_SERNO_LEN = 20,
98 ATA_ID_FW_REV_LEN = 8,
99 ATA_ID_PROD_LEN = 40,
Hannes Reinecke6b3b9d72011-03-07 08:56:44 +0100100 ATA_ID_WWN_LEN = 8,
Tejun Heoa0cf7332007-01-02 20:18:49 +0900101
Linus Torvalds1da177e2005-04-16 15:20:36 -0700102 ATA_PCI_CTL_OFS = 2,
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200103
104 ATA_PIO0 = (1 << 0),
105 ATA_PIO1 = ATA_PIO0 | (1 << 1),
106 ATA_PIO2 = ATA_PIO1 | (1 << 2),
107 ATA_PIO3 = ATA_PIO2 | (1 << 3),
108 ATA_PIO4 = ATA_PIO3 | (1 << 4),
109 ATA_PIO5 = ATA_PIO4 | (1 << 5),
110 ATA_PIO6 = ATA_PIO5 | (1 << 6),
111
Erik Inge Bolsø22ddbd12009-03-14 21:37:48 +0100112 ATA_PIO4_ONLY = (1 << 4),
113
Bartlomiej Zolnierkiewicz91a6d4e2007-08-27 19:35:22 +0200114 ATA_SWDMA0 = (1 << 0),
115 ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1),
116 ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2),
117
118 ATA_SWDMA2_ONLY = (1 << 2),
119
120 ATA_MWDMA0 = (1 << 0),
121 ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1),
122 ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2),
Erik Inge Bolsø22ddbd12009-03-14 21:37:48 +0100123 ATA_MWDMA3 = ATA_MWDMA2 | (1 << 3),
124 ATA_MWDMA4 = ATA_MWDMA3 | (1 << 4),
Bartlomiej Zolnierkiewicz91a6d4e2007-08-27 19:35:22 +0200125
126 ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2),
127 ATA_MWDMA2_ONLY = (1 << 2),
128
Linus Torvalds1da177e2005-04-16 15:20:36 -0700129 ATA_UDMA0 = (1 << 0),
130 ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
131 ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
132 ATA_UDMA3 = ATA_UDMA2 | (1 << 3),
133 ATA_UDMA4 = ATA_UDMA3 | (1 << 4),
134 ATA_UDMA5 = ATA_UDMA4 | (1 << 5),
135 ATA_UDMA6 = ATA_UDMA5 | (1 << 6),
136 ATA_UDMA7 = ATA_UDMA6 | (1 << 7),
137 /* ATA_UDMA7 is just for completeness... doesn't exist (yet?). */
138
Erik Inge Bolsø22ddbd12009-03-14 21:37:48 +0100139 ATA_UDMA24_ONLY = (1 << 2) | (1 << 4),
140
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141 ATA_UDMA_MASK_40C = ATA_UDMA2, /* udma0-2 */
142
143 /* DMA-related */
144 ATA_PRD_SZ = 8,
145 ATA_PRD_TBL_SZ = (ATA_MAX_PRD * ATA_PRD_SZ),
146 ATA_PRD_EOT = (1 << 31), /* end-of-table flag */
147
148 ATA_DMA_TABLE_OFS = 4,
149 ATA_DMA_STATUS = 2,
150 ATA_DMA_CMD = 0,
151 ATA_DMA_WR = (1 << 3),
152 ATA_DMA_START = (1 << 0),
153 ATA_DMA_INTR = (1 << 2),
154 ATA_DMA_ERR = (1 << 1),
155 ATA_DMA_ACTIVE = (1 << 0),
156
157 /* bits in ATA command block registers */
158 ATA_HOB = (1 << 7), /* LBA48 selector */
159 ATA_NIEN = (1 << 1), /* disable-irq flag */
160 ATA_LBA = (1 << 6), /* LBA28 selector */
161 ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */
162 ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */
163 ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */
164 ATA_BUSY = (1 << 7), /* BSY status bit */
165 ATA_DRDY = (1 << 6), /* device ready */
166 ATA_DF = (1 << 5), /* device fault */
Bartlomiej Zolnierkiewiczb5911622008-08-18 21:40:05 +0200167 ATA_DSC = (1 << 4), /* drive seek complete */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700168 ATA_DRQ = (1 << 3), /* data request i/o */
Bartlomiej Zolnierkiewiczb5911622008-08-18 21:40:05 +0200169 ATA_CORR = (1 << 2), /* corrected data error */
Hannes Reinecke27f00e52015-03-27 16:46:33 +0100170 ATA_SENSE = (1 << 1), /* sense code available */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700171 ATA_ERR = (1 << 0), /* have an error */
172 ATA_SRST = (1 << 2), /* software reset */
Tejun Heo9be1e972006-05-15 20:58:17 +0900173 ATA_ICRC = (1 << 7), /* interface CRC error */
Bartlomiej Zolnierkiewiczb5911622008-08-18 21:40:05 +0200174 ATA_BBK = ATA_ICRC, /* pre-EIDE: block marked bad */
Tejun Heo9be1e972006-05-15 20:58:17 +0900175 ATA_UNC = (1 << 6), /* uncorrectable media error */
Bartlomiej Zolnierkiewiczb5911622008-08-18 21:40:05 +0200176 ATA_MC = (1 << 5), /* media changed */
Tejun Heo9be1e972006-05-15 20:58:17 +0900177 ATA_IDNF = (1 << 4), /* ID not found */
Bartlomiej Zolnierkiewiczb5911622008-08-18 21:40:05 +0200178 ATA_MCR = (1 << 3), /* media change requested */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700179 ATA_ABORTED = (1 << 2), /* command aborted */
Bartlomiej Zolnierkiewiczb5911622008-08-18 21:40:05 +0200180 ATA_TRK0NF = (1 << 1), /* track 0 not found */
181 ATA_AMNF = (1 << 0), /* address mark not found */
182 ATAPI_LFS = 0xF0, /* last failed sense */
183 ATAPI_EOM = ATA_TRK0NF, /* end of media */
184 ATAPI_ILI = ATA_AMNF, /* illegal length indication */
185 ATAPI_IO = (1 << 1),
186 ATAPI_COD = (1 << 0),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700187
188 /* ATA command block registers */
189 ATA_REG_DATA = 0x00,
190 ATA_REG_ERR = 0x01,
191 ATA_REG_NSECT = 0x02,
192 ATA_REG_LBAL = 0x03,
193 ATA_REG_LBAM = 0x04,
194 ATA_REG_LBAH = 0x05,
195 ATA_REG_DEVICE = 0x06,
196 ATA_REG_STATUS = 0x07,
197
198 ATA_REG_FEATURE = ATA_REG_ERR, /* and their aliases */
199 ATA_REG_CMD = ATA_REG_STATUS,
200 ATA_REG_BYTEL = ATA_REG_LBAM,
201 ATA_REG_BYTEH = ATA_REG_LBAH,
202 ATA_REG_DEVSEL = ATA_REG_DEVICE,
203 ATA_REG_IRQ = ATA_REG_NSECT,
204
205 /* ATA device commands */
Jeff Garzikab2181c2007-05-28 08:30:36 -0400206 ATA_CMD_DEV_RESET = 0x08, /* ATAPI device reset */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700207 ATA_CMD_CHK_POWER = 0xE5, /* check power mode */
Douglas Gilbert972dcaf2005-08-11 03:35:53 -0400208 ATA_CMD_STANDBY = 0xE2, /* place in standby power mode */
209 ATA_CMD_IDLE = 0xE3, /* place in idle power mode */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700210 ATA_CMD_EDD = 0x90, /* execute device diagnostic */
Robert Hancock65211482009-07-14 20:43:39 -0600211 ATA_CMD_DOWNLOAD_MICRO = 0x92,
Robert Hancock3915c3b2013-10-21 19:26:30 -0600212 ATA_CMD_DOWNLOAD_MICRO_DMA = 0x93,
Robert Hancock65211482009-07-14 20:43:39 -0600213 ATA_CMD_NOP = 0x00,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700214 ATA_CMD_FLUSH = 0xE7,
215 ATA_CMD_FLUSH_EXT = 0xEA,
216 ATA_CMD_ID_ATA = 0xEC,
217 ATA_CMD_ID_ATAPI = 0xA1,
Robert Hancock65211482009-07-14 20:43:39 -0600218 ATA_CMD_SERVICE = 0xA2,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700219 ATA_CMD_READ = 0xC8,
220 ATA_CMD_READ_EXT = 0x25,
Robert Hancock65211482009-07-14 20:43:39 -0600221 ATA_CMD_READ_QUEUED = 0x26,
222 ATA_CMD_READ_STREAM_EXT = 0x2B,
223 ATA_CMD_READ_STREAM_DMA_EXT = 0x2A,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700224 ATA_CMD_WRITE = 0xCA,
225 ATA_CMD_WRITE_EXT = 0x35,
Robert Hancock65211482009-07-14 20:43:39 -0600226 ATA_CMD_WRITE_QUEUED = 0x36,
227 ATA_CMD_WRITE_STREAM_EXT = 0x3B,
228 ATA_CMD_WRITE_STREAM_DMA_EXT = 0x3A,
Tejun Heo9a3dccc2006-01-06 09:56:18 +0100229 ATA_CMD_WRITE_FUA_EXT = 0x3D,
Robert Hancock65211482009-07-14 20:43:39 -0600230 ATA_CMD_WRITE_QUEUED_FUA_EXT = 0x3E,
Tejun Heo88e49032006-05-15 21:03:38 +0900231 ATA_CMD_FPDMA_READ = 0x60,
232 ATA_CMD_FPDMA_WRITE = 0x61,
Hannes Reinecke661ce1f2016-04-25 12:45:45 +0200233 ATA_CMD_NCQ_NON_DATA = 0x63,
Marc Carinoed369112013-08-24 23:22:50 -0700234 ATA_CMD_FPDMA_SEND = 0x64,
235 ATA_CMD_FPDMA_RECV = 0x65,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700236 ATA_CMD_PIO_READ = 0x20,
237 ATA_CMD_PIO_READ_EXT = 0x24,
238 ATA_CMD_PIO_WRITE = 0x30,
239 ATA_CMD_PIO_WRITE_EXT = 0x34,
Albert Lee8cbd6df2005-10-12 15:06:27 +0800240 ATA_CMD_READ_MULTI = 0xC4,
241 ATA_CMD_READ_MULTI_EXT = 0x29,
242 ATA_CMD_WRITE_MULTI = 0xC5,
243 ATA_CMD_WRITE_MULTI_EXT = 0x39,
Tejun Heo9a3dccc2006-01-06 09:56:18 +0100244 ATA_CMD_WRITE_MULTI_FUA_EXT = 0xCE,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700245 ATA_CMD_SET_FEATURES = 0xEF,
Albert Lee2c3d2a42007-06-07 16:01:17 +0800246 ATA_CMD_SET_MULTI = 0xC6,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700247 ATA_CMD_PACKET = 0xA0,
248 ATA_CMD_VERIFY = 0x40,
249 ATA_CMD_VERIFY_EXT = 0x42,
Robert Hancock65211482009-07-14 20:43:39 -0600250 ATA_CMD_WRITE_UNCORR_EXT = 0x45,
Jeff Garzik2dcb4072007-10-19 06:42:56 -0400251 ATA_CMD_STANDBYNOW1 = 0xE0,
252 ATA_CMD_IDLEIMMEDIATE = 0xE1,
Tejun Heo054a5fb2007-10-25 18:30:36 +0900253 ATA_CMD_SLEEP = 0xE6,
Albert Lee8bf62ece2005-05-12 15:29:42 -0400254 ATA_CMD_INIT_DEV_PARAMS = 0x91,
Alan Coxb6782722006-03-21 15:52:49 +0000255 ATA_CMD_READ_NATIVE_MAX = 0xF8,
256 ATA_CMD_READ_NATIVE_MAX_EXT = 0x27,
Alan Cox1e999732007-04-11 00:23:13 +0100257 ATA_CMD_SET_MAX = 0xF9,
258 ATA_CMD_SET_MAX_EXT = 0x37,
Robert Hancock65211482009-07-14 20:43:39 -0600259 ATA_CMD_READ_LOG_EXT = 0x2F,
260 ATA_CMD_WRITE_LOG_EXT = 0x3F,
261 ATA_CMD_READ_LOG_DMA_EXT = 0x47,
262 ATA_CMD_WRITE_LOG_DMA_EXT = 0x57,
Robert Hancock3915c3b2013-10-21 19:26:30 -0600263 ATA_CMD_TRUSTED_NONDATA = 0x5B,
Robert Hancock65211482009-07-14 20:43:39 -0600264 ATA_CMD_TRUSTED_RCV = 0x5C,
265 ATA_CMD_TRUSTED_RCV_DMA = 0x5D,
266 ATA_CMD_TRUSTED_SND = 0x5E,
267 ATA_CMD_TRUSTED_SND_DMA = 0x5F,
Tejun Heo814600e2007-07-01 19:05:58 +0900268 ATA_CMD_PMP_READ = 0xE4,
Robert Hancock3915c3b2013-10-21 19:26:30 -0600269 ATA_CMD_PMP_READ_DMA = 0xE9,
Tejun Heo814600e2007-07-01 19:05:58 +0900270 ATA_CMD_PMP_WRITE = 0xE8,
Robert Hancock3915c3b2013-10-21 19:26:30 -0600271 ATA_CMD_PMP_WRITE_DMA = 0xEB,
Tejun Heoce2e0ab2007-12-15 15:04:59 +0900272 ATA_CMD_CONF_OVERLAY = 0xB1,
Robert Hancock65211482009-07-14 20:43:39 -0600273 ATA_CMD_SEC_SET_PASS = 0xF1,
274 ATA_CMD_SEC_UNLOCK = 0xF2,
275 ATA_CMD_SEC_ERASE_PREP = 0xF3,
276 ATA_CMD_SEC_ERASE_UNIT = 0xF4,
Tejun Heoce2e0ab2007-12-15 15:04:59 +0900277 ATA_CMD_SEC_FREEZE_LOCK = 0xF5,
Robert Hancock65211482009-07-14 20:43:39 -0600278 ATA_CMD_SEC_DISABLE_PASS = 0xF6,
279 ATA_CMD_CONFIG_STREAM = 0x51,
Bartlomiej Zolnierkiewicz476d9892008-08-18 21:40:05 +0200280 ATA_CMD_SMART = 0xB0,
281 ATA_CMD_MEDIA_LOCK = 0xDE,
282 ATA_CMD_MEDIA_UNLOCK = 0xDF,
Matthew Wilcox0c659b82009-04-02 10:37:25 -0400283 ATA_CMD_DSM = 0x06,
Robert Hancock65211482009-07-14 20:43:39 -0600284 ATA_CMD_CHK_MED_CRD_TYP = 0xD1,
285 ATA_CMD_CFA_REQ_EXT_ERR = 0x03,
286 ATA_CMD_CFA_WRITE_NE = 0x38,
287 ATA_CMD_CFA_TRANS_SECT = 0x87,
288 ATA_CMD_CFA_ERASE = 0xC0,
289 ATA_CMD_CFA_WRITE_MULT_NE = 0xCD,
Robert Hancock3915c3b2013-10-21 19:26:30 -0600290 ATA_CMD_REQ_SENSE_DATA = 0x0B,
291 ATA_CMD_SANITIZE_DEVICE = 0xB4,
Hannes Reinecke28a3fc22016-04-25 12:45:52 +0200292 ATA_CMD_ZAC_MGMT_IN = 0x4A,
Hannes Reinecke27708a92016-04-25 12:45:53 +0200293 ATA_CMD_ZAC_MGMT_OUT = 0x9F,
Robert Hancock3915c3b2013-10-21 19:26:30 -0600294
Bartlomiej Zolnierkiewicz476d9892008-08-18 21:40:05 +0200295 /* marked obsolete in the ATA/ATAPI-7 spec */
296 ATA_CMD_RESTORE = 0x10,
Tejun Heo88e49032006-05-15 21:03:38 +0900297
Hannes Reinecke5c65d8b2016-04-25 12:45:47 +0200298 /* Subcmds for ATA_CMD_FPDMA_RECV */
299 ATA_SUBCMD_FPDMA_RECV_RD_LOG_DMA_EXT = 0x01,
Hannes Reinecke28a3fc22016-04-25 12:45:52 +0200300 ATA_SUBCMD_FPDMA_RECV_ZAC_MGMT_IN = 0x02,
Hannes Reinecke5c65d8b2016-04-25 12:45:47 +0200301
Marc Carinoed369112013-08-24 23:22:50 -0700302 /* Subcmds for ATA_CMD_FPDMA_SEND */
303 ATA_SUBCMD_FPDMA_SEND_DSM = 0x00,
304 ATA_SUBCMD_FPDMA_SEND_WR_LOG_DMA_EXT = 0x02,
305
Hannes Reineckea5703842016-04-25 12:45:49 +0200306 /* Subcmds for ATA_CMD_NCQ_NON_DATA */
307 ATA_SUBCMD_NCQ_NON_DATA_ABORT_QUEUE = 0x00,
308 ATA_SUBCMD_NCQ_NON_DATA_SET_FEATURES = 0x05,
309 ATA_SUBCMD_NCQ_NON_DATA_ZERO_EXT = 0x06,
Hannes Reinecke284b3b72016-04-25 12:45:54 +0200310 ATA_SUBCMD_NCQ_NON_DATA_ZAC_MGMT_OUT = 0x07,
Hannes Reineckea5703842016-04-25 12:45:49 +0200311
Hannes Reinecke28a3fc22016-04-25 12:45:52 +0200312 /* Subcmds for ATA_CMD_ZAC_MGMT_IN */
313 ATA_SUBCMD_ZAC_MGMT_IN_REPORT_ZONES = 0x00,
314
Hannes Reinecke27708a92016-04-25 12:45:53 +0200315 /* Subcmds for ATA_CMD_ZAC_MGMT_OUT */
316 ATA_SUBCMD_ZAC_MGMT_OUT_CLOSE_ZONE = 0x01,
317 ATA_SUBCMD_ZAC_MGMT_OUT_FINISH_ZONE = 0x02,
318 ATA_SUBCMD_ZAC_MGMT_OUT_OPEN_ZONE = 0x03,
319 ATA_SUBCMD_ZAC_MGMT_OUT_RESET_WRITE_POINTER = 0x04,
320
Tejun Heo88e49032006-05-15 21:03:38 +0900321 /* READ_LOG_EXT pages */
Hannes Reineckefe5af0c2016-04-25 12:45:48 +0200322 ATA_LOG_DIRECTORY = 0x0,
Tejun Heo88e49032006-05-15 21:03:38 +0900323 ATA_LOG_SATA_NCQ = 0x10,
Christoph Hellwig1d51d5f2017-06-04 14:42:22 +0200324 ATA_LOG_NCQ_NON_DATA = 0x12,
325 ATA_LOG_NCQ_SEND_RECV = 0x13,
326 ATA_LOG_IDENTIFY_DEVICE = 0x30,
327
328 /* Identify device log pages: */
Christoph Hellwig818831c2017-06-04 14:42:24 +0200329 ATA_LOG_SECURITY = 0x06,
Shane Huang65fe1f02012-09-07 22:40:01 +0800330 ATA_LOG_SATA_SETTINGS = 0x08,
Hannes Reinecke6d1003a2016-04-25 12:45:56 +0200331 ATA_LOG_ZONED_INFORMATION = 0x09,
Christoph Hellwig1d51d5f2017-06-04 14:42:22 +0200332
333 /* Identify device SATA settings log:*/
Shane Huang803739d2012-12-17 23:18:59 +0800334 ATA_LOG_DEVSLP_OFFSET = 0x30,
335 ATA_LOG_DEVSLP_SIZE = 0x08,
336 ATA_LOG_DEVSLP_MDAT = 0x00,
Shane Huang65fe1f02012-09-07 22:40:01 +0800337 ATA_LOG_DEVSLP_MDAT_MASK = 0x1F,
Shane Huang803739d2012-12-17 23:18:59 +0800338 ATA_LOG_DEVSLP_DETO = 0x01,
339 ATA_LOG_DEVSLP_VALID = 0x07,
Shane Huang65fe1f02012-09-07 22:40:01 +0800340 ATA_LOG_DEVSLP_VALID_MASK = 0x80,
Adam Manzanares8e061782016-10-17 11:27:29 -0700341 ATA_LOG_NCQ_PRIO_OFFSET = 0x09,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700342
Marc Carinoed369112013-08-24 23:22:50 -0700343 /* NCQ send and receive log */
344 ATA_LOG_NCQ_SEND_RECV_SUBCMDS_OFFSET = 0x00,
345 ATA_LOG_NCQ_SEND_RECV_SUBCMDS_DSM = (1 << 0),
346 ATA_LOG_NCQ_SEND_RECV_DSM_OFFSET = 0x04,
347 ATA_LOG_NCQ_SEND_RECV_DSM_TRIM = (1 << 0),
348 ATA_LOG_NCQ_SEND_RECV_RD_LOG_OFFSET = 0x08,
Hannes Reinecke5c65d8b2016-04-25 12:45:47 +0200349 ATA_LOG_NCQ_SEND_RECV_RD_LOG_SUPPORTED = (1 << 0),
Marc Carinoed369112013-08-24 23:22:50 -0700350 ATA_LOG_NCQ_SEND_RECV_WR_LOG_OFFSET = 0x0C,
Hannes Reinecke5c65d8b2016-04-25 12:45:47 +0200351 ATA_LOG_NCQ_SEND_RECV_WR_LOG_SUPPORTED = (1 << 0),
Hannes Reinecke28a3fc22016-04-25 12:45:52 +0200352 ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_OFFSET = 0x10,
353 ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_OUT_SUPPORTED = (1 << 0),
354 ATA_LOG_NCQ_SEND_RECV_ZAC_MGMT_IN_SUPPORTED = (1 << 1),
355 ATA_LOG_NCQ_SEND_RECV_SIZE = 0x14,
Marc Carinoed369112013-08-24 23:22:50 -0700356
Hannes Reineckea5703842016-04-25 12:45:49 +0200357 /* NCQ Non-Data log */
358 ATA_LOG_NCQ_NON_DATA_SUBCMDS_OFFSET = 0x00,
359 ATA_LOG_NCQ_NON_DATA_ABORT_OFFSET = 0x00,
360 ATA_LOG_NCQ_NON_DATA_ABORT_NCQ = (1 << 0),
361 ATA_LOG_NCQ_NON_DATA_ABORT_ALL = (1 << 1),
362 ATA_LOG_NCQ_NON_DATA_ABORT_STREAMING = (1 << 2),
363 ATA_LOG_NCQ_NON_DATA_ABORT_NON_STREAMING = (1 << 3),
364 ATA_LOG_NCQ_NON_DATA_ABORT_SELECTED = (1 << 4),
365 ATA_LOG_NCQ_NON_DATA_ZAC_MGMT_OFFSET = 0x1C,
366 ATA_LOG_NCQ_NON_DATA_ZAC_MGMT_OUT = (1 << 0),
367 ATA_LOG_NCQ_NON_DATA_SIZE = 0x40,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700368
Mark Lord5a5dbd12007-03-16 10:22:26 -0400369 /* READ/WRITE LONG (obsolete) */
370 ATA_CMD_READ_LONG = 0x22,
371 ATA_CMD_READ_LONG_ONCE = 0x23,
372 ATA_CMD_WRITE_LONG = 0x32,
373 ATA_CMD_WRITE_LONG_ONCE = 0x33,
374
Linus Torvalds1da177e2005-04-16 15:20:36 -0700375 /* SETFEATURES stuff */
376 SETFEATURES_XFER = 0x03,
377 XFER_UDMA_7 = 0x47,
378 XFER_UDMA_6 = 0x46,
379 XFER_UDMA_5 = 0x45,
380 XFER_UDMA_4 = 0x44,
381 XFER_UDMA_3 = 0x43,
382 XFER_UDMA_2 = 0x42,
383 XFER_UDMA_1 = 0x41,
384 XFER_UDMA_0 = 0x40,
Alan Coxb352e572006-08-10 18:52:12 +0100385 XFER_MW_DMA_4 = 0x24, /* CFA only */
386 XFER_MW_DMA_3 = 0x23, /* CFA only */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700387 XFER_MW_DMA_2 = 0x22,
388 XFER_MW_DMA_1 = 0x21,
389 XFER_MW_DMA_0 = 0x20,
Alan Coxb4b52db2005-09-26 12:48:41 +0100390 XFER_SW_DMA_2 = 0x12,
391 XFER_SW_DMA_1 = 0x11,
392 XFER_SW_DMA_0 = 0x10,
Alan Coxb352e572006-08-10 18:52:12 +0100393 XFER_PIO_6 = 0x0E, /* CFA only */
394 XFER_PIO_5 = 0x0D, /* CFA only */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700395 XFER_PIO_4 = 0x0C,
396 XFER_PIO_3 = 0x0B,
397 XFER_PIO_2 = 0x0A,
398 XFER_PIO_1 = 0x09,
399 XFER_PIO_0 = 0x08,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700400 XFER_PIO_SLOW = 0x00,
401
zhao, forrest3057ac32006-06-12 12:01:34 +0800402 SETFEATURES_WC_ON = 0x02, /* Enable write cache */
403 SETFEATURES_WC_OFF = 0x82, /* Disable write cache */
404
Tom Yan0c127352016-07-12 21:37:02 +0800405 SETFEATURES_RA_ON = 0xaa, /* Enable read look-ahead */
406 SETFEATURES_RA_OFF = 0x55, /* Disable read look-ahead */
407
Bartlomiej Zolnierkiewicz476d9892008-08-18 21:40:05 +0200408 /* Enable/Disable Automatic Acoustic Management */
409 SETFEATURES_AAM_ON = 0x42,
410 SETFEATURES_AAM_OFF = 0xC2,
411
Damien Le Moal974e0a42016-04-04 12:17:09 -0400412 SETFEATURES_SPINUP = 0x07, /* Spin-up drive */
413 SETFEATURES_SPINUP_TIMEOUT = 30000, /* 30s timeout for drive spin-up from PUIS */
Mark Lord169439c2007-04-17 18:26:07 -0400414
Kristen Carlson Accardi9f45cbd2007-08-15 03:57:11 -0400415 SETFEATURES_SATA_ENABLE = 0x10, /* Enable use of SATA feature */
416 SETFEATURES_SATA_DISABLE = 0x90, /* Disable use of SATA feature */
417
418 /* SETFEATURE Sector counts for SATA features */
Tejun Heofa5b5612009-09-16 04:17:02 +0900419 SATA_FPDMA_OFFSET = 0x01, /* FPDMA non-zero buffer offsets */
Tejun Heof1bce7f2009-09-16 04:16:04 +0900420 SATA_FPDMA_AA = 0x02, /* FPDMA Setup FIS Auto-Activate */
421 SATA_DIPM = 0x03, /* Device Initiated Power Management */
Tejun Heofa5b5612009-09-16 04:17:02 +0900422 SATA_FPDMA_IN_ORDER = 0x04, /* FPDMA in-order data delivery */
Tejun Heof1bce7f2009-09-16 04:16:04 +0900423 SATA_AN = 0x05, /* Asynchronous Notification */
Tejun Heofa5b5612009-09-16 04:17:02 +0900424 SATA_SSP = 0x06, /* Software Settings Preservation */
Shane Huang65fe1f02012-09-07 22:40:01 +0800425 SATA_DEVSLP = 0x09, /* Device Sleep */
Kristen Carlson Accardi9f45cbd2007-08-15 03:57:11 -0400426
Hannes Reineckee87fd282016-04-04 11:43:55 +0200427 SETFEATURE_SENSE_DATA = 0xC3, /* Sense Data Reporting feature */
428
Tejun Heoce2e0ab2007-12-15 15:04:59 +0900429 /* feature values for SET_MAX */
430 ATA_SET_MAX_ADDR = 0x00,
431 ATA_SET_MAX_PASSWD = 0x01,
432 ATA_SET_MAX_LOCK = 0x02,
433 ATA_SET_MAX_UNLOCK = 0x03,
434 ATA_SET_MAX_FREEZE_LOCK = 0x04,
chenxiangd5c15c22017-12-28 18:20:46 +0800435 ATA_SET_MAX_PASSWD_DMA = 0x05,
436 ATA_SET_MAX_UNLOCK_DMA = 0x06,
Tejun Heoce2e0ab2007-12-15 15:04:59 +0900437
438 /* feature values for DEVICE CONFIGURATION OVERLAY */
439 ATA_DCO_RESTORE = 0xC0,
440 ATA_DCO_FREEZE_LOCK = 0xC1,
441 ATA_DCO_IDENTIFY = 0xC2,
442 ATA_DCO_SET = 0xC3,
443
Bartlomiej Zolnierkiewicz476d9892008-08-18 21:40:05 +0200444 /* feature values for SMART */
445 ATA_SMART_ENABLE = 0xD8,
446 ATA_SMART_READ_VALUES = 0xD0,
447 ATA_SMART_READ_THRESHOLDS = 0xD1,
448
Matthew Wilcox0c659b82009-04-02 10:37:25 -0400449 /* feature values for Data Set Management */
450 ATA_DSM_TRIM = 0x01,
451
Bartlomiej Zolnierkiewicz476d9892008-08-18 21:40:05 +0200452 /* password used in LBA Mid / LBA High for executing SMART commands */
453 ATA_SMART_LBAM_PASS = 0x4F,
454 ATA_SMART_LBAH_PASS = 0xC2,
455
Linus Torvalds1da177e2005-04-16 15:20:36 -0700456 /* ATAPI stuff */
457 ATAPI_PKT_DMA = (1 << 0),
458 ATAPI_DMADIR = (1 << 2), /* ATAPI data dir:
459 0=to device, 1=to host */
460 ATAPI_CDB_LEN = 16,
461
Tejun Heo814600e2007-07-01 19:05:58 +0900462 /* PMP stuff */
463 SATA_PMP_MAX_PORTS = 15,
464 SATA_PMP_CTRL_PORT = 15,
465
466 SATA_PMP_GSCR_DWORDS = 128,
467 SATA_PMP_GSCR_PROD_ID = 0,
468 SATA_PMP_GSCR_REV = 1,
469 SATA_PMP_GSCR_PORT_INFO = 2,
470 SATA_PMP_GSCR_ERROR = 32,
471 SATA_PMP_GSCR_ERROR_EN = 33,
472 SATA_PMP_GSCR_FEAT = 64,
473 SATA_PMP_GSCR_FEAT_EN = 96,
474
475 SATA_PMP_PSCR_STATUS = 0,
476 SATA_PMP_PSCR_ERROR = 1,
477 SATA_PMP_PSCR_CONTROL = 2,
478
479 SATA_PMP_FEAT_BIST = (1 << 0),
480 SATA_PMP_FEAT_PMREQ = (1 << 1),
481 SATA_PMP_FEAT_DYNSSC = (1 << 2),
482 SATA_PMP_FEAT_NOTIFY = (1 << 3),
483
Linus Torvalds1da177e2005-04-16 15:20:36 -0700484 /* cable types */
485 ATA_CBL_NONE = 0,
486 ATA_CBL_PATA40 = 1,
487 ATA_CBL_PATA80 = 2,
Tejun Heoc88f90c2007-11-27 19:43:48 +0900488 ATA_CBL_PATA40_SHORT = 3, /* 40 wire cable to high UDMA spec */
489 ATA_CBL_PATA_UNK = 4, /* don't know, maybe 80c? */
490 ATA_CBL_PATA_IGN = 5, /* don't know, ignore cable handling */
491 ATA_CBL_SATA = 6,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700492
493 /* SATA Status and Control Registers */
494 SCR_STATUS = 0,
495 SCR_ERROR = 1,
496 SCR_CONTROL = 2,
497 SCR_ACTIVE = 3,
498 SCR_NOTIFICATION = 4,
499
Tejun Heo9be1e972006-05-15 20:58:17 +0900500 /* SError bits */
501 SERR_DATA_RECOVERED = (1 << 0), /* recovered data error */
502 SERR_COMM_RECOVERED = (1 << 1), /* recovered comm failure */
503 SERR_DATA = (1 << 8), /* unrecovered data error */
504 SERR_PERSISTENT = (1 << 9), /* persistent data/comm error */
505 SERR_PROTOCOL = (1 << 10), /* protocol violation */
506 SERR_INTERNAL = (1 << 11), /* host internal error */
507 SERR_PHYRDY_CHG = (1 << 16), /* PHY RDY changed */
Robert Hancock1333e192007-10-02 11:22:02 -0400508 SERR_PHY_INT_ERR = (1 << 17), /* PHY internal error */
509 SERR_COMM_WAKE = (1 << 18), /* Comm wake */
510 SERR_10B_8B_ERR = (1 << 19), /* 10b to 8b decode error */
511 SERR_DISPARITY = (1 << 20), /* Disparity */
512 SERR_CRC = (1 << 21), /* CRC error */
513 SERR_HANDSHAKE = (1 << 22), /* Handshake error */
514 SERR_LINK_SEQ_ERR = (1 << 23), /* Link sequence error */
515 SERR_TRANS_ST_ERROR = (1 << 24), /* Transport state trans. error */
516 SERR_UNRECOG_FIS = (1 << 25), /* Unrecognized FIS */
Tejun Heo9be1e972006-05-15 20:58:17 +0900517 SERR_DEV_XCHG = (1 << 26), /* device exchanged */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700518};
519
Christoph Hellwig37f92d72016-07-16 22:16:43 +0900520enum ata_prot_flags {
521 /* protocol flags */
522 ATA_PROT_FLAG_PIO = (1 << 0), /* is PIO */
523 ATA_PROT_FLAG_DMA = (1 << 1), /* is DMA */
524 ATA_PROT_FLAG_NCQ = (1 << 2), /* is NCQ */
525 ATA_PROT_FLAG_ATAPI = (1 << 3), /* is ATAPI */
526
527 /* taskfile protocols */
528 ATA_PROT_UNKNOWN = (u8)-1,
529 ATA_PROT_NODATA = 0,
530 ATA_PROT_PIO = ATA_PROT_FLAG_PIO,
531 ATA_PROT_DMA = ATA_PROT_FLAG_DMA,
532 ATA_PROT_NCQ_NODATA = ATA_PROT_FLAG_NCQ,
533 ATA_PROT_NCQ = ATA_PROT_FLAG_DMA | ATA_PROT_FLAG_NCQ,
534 ATAPI_PROT_NODATA = ATA_PROT_FLAG_ATAPI,
535 ATAPI_PROT_PIO = ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_PIO,
536 ATAPI_PROT_DMA = ATA_PROT_FLAG_ATAPI | ATA_PROT_FLAG_DMA,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700537};
538
539enum ata_ioctls {
Arnd Bergmann287e6612016-02-11 14:16:27 +0100540 ATA_IOC_GET_IO32 = 0x309, /* HDIO_GET_32BIT */
541 ATA_IOC_SET_IO32 = 0x324, /* HDIO_SET_32BIT */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700542};
543
544/* core structures */
545
Tejun Heof60d7012010-05-10 21:41:41 +0200546struct ata_bmdma_prd {
Al Viro4ca4e432007-12-30 09:32:22 +0000547 __le32 addr;
548 __le32 flags_len;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700549};
550
Tejun Heo405e66b2007-11-27 19:28:53 +0900551/*
552 * id tests
553 */
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200554#define ata_id_is_ata(id) (((id)[ATA_ID_CONFIG] & (1 << 15)) == 0)
555#define ata_id_has_lba(id) ((id)[ATA_ID_CAPABILITY] & (1 << 9))
556#define ata_id_has_dma(id) ((id)[ATA_ID_CAPABILITY] & (1 << 8))
Shane Huang583661a2012-09-07 22:38:20 +0800557#define ata_id_has_ncq(id) ((id)[ATA_ID_SATA_CAPABILITY] & (1 << 8))
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200558#define ata_id_queue_depth(id) (((id)[ATA_ID_QUEUE_DEPTH] & 0x1f) + 1)
Nicholas Krause0628ee72014-12-21 22:36:37 -0500559#define ata_id_removable(id) ((id)[ATA_ID_CONFIG] & (1 << 7))
Tejun Heo854c73a2007-09-23 13:14:11 +0900560#define ata_id_has_atapi_AN(id) \
Shane Huang583661a2012-09-07 22:38:20 +0800561 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
562 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
563 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 5)))
Shaohua Li388539f2009-07-27 09:24:35 +0800564#define ata_id_has_fpdma_aa(id) \
Shane Huang583661a2012-09-07 22:38:20 +0800565 ((((id)[ATA_ID_SATA_CAPABILITY] != 0x0000) && \
566 ((id)[ATA_ID_SATA_CAPABILITY] != 0xffff)) && \
567 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 2)))
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200568#define ata_id_iordy_disable(id) ((id)[ATA_ID_CAPABILITY] & (1 << 10))
569#define ata_id_has_iordy(id) ((id)[ATA_ID_CAPABILITY] & (1 << 11))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700570#define ata_id_u32(id,n) \
571 (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
572#define ata_id_u64(id,n) \
573 ( ((u64) (id)[(n) + 3] << 48) | \
574 ((u64) (id)[(n) + 2] << 32) | \
575 ((u64) (id)[(n) + 1] << 16) | \
576 ((u64) (id)[(n) + 0]) )
577
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200578#define ata_id_cdb_intr(id) (((id)[ATA_ID_CONFIG] & 0x60) == 0x20)
Shane Huang583661a2012-09-07 22:38:20 +0800579#define ata_id_has_da(id) ((id)[ATA_ID_SATA_CAPABILITY_2] & (1 << 4))
Shane Huang65fe1f02012-09-07 22:40:01 +0800580#define ata_id_has_devslp(id) ((id)[ATA_ID_FEATURE_SUPP] & (1 << 8))
Hannes Reinecke5b01e4b2016-04-04 11:43:54 +0200581#define ata_id_has_ncq_autosense(id) \
582 ((id)[ATA_ID_FEATURE_SUPP] & (1 << 7))
Albert Lee312f7da2005-09-27 17:38:03 +0800583
Kristen Carlson Accardica773292007-10-25 00:58:59 -0400584static inline bool ata_id_has_hipm(const u16 *id)
585{
Shane Huang583661a2012-09-07 22:38:20 +0800586 u16 val = id[ATA_ID_SATA_CAPABILITY];
Kristen Carlson Accardica773292007-10-25 00:58:59 -0400587
588 if (val == 0 || val == 0xffff)
589 return false;
590
591 return val & (1 << 9);
592}
593
594static inline bool ata_id_has_dipm(const u16 *id)
595{
Shane Huang583661a2012-09-07 22:38:20 +0800596 u16 val = id[ATA_ID_FEATURE_SUPP];
Kristen Carlson Accardica773292007-10-25 00:58:59 -0400597
598 if (val == 0 || val == 0xffff)
599 return false;
600
601 return val & (1 << 3);
602}
603
Alan Coxae8d4ee2007-11-04 22:05:49 -0500604
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100605static inline bool ata_id_has_fua(const u16 *id)
Alan Coxc7293872007-08-22 23:31:43 +0100606{
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200607 if ((id[ATA_ID_CFSSE] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100608 return false;
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200609 return id[ATA_ID_CFSSE] & (1 << 6);
Alan Coxc7293872007-08-22 23:31:43 +0100610}
611
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100612static inline bool ata_id_has_flush(const u16 *id)
Alan Coxc7293872007-08-22 23:31:43 +0100613{
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200614 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100615 return false;
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200616 return id[ATA_ID_COMMAND_SET_2] & (1 << 12);
Alan Coxc7293872007-08-22 23:31:43 +0100617}
618
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100619static inline bool ata_id_flush_enabled(const u16 *id)
Bartlomiej Zolnierkiewicz4b58f172008-10-10 22:39:30 +0200620{
621 if (ata_id_has_flush(id) == 0)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100622 return false;
Bartlomiej Zolnierkiewicz4b58f172008-10-10 22:39:30 +0200623 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100624 return false;
Bartlomiej Zolnierkiewicz4b58f172008-10-10 22:39:30 +0200625 return id[ATA_ID_CFS_ENABLE_2] & (1 << 12);
626}
627
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100628static inline bool ata_id_has_flush_ext(const u16 *id)
Alan Coxc7293872007-08-22 23:31:43 +0100629{
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200630 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100631 return false;
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200632 return id[ATA_ID_COMMAND_SET_2] & (1 << 13);
Alan Coxc7293872007-08-22 23:31:43 +0100633}
634
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100635static inline bool ata_id_flush_ext_enabled(const u16 *id)
Bartlomiej Zolnierkiewiczff2779b2008-10-10 22:39:31 +0200636{
637 if (ata_id_has_flush_ext(id) == 0)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100638 return false;
Bartlomiej Zolnierkiewiczff2779b2008-10-10 22:39:31 +0200639 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100640 return false;
Bartlomiej Zolnierkiewiczff2779b2008-10-10 22:39:31 +0200641 /*
642 * some Maxtor disks have bit 13 defined incorrectly
643 * so check bit 10 too
644 */
645 return (id[ATA_ID_CFS_ENABLE_2] & 0x2400) == 0x2400;
646}
647
Grant Grundler295124d2010-08-17 10:56:53 -0700648static inline u32 ata_id_logical_sector_size(const u16 *id)
Christoph Hellwig18f0f972009-11-17 10:00:47 -0500649{
Grant Grundler295124d2010-08-17 10:56:53 -0700650 /* T13/1699-D Revision 6a, Sep 6, 2008. Page 128.
651 * IDENTIFY DEVICE data, word 117-118.
652 * 0xd000 ignores bit 13 (logical:physical > 1)
653 */
654 if ((id[ATA_ID_SECTOR_SIZE] & 0xd000) == 0x5000)
655 return (((id[ATA_ID_LOGICAL_SECTOR_SIZE+1] << 16)
656 + id[ATA_ID_LOGICAL_SECTOR_SIZE]) * sizeof(u16)) ;
657 return ATA_SECT_SIZE;
Christoph Hellwig18f0f972009-11-17 10:00:47 -0500658}
659
Grant Grundler295124d2010-08-17 10:56:53 -0700660static inline u8 ata_id_log2_per_physical_sector(const u16 *id)
Christoph Hellwig18f0f972009-11-17 10:00:47 -0500661{
Grant Grundler295124d2010-08-17 10:56:53 -0700662 /* T13/1699-D Revision 6a, Sep 6, 2008. Page 128.
663 * IDENTIFY DEVICE data, word 106.
664 * 0xe000 ignores bit 12 (logical sector > 512 bytes)
665 */
666 if ((id[ATA_ID_SECTOR_SIZE] & 0xe000) == 0x6000)
667 return (id[ATA_ID_SECTOR_SIZE] & 0xf);
668 return 0;
669}
670
671/* Offset of logical sectors relative to physical sectors.
672 *
673 * If device has more than one logical sector per physical sector
674 * (aka 512 byte emulation), vendors might offset the "sector 0" address
675 * so sector 63 is "naturally aligned" - e.g. FAT partition table.
676 * This avoids Read/Mod/Write penalties when using FAT partition table
677 * and updating "well aligned" (FS perspective) physical sectors on every
678 * transaction.
679 */
680static inline u16 ata_id_logical_sector_offset(const u16 *id,
681 u8 log2_per_phys)
682{
683 u16 word_209 = id[209];
684
685 if ((log2_per_phys > 1) && (word_209 & 0xc000) == 0x4000) {
686 u16 first = word_209 & 0x3fff;
687 if (first > 0)
688 return (1 << log2_per_phys) - first;
689 }
690 return 0;
Christoph Hellwig18f0f972009-11-17 10:00:47 -0500691}
692
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100693static inline bool ata_id_has_lba48(const u16 *id)
Alan Coxc7293872007-08-22 23:31:43 +0100694{
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200695 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100696 return false;
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200697 if (!ata_id_u64(id, ATA_ID_LBA_CAPACITY_2))
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100698 return false;
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200699 return id[ATA_ID_COMMAND_SET_2] & (1 << 10);
Alan Coxc7293872007-08-22 23:31:43 +0100700}
701
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100702static inline bool ata_id_lba48_enabled(const u16 *id)
Bartlomiej Zolnierkiewicz942dcd82008-10-10 22:39:30 +0200703{
704 if (ata_id_has_lba48(id) == 0)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100705 return false;
Bartlomiej Zolnierkiewicz942dcd82008-10-10 22:39:30 +0200706 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100707 return false;
Bartlomiej Zolnierkiewicz942dcd82008-10-10 22:39:30 +0200708 return id[ATA_ID_CFS_ENABLE_2] & (1 << 10);
709}
710
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100711static inline bool ata_id_hpa_enabled(const u16 *id)
Alan Coxc7293872007-08-22 23:31:43 +0100712{
713 /* Yes children, word 83 valid bits cover word 82 data */
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200714 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100715 return false;
Alan Coxc7293872007-08-22 23:31:43 +0100716 /* And 87 covers 85-87 */
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200717 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100718 return false;
Alan Coxc7293872007-08-22 23:31:43 +0100719 /* Check command sets enabled as well as supported */
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200720 if ((id[ATA_ID_CFS_ENABLE_1] & (1 << 10)) == 0)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100721 return false;
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200722 return id[ATA_ID_COMMAND_SET_1] & (1 << 10);
Alan Coxc7293872007-08-22 23:31:43 +0100723}
724
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100725static inline bool ata_id_has_wcache(const u16 *id)
Alan Coxc7293872007-08-22 23:31:43 +0100726{
727 /* Yes children, word 83 valid bits cover word 82 data */
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200728 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100729 return false;
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200730 return id[ATA_ID_COMMAND_SET_1] & (1 << 5);
Alan Coxc7293872007-08-22 23:31:43 +0100731}
732
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100733static inline bool ata_id_has_pm(const u16 *id)
Alan Coxc7293872007-08-22 23:31:43 +0100734{
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200735 if ((id[ATA_ID_COMMAND_SET_2] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100736 return false;
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200737 return id[ATA_ID_COMMAND_SET_1] & (1 << 3);
Alan Coxc7293872007-08-22 23:31:43 +0100738}
739
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100740static inline bool ata_id_rahead_enabled(const u16 *id)
Alan Coxc7293872007-08-22 23:31:43 +0100741{
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200742 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100743 return false;
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200744 return id[ATA_ID_CFS_ENABLE_1] & (1 << 6);
Alan Coxc7293872007-08-22 23:31:43 +0100745}
746
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100747static inline bool ata_id_wcache_enabled(const u16 *id)
Alan Coxc7293872007-08-22 23:31:43 +0100748{
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200749 if ((id[ATA_ID_CSF_DEFAULT] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100750 return false;
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200751 return id[ATA_ID_CFS_ENABLE_1] & (1 << 5);
Alan Coxc7293872007-08-22 23:31:43 +0100752}
753
Hannes Reinecke9faa6432015-03-27 16:46:30 +0100754static inline bool ata_id_has_read_log_dma_ext(const u16 *id)
755{
Martin K. Petersen406c0572015-05-04 21:54:20 -0400756 /* Word 86 must have bit 15 set */
Hannes Reinecke9faa6432015-03-27 16:46:30 +0100757 if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
758 return false;
Martin K. Petersen406c0572015-05-04 21:54:20 -0400759
760 /* READ LOG DMA EXT support can be signaled either from word 119
761 * or from word 120. The format is the same for both words: Bit
762 * 15 must be cleared, bit 14 set and bit 3 set.
763 */
764 if ((id[ATA_ID_COMMAND_SET_3] & 0xC008) == 0x4008 ||
765 (id[ATA_ID_COMMAND_SET_4] & 0xC008) == 0x4008)
766 return true;
767
768 return false;
Hannes Reinecke9faa6432015-03-27 16:46:30 +0100769}
770
Hannes Reineckee87fd282016-04-04 11:43:55 +0200771static inline bool ata_id_has_sense_reporting(const u16 *id)
772{
773 if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
774 return false;
775 return id[ATA_ID_COMMAND_SET_3] & (1 << 6);
776}
777
778static inline bool ata_id_sense_reporting_enabled(const u16 *id)
779{
780 if (!(id[ATA_ID_CFS_ENABLE_2] & (1 << 15)))
781 return false;
782 return id[ATA_ID_COMMAND_SET_4] & (1 << 6);
783}
784
Alan Coxc7293872007-08-22 23:31:43 +0100785/**
Shaun Tancheff7b203092016-08-21 23:23:19 -0500786 *
787 * Word: 206 - SCT Command Transport
788 * 15:12 - Vendor Specific
789 * 11:6 - Reserved
790 * 5 - SCT Command Transport Data Tables supported
791 * 4 - SCT Command Transport Features Control supported
792 * 3 - SCT Command Transport Error Recovery Control supported
793 * 2 - SCT Command Transport Write Same supported
794 * 1 - SCT Command Transport Long Sector Access supported
795 * 0 - SCT Command Transport supported
796 */
797static inline bool ata_id_sct_data_tables(const u16 *id)
798{
799 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 5) ? true : false;
800}
801
802static inline bool ata_id_sct_features_ctrl(const u16 *id)
803{
804 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 4) ? true : false;
805}
806
807static inline bool ata_id_sct_error_recovery_ctrl(const u16 *id)
808{
809 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 3) ? true : false;
810}
811
Shaun Tancheff7b203092016-08-21 23:23:19 -0500812static inline bool ata_id_sct_long_sector_access(const u16 *id)
813{
814 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 1) ? true : false;
815}
816
817static inline bool ata_id_sct_supported(const u16 *id)
818{
819 return id[ATA_ID_SCT_CMD_XPORT] & (1 << 0) ? true : false;
820}
821
822/**
Alan Coxc7293872007-08-22 23:31:43 +0100823 * ata_id_major_version - get ATA level of drive
824 * @id: Identify data
825 *
826 * Caveats:
827 * ATA-1 considers identify optional
828 * ATA-2 introduces mandatory identify
829 * ATA-3 introduces word 80 and accurate reporting
830 *
831 * The practical impact of this is that ata_id_major_version cannot
Jeff Garzik2dcb4072007-10-19 06:42:56 -0400832 * reliably report on drives below ATA3.
Alan Coxc7293872007-08-22 23:31:43 +0100833 */
834
Tejun Heo3d2ca912006-02-12 22:47:04 +0900835static inline unsigned int ata_id_major_version(const u16 *id)
836{
837 unsigned int mver;
838
Alan Coxb352e572006-08-10 18:52:12 +0100839 if (id[ATA_ID_MAJOR_VER] == 0xFFFF)
840 return 0;
841
Tejun Heo3d2ca912006-02-12 22:47:04 +0900842 for (mver = 14; mver >= 1; mver--)
843 if (id[ATA_ID_MAJOR_VER] & (1 << mver))
844 break;
845 return mver;
846}
847
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100848static inline bool ata_id_is_sata(const u16 *id)
Tejun Heo32d90912007-02-21 20:25:08 +0900849{
Bartlomiej Zolnierkiewicz367d7e72008-10-10 22:39:30 +0200850 /*
851 * See if word 93 is 0 AND drive is at least ATA-5 compatible
852 * verifying that word 80 by casting it to a signed type --
853 * this trick allows us to filter out the reserved values of
854 * 0x0000 and 0xffff along with the earlier ATA revisions...
855 */
856 if (id[ATA_ID_HW_CONFIG] == 0 && (short)id[ATA_ID_MAJOR_VER] >= 0x0020)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100857 return true;
858 return false;
Tejun Heo32d90912007-02-21 20:25:08 +0900859}
860
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100861static inline bool ata_id_has_tpm(const u16 *id)
Alan Coxae8d4ee2007-11-04 22:05:49 -0500862{
863 /* The TPM bits are only valid on ATA8 */
864 if (ata_id_major_version(id) < 8)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100865 return false;
Alan Coxae8d4ee2007-11-04 22:05:49 -0500866 if ((id[48] & 0xC000) != 0x4000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100867 return false;
Alan Coxae8d4ee2007-11-04 22:05:49 -0500868 return id[48] & (1 << 0);
869}
870
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100871static inline bool ata_id_has_dword_io(const u16 *id)
Alan Coxae8d4ee2007-11-04 22:05:49 -0500872{
873 /* ATA 8 reuses this flag for "trusted" computing */
874 if (ata_id_major_version(id) > 7)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100875 return false;
876 return id[ATA_ID_DWORD_IO] & (1 << 0);
Alan Coxae8d4ee2007-11-04 22:05:49 -0500877}
878
Christoph Hellwige8f11db2017-08-29 14:42:06 +0200879static inline bool ata_id_has_trusted(const u16 *id)
880{
881 if (ata_id_major_version(id) <= 7)
882 return false;
883 return id[ATA_ID_TRUSTED] & (1 << 0);
884}
885
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100886static inline bool ata_id_has_unload(const u16 *id)
Elias Oltmannsea6ce532008-09-19 23:46:01 +0200887{
888 if (ata_id_major_version(id) >= 7 &&
889 (id[ATA_ID_CFSSE] & 0xC000) == 0x4000 &&
890 id[ATA_ID_CFSSE] & (1 << 13))
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100891 return true;
892 return false;
Elias Oltmannsea6ce532008-09-19 23:46:01 +0200893}
894
Hannes Reinecke6b3b9d72011-03-07 08:56:44 +0100895static inline bool ata_id_has_wwn(const u16 *id)
896{
897 return (id[ATA_ID_CSF_DEFAULT] & 0xC100) == 0x4100;
898}
899
Martin K. Petersen4bca3282009-05-15 00:40:35 -0400900static inline int ata_id_form_factor(const u16 *id)
901{
902 u16 val = id[168];
903
904 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
905 return 0;
906
907 val &= 0xf;
908
909 if (val > 5)
910 return 0;
911
912 return val;
913}
914
915static inline int ata_id_rotation_rate(const u16 *id)
916{
917 u16 val = id[217];
918
919 if (ata_id_major_version(id) < 7 || val == 0 || val == 0xffff)
920 return 0;
921
922 if (val > 1 && val < 0x401)
923 return 0;
924
925 return val;
926}
927
Marc Carinoed369112013-08-24 23:22:50 -0700928static inline bool ata_id_has_ncq_send_and_recv(const u16 *id)
929{
930 return id[ATA_ID_SATA_CAPABILITY_2] & BIT(6);
931}
932
Hannes Reinecke284b3b72016-04-25 12:45:54 +0200933static inline bool ata_id_has_ncq_non_data(const u16 *id)
934{
935 return id[ATA_ID_SATA_CAPABILITY_2] & BIT(5);
936}
937
Adam Manzanares8e061782016-10-17 11:27:29 -0700938static inline bool ata_id_has_ncq_prio(const u16 *id)
939{
940 return id[ATA_ID_SATA_CAPABILITY] & BIT(12);
941}
942
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100943static inline bool ata_id_has_trim(const u16 *id)
Matthew Wilcox0c659b82009-04-02 10:37:25 -0400944{
945 if (ata_id_major_version(id) >= 7 &&
946 (id[ATA_ID_DATA_SET_MGMT] & 1))
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100947 return true;
948 return false;
Matthew Wilcox0c659b82009-04-02 10:37:25 -0400949}
950
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100951static inline bool ata_id_has_zero_after_trim(const u16 *id)
Martin K. Petersene78db4d2009-11-26 22:46:03 -0500952{
953 /* DSM supported, deterministic read, and read zero after trim set */
954 if (ata_id_has_trim(id) &&
955 (id[ATA_ID_ADDITIONAL_SUPP] & 0x4020) == 0x4020)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100956 return true;
Martin K. Petersene78db4d2009-11-26 22:46:03 -0500957
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100958 return false;
Martin K. Petersene78db4d2009-11-26 22:46:03 -0500959}
960
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100961static inline bool ata_id_current_chs_valid(const u16 *id)
Albert Lee8bf62ece2005-05-12 15:29:42 -0400962{
Jeff Garzik9bec2e32006-08-31 00:02:15 -0400963 /* For ATA-1 devices, if the INITIALIZE DEVICE PARAMETERS command
964 has not been issued to the device then the values of
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +0200965 id[ATA_ID_CUR_CYLS] to id[ATA_ID_CUR_SECTORS] are vendor specific. */
966 return (id[ATA_ID_FIELD_VALID] & 1) && /* Current translation valid */
967 id[ATA_ID_CUR_CYLS] && /* cylinders in current translation */
968 id[ATA_ID_CUR_HEADS] && /* heads in current translation */
969 id[ATA_ID_CUR_HEADS] <= 16 &&
970 id[ATA_ID_CUR_SECTORS]; /* sectors in current translation */
Albert Lee8bf62ece2005-05-12 15:29:42 -0400971}
972
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100973static inline bool ata_id_is_cfa(const u16 *id)
Alan Coxb352e572006-08-10 18:52:12 +0100974{
Ben Gardner4b7d1c02010-02-23 12:41:22 -0600975 if ((id[ATA_ID_CONFIG] == 0x848A) || /* Traditional CF */
976 (id[ATA_ID_CONFIG] == 0x844A)) /* Delkin Devices CF */
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100977 return true;
Sergei Shtylyov2999b582009-02-01 20:46:39 +0400978 /*
979 * CF specs don't require specific value in the word 0 anymore and yet
980 * they forbid to report the ATA version in the word 80 and require the
981 * CFA feature set support to be indicated in the word 83 in this case.
982 * Unfortunately, some cards only follow either of this requirements,
983 * and while those that don't indicate CFA feature support need some
984 * sort of quirk list, it seems impractical for the ones that do...
985 */
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100986 return (id[ATA_ID_COMMAND_SET_2] & 0xC004) == 0x4004;
Alan Coxb352e572006-08-10 18:52:12 +0100987}
988
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100989static inline bool ata_id_is_ssd(const u16 *id)
Jens Axboe8bff7c62008-09-24 13:05:10 +0200990{
991 return id[ATA_ID_ROT_SPEED] == 0x01;
992}
993
Hannes Reinecke856c4662016-04-25 12:45:55 +0200994static inline u8 ata_id_zoned_cap(const u16 *id)
995{
996 return (id[ATA_ID_ADDITIONAL_SUPP] & 0x3);
997}
998
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +0100999static inline bool ata_id_pio_need_iordy(const u16 *id, const u8 pio)
Bartlomiej Zolnierkiewicz6dae44f2009-06-15 18:52:52 +02001000{
1001 /* CF spec. r4.1 Table 22 says no IORDY on PIO5 and PIO6. */
1002 if (pio > 4 && ata_id_is_cfa(id))
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +01001003 return false;
Bartlomiej Zolnierkiewicz6dae44f2009-06-15 18:52:52 +02001004 /* For PIO3 and higher it is mandatory. */
1005 if (pio > 2)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +01001006 return true;
Bartlomiej Zolnierkiewicz6dae44f2009-06-15 18:52:52 +02001007 /* Turn it on when possible. */
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +01001008 return ata_id_has_iordy(id);
Bartlomiej Zolnierkiewicz6dae44f2009-06-15 18:52:52 +02001009}
1010
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +01001011static inline bool ata_drive_40wire(const u16 *dev_id)
Alan Coxfc085152006-10-10 14:28:11 -07001012{
Tejun Heo32d90912007-02-21 20:25:08 +09001013 if (ata_id_is_sata(dev_id))
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +01001014 return false; /* SATA */
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +02001015 if ((dev_id[ATA_ID_HW_CONFIG] & 0xE000) == 0x6000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +01001016 return false; /* 80 wire */
1017 return true;
Alan Coxfc085152006-10-10 14:28:11 -07001018}
1019
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +01001020static inline bool ata_drive_40wire_relaxed(const u16 *dev_id)
Alan Cox6bbfd532007-11-05 22:58:58 +00001021{
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +02001022 if ((dev_id[ATA_ID_HW_CONFIG] & 0x2000) == 0x2000)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +01001023 return false; /* 80 wire */
1024 return true;
Alan Cox6bbfd532007-11-05 22:58:58 +00001025}
1026
Jeff Garzik057ace52005-10-22 14:27:05 -04001027static inline int atapi_cdb_len(const u16 *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001028{
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +02001029 u16 tmp = dev_id[ATA_ID_CONFIG] & 0x3;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001030 switch (tmp) {
1031 case 0: return 12;
1032 case 1: return 16;
1033 default: return -1;
1034 }
1035}
1036
Shan Haid8668fc2013-03-18 10:30:43 +08001037static inline int atapi_command_packet_set(const u16 *dev_id)
Tony Battersbyf8d8e572007-10-30 11:44:35 -04001038{
Bartlomiej Zolnierkiewicz37014c62008-08-18 21:40:05 +02001039 return (dev_id[ATA_ID_CONFIG] >> 8) & 0x1f;
Tony Battersbyf8d8e572007-10-30 11:44:35 -04001040}
1041
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +01001042static inline bool atapi_id_dmadir(const u16 *dev_id)
Tejun Heo91163002008-02-21 13:25:50 +09001043{
1044 return ata_id_major_version(dev_id) >= 7 && (dev_id[62] & 0x8000);
1045}
1046
Bartlomiej Zolnierkiewicza02227c2008-10-10 22:39:31 +02001047/*
1048 * ata_id_is_lba_capacity_ok() performs a sanity check on
1049 * the claimed LBA capacity value for the device.
1050 *
1051 * Returns 1 if LBA capacity looks sensible, 0 otherwise.
1052 *
1053 * It is called only once for each device.
1054 */
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +01001055static inline bool ata_id_is_lba_capacity_ok(u16 *id)
Bartlomiej Zolnierkiewicza02227c2008-10-10 22:39:31 +02001056{
1057 unsigned long lba_sects, chs_sects, head, tail;
1058
1059 /* No non-LBA info .. so valid! */
1060 if (id[ATA_ID_CYLS] == 0)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +01001061 return true;
Bartlomiej Zolnierkiewicza02227c2008-10-10 22:39:31 +02001062
1063 lba_sects = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
1064
1065 /*
1066 * The ATA spec tells large drives to return
1067 * C/H/S = 16383/16/63 independent of their size.
1068 * Some drives can be jumpered to use 15 heads instead of 16.
1069 * Some drives can be jumpered to use 4092 cyls instead of 16383.
1070 */
1071 if ((id[ATA_ID_CYLS] == 16383 ||
1072 (id[ATA_ID_CYLS] == 4092 && id[ATA_ID_CUR_CYLS] == 16383)) &&
1073 id[ATA_ID_SECTORS] == 63 &&
1074 (id[ATA_ID_HEADS] == 15 || id[ATA_ID_HEADS] == 16) &&
1075 (lba_sects >= 16383 * 63 * id[ATA_ID_HEADS]))
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +01001076 return true;
Bartlomiej Zolnierkiewicza02227c2008-10-10 22:39:31 +02001077
1078 chs_sects = id[ATA_ID_CYLS] * id[ATA_ID_HEADS] * id[ATA_ID_SECTORS];
1079
1080 /* perform a rough sanity check on lba_sects: within 10% is OK */
1081 if (lba_sects - chs_sects < chs_sects/10)
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +01001082 return true;
Bartlomiej Zolnierkiewicza02227c2008-10-10 22:39:31 +02001083
1084 /* some drives have the word order reversed */
1085 head = (lba_sects >> 16) & 0xffff;
1086 tail = lba_sects & 0xffff;
1087 lba_sects = head | (tail << 16);
1088
1089 if (lba_sects - chs_sects < chs_sects/10) {
1090 *(__le32 *)&id[ATA_ID_LBA_CAPACITY] = __cpu_to_le32(lba_sects);
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +01001091 return true; /* LBA capacity is (now) good */
Bartlomiej Zolnierkiewicza02227c2008-10-10 22:39:31 +02001092 }
1093
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +01001094 return false; /* LBA capacity value may be bad */
Bartlomiej Zolnierkiewicza02227c2008-10-10 22:39:31 +02001095}
1096
Bartlomiej Zolnierkiewicz93734a22008-10-10 22:39:31 +02001097static inline void ata_id_to_hd_driveid(u16 *id)
1098{
1099#ifdef __BIG_ENDIAN
1100 /* accessed in struct hd_driveid as 8-bit values */
1101 id[ATA_ID_MAX_MULTSECT] = __cpu_to_le16(id[ATA_ID_MAX_MULTSECT]);
1102 id[ATA_ID_CAPABILITY] = __cpu_to_le16(id[ATA_ID_CAPABILITY]);
1103 id[ATA_ID_OLD_PIO_MODES] = __cpu_to_le16(id[ATA_ID_OLD_PIO_MODES]);
1104 id[ATA_ID_OLD_DMA_MODES] = __cpu_to_le16(id[ATA_ID_OLD_DMA_MODES]);
1105 id[ATA_ID_MULTSECT] = __cpu_to_le16(id[ATA_ID_MULTSECT]);
1106
1107 /* as 32-bit values */
1108 *(u32 *)&id[ATA_ID_LBA_CAPACITY] = ata_id_u32(id, ATA_ID_LBA_CAPACITY);
1109 *(u32 *)&id[ATA_ID_SPG] = ata_id_u32(id, ATA_ID_SPG);
1110
1111 /* as 64-bit value */
1112 *(u64 *)&id[ATA_ID_LBA_CAPACITY_2] =
1113 ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
1114#endif
1115}
1116
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +01001117static inline bool ata_ok(u8 status)
Linus Torvalds1da177e2005-04-16 15:20:36 -07001118{
1119 return ((status & (ATA_BUSY | ATA_DRDY | ATA_DF | ATA_DRQ | ATA_ERR))
1120 == ATA_DRDY);
1121}
1122
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +01001123static inline bool lba_28_ok(u64 block, u32 n_block)
Albert Leec6a33e22005-10-12 15:12:26 +08001124{
Mark Lord45c4d012010-04-07 13:52:08 -04001125 /* check the ending block number: must be LESS THAN 0x0fffffff */
Tom Yan35303d52016-07-15 05:09:02 +08001126 return ((block + n_block) < ((1 << 28) - 1)) && (n_block <= ATA_MAX_SECTORS);
Albert Leec6a33e22005-10-12 15:12:26 +08001127}
1128
Hannes Reinecke4dce8ba2011-03-14 08:54:20 +01001129static inline bool lba_48_ok(u64 block, u32 n_block)
Albert Leec6a33e22005-10-12 15:12:26 +08001130{
1131 /* check the ending block number */
Tom Yan35303d52016-07-15 05:09:02 +08001132 return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= ATA_MAX_SECTORS_LBA48);
Albert Leec6a33e22005-10-12 15:12:26 +08001133}
1134
Tejun Heo814600e2007-07-01 19:05:58 +09001135#define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff)
1136#define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16)
1137#define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff)
1138#define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf)
1139
Linus Torvalds1da177e2005-04-16 15:20:36 -07001140#endif /* __LINUX_ATA_H__ */