blob: 483888a85cfdbb78d5101193f67d171cc21ca451 [file] [log] [blame]
Tomi Valkeinen553c48c2009-08-07 13:15:50 +03001/*
2 * linux/drivers/video/omap2/dss/dpi.c
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6 *
7 * Some code and ideas taken from drivers/video/omap/ driver
8 * by Imre Deak.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program. If not, see <http://www.gnu.org/licenses/>.
21 */
22
23#define DSS_SUBSYS_NAME "DPI"
24
25#include <linux/kernel.h>
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030026#include <linux/delay.h>
Tomi Valkeinen8a2cfea2010-02-04 17:03:41 +020027#include <linux/err.h>
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030028#include <linux/errno.h>
Tomi Valkeinen8a2cfea2010-02-04 17:03:41 +020029#include <linux/platform_device.h>
30#include <linux/regulator/consumer.h>
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030031
Tomi Valkeinena0b38cc2011-05-11 14:05:07 +030032#include <video/omapdss.h>
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030033#include <plat/cpu.h>
34
35#include "dss.h"
36
37static struct {
Tomi Valkeinen8a2cfea2010-02-04 17:03:41 +020038 struct regulator *vdds_dsi_reg;
Archit Tanejaa72b64b2011-05-12 17:26:26 +053039 struct platform_device *dsidev;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030040} dpi;
41
Archit Tanejaa72b64b2011-05-12 17:26:26 +053042static struct platform_device *dpi_get_dsidev(enum omap_dss_clk_source clk)
43{
44 int dsi_module;
45
46 dsi_module = clk == OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ? 0 : 1;
47
48 return dsi_get_dsidev_from_id(dsi_module);
49}
50
Archit Taneja7636b3b2011-04-12 13:52:26 +053051static bool dpi_use_dsi_pll(struct omap_dss_device *dssdev)
52{
53 if (dssdev->clocks.dispc.dispc_fclk_src ==
54 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ||
Archit Taneja5a8b5722011-05-12 17:26:29 +053055 dssdev->clocks.dispc.dispc_fclk_src ==
56 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC ||
Archit Taneja7636b3b2011-04-12 13:52:26 +053057 dssdev->clocks.dispc.channel.lcd_clk_src ==
Archit Taneja5a8b5722011-05-12 17:26:29 +053058 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC ||
59 dssdev->clocks.dispc.channel.lcd_clk_src ==
60 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC)
Archit Taneja7636b3b2011-04-12 13:52:26 +053061 return true;
62 else
63 return false;
64}
65
Sumit Semwalff1b2cd2010-12-02 11:27:11 +000066static int dpi_set_dsi_clk(struct omap_dss_device *dssdev, bool is_tft,
67 unsigned long pck_req, unsigned long *fck, int *lck_div,
68 int *pck_div)
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030069{
70 struct dsi_clock_info dsi_cinfo;
71 struct dispc_clock_info dispc_cinfo;
72 int r;
73
Archit Tanejaa72b64b2011-05-12 17:26:26 +053074 r = dsi_pll_calc_clock_div_pck(dpi.dsidev, is_tft, pck_req,
75 &dsi_cinfo, &dispc_cinfo);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030076 if (r)
77 return r;
78
Archit Tanejaa72b64b2011-05-12 17:26:26 +053079 r = dsi_pll_set_clock_div(dpi.dsidev, &dsi_cinfo);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030080 if (r)
81 return r;
82
Archit Tanejae8881662011-04-12 13:52:24 +053083 dss_select_dispc_clk_source(dssdev->clocks.dispc.dispc_fclk_src);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030084
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +030085 r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo);
Tomi Valkeinen5e785092011-08-10 11:25:36 +030086 if (r) {
87 dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030088 return r;
Tomi Valkeinen5e785092011-08-10 11:25:36 +030089 }
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030090
Archit Taneja1bb47832011-02-24 14:17:30 +053091 *fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +030092 *lck_div = dispc_cinfo.lck_div;
93 *pck_div = dispc_cinfo.pck_div;
94
95 return 0;
96}
Archit Taneja7636b3b2011-04-12 13:52:26 +053097
Sumit Semwalff1b2cd2010-12-02 11:27:11 +000098static int dpi_set_dispc_clk(struct omap_dss_device *dssdev, bool is_tft,
99 unsigned long pck_req, unsigned long *fck, int *lck_div,
100 int *pck_div)
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300101{
102 struct dss_clock_info dss_cinfo;
103 struct dispc_clock_info dispc_cinfo;
104 int r;
105
106 r = dss_calc_clock_div(is_tft, pck_req, &dss_cinfo, &dispc_cinfo);
107 if (r)
108 return r;
109
110 r = dss_set_clock_div(&dss_cinfo);
111 if (r)
112 return r;
113
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +0300114 r = dispc_mgr_set_clock_div(dssdev->manager->id, &dispc_cinfo);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300115 if (r)
116 return r;
117
118 *fck = dss_cinfo.fck;
119 *lck_div = dispc_cinfo.lck_div;
120 *pck_div = dispc_cinfo.pck_div;
121
122 return 0;
123}
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300124
125static int dpi_set_mode(struct omap_dss_device *dssdev)
126{
127 struct omap_video_timings *t = &dssdev->panel.timings;
Archit Taneja7636b3b2011-04-12 13:52:26 +0530128 int lck_div = 0, pck_div = 0;
129 unsigned long fck = 0;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300130 unsigned long pck;
131 bool is_tft;
132 int r = 0;
133
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +0300134 dispc_mgr_set_pol_freq(dssdev->manager->id, dssdev->panel.config,
Sumit Semwalff1b2cd2010-12-02 11:27:11 +0000135 dssdev->panel.acbi, dssdev->panel.acb);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300136
137 is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
138
Archit Taneja7636b3b2011-04-12 13:52:26 +0530139 if (dpi_use_dsi_pll(dssdev))
140 r = dpi_set_dsi_clk(dssdev, is_tft, t->pixel_clock * 1000,
141 &fck, &lck_div, &pck_div);
142 else
143 r = dpi_set_dispc_clk(dssdev, is_tft, t->pixel_clock * 1000,
144 &fck, &lck_div, &pck_div);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300145 if (r)
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300146 return r;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300147
148 pck = fck / lck_div / pck_div / 1000;
149
150 if (pck != t->pixel_clock) {
151 DSSWARN("Could not find exact pixel clock. "
152 "Requested %d kHz, got %lu kHz\n",
153 t->pixel_clock, pck);
154
155 t->pixel_clock = pck;
156 }
157
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +0300158 dispc_mgr_set_lcd_timings(dssdev->manager->id, t);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300159
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300160 return 0;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300161}
162
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300163static void dpi_basic_init(struct omap_dss_device *dssdev)
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300164{
165 bool is_tft;
166
167 is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
168
Archit Taneja569969d2011-08-22 17:41:57 +0530169 dispc_mgr_set_io_pad_mode(DSS_IO_PAD_MODE_BYPASS);
170 dispc_mgr_enable_stallmode(dssdev->manager->id, false);
171
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +0300172 dispc_mgr_set_lcd_display_type(dssdev->manager->id, is_tft ?
Sumit Semwal64ba4f72010-12-02 11:27:10 +0000173 OMAP_DSS_LCD_DISPLAY_TFT : OMAP_DSS_LCD_DISPLAY_STN);
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +0300174 dispc_mgr_set_tft_data_lines(dssdev->manager->id,
Sumit Semwal64ba4f72010-12-02 11:27:10 +0000175 dssdev->phy.dpi.data_lines);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300176}
177
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200178int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300179{
180 int r;
181
Tomi Valkeinen05e1d602011-06-23 16:38:21 +0300182 if (dssdev->manager == NULL) {
183 DSSERR("failed to enable display: no manager\n");
184 return -ENODEV;
185 }
186
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300187 r = omap_dss_start_device(dssdev);
188 if (r) {
189 DSSERR("failed to start device\n");
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300190 goto err_start_dev;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300191 }
192
Tomi Valkeinen8a2cfea2010-02-04 17:03:41 +0200193 if (cpu_is_omap34xx()) {
194 r = regulator_enable(dpi.vdds_dsi_reg);
195 if (r)
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300196 goto err_reg_enable;
Tomi Valkeinen8a2cfea2010-02-04 17:03:41 +0200197 }
198
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300199 r = dss_runtime_get();
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300200 if (r)
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300201 goto err_get_dss;
202
203 r = dispc_runtime_get();
204 if (r)
205 goto err_get_dispc;
206
207 dpi_basic_init(dssdev);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300208
Archit Taneja7636b3b2011-04-12 13:52:26 +0530209 if (dpi_use_dsi_pll(dssdev)) {
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300210 r = dsi_runtime_get(dpi.dsidev);
211 if (r)
212 goto err_get_dsi;
213
Archit Tanejaa72b64b2011-05-12 17:26:26 +0530214 r = dsi_pll_init(dpi.dsidev, 0, 1);
Archit Taneja7636b3b2011-04-12 13:52:26 +0530215 if (r)
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300216 goto err_dsi_pll_init;
Archit Taneja7636b3b2011-04-12 13:52:26 +0530217 }
218
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300219 r = dpi_set_mode(dssdev);
220 if (r)
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300221 goto err_set_mode;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300222
223 mdelay(2);
224
Tomi Valkeinena2faee82010-01-08 17:14:53 +0200225 dssdev->manager->enable(dssdev->manager);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300226
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300227 return 0;
228
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300229err_set_mode:
Archit Taneja7636b3b2011-04-12 13:52:26 +0530230 if (dpi_use_dsi_pll(dssdev))
Tomi Valkeinen19077a732011-05-18 11:33:44 +0300231 dsi_pll_uninit(dpi.dsidev, true);
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300232err_dsi_pll_init:
233 if (dpi_use_dsi_pll(dssdev))
234 dsi_runtime_put(dpi.dsidev);
235err_get_dsi:
236 dispc_runtime_put();
237err_get_dispc:
238 dss_runtime_put();
239err_get_dss:
Tomi Valkeinen8a2cfea2010-02-04 17:03:41 +0200240 if (cpu_is_omap34xx())
241 regulator_disable(dpi.vdds_dsi_reg);
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300242err_reg_enable:
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300243 omap_dss_stop_device(dssdev);
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300244err_start_dev:
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300245 return r;
246}
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200247EXPORT_SYMBOL(omapdss_dpi_display_enable);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300248
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200249void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300250{
Tomi Valkeinena2faee82010-01-08 17:14:53 +0200251 dssdev->manager->disable(dssdev->manager);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300252
Archit Taneja7636b3b2011-04-12 13:52:26 +0530253 if (dpi_use_dsi_pll(dssdev)) {
254 dss_select_dispc_clk_source(OMAP_DSS_CLK_SRC_FCK);
Archit Tanejaa72b64b2011-05-12 17:26:26 +0530255 dsi_pll_uninit(dpi.dsidev, true);
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300256 dsi_runtime_put(dpi.dsidev);
Archit Taneja7636b3b2011-04-12 13:52:26 +0530257 }
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300258
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300259 dispc_runtime_put();
260 dss_runtime_put();
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300261
Tomi Valkeinen8a2cfea2010-02-04 17:03:41 +0200262 if (cpu_is_omap34xx())
263 regulator_disable(dpi.vdds_dsi_reg);
264
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300265 omap_dss_stop_device(dssdev);
266}
Tomi Valkeinen37ac60e2010-01-12 15:12:07 +0200267EXPORT_SYMBOL(omapdss_dpi_display_disable);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300268
Tomi Valkeinen69b20482010-01-20 12:11:25 +0200269void dpi_set_timings(struct omap_dss_device *dssdev,
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300270 struct omap_video_timings *timings)
271{
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300272 int r;
273
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300274 DSSDBG("dpi_set_timings\n");
275 dssdev->panel.timings = *timings;
276 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300277 r = dss_runtime_get();
278 if (r)
279 return;
280
281 r = dispc_runtime_get();
282 if (r) {
283 dss_runtime_put();
284 return;
285 }
286
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300287 dpi_set_mode(dssdev);
Tomi Valkeinen26d9dd02011-08-16 13:45:15 +0300288 dispc_mgr_go(dssdev->manager->id);
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300289
290 dispc_runtime_put();
291 dss_runtime_put();
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300292 }
293}
Tomi Valkeinen69b20482010-01-20 12:11:25 +0200294EXPORT_SYMBOL(dpi_set_timings);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300295
Tomi Valkeinen69b20482010-01-20 12:11:25 +0200296int dpi_check_timings(struct omap_dss_device *dssdev,
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300297 struct omap_video_timings *timings)
298{
299 bool is_tft;
300 int r;
301 int lck_div, pck_div;
302 unsigned long fck;
303 unsigned long pck;
Archit Taneja7636b3b2011-04-12 13:52:26 +0530304 struct dispc_clock_info dispc_cinfo;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300305
306 if (!dispc_lcd_timings_ok(timings))
307 return -EINVAL;
308
309 if (timings->pixel_clock == 0)
310 return -EINVAL;
311
312 is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;
313
Archit Taneja7636b3b2011-04-12 13:52:26 +0530314 if (dpi_use_dsi_pll(dssdev)) {
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300315 struct dsi_clock_info dsi_cinfo;
Archit Tanejaa72b64b2011-05-12 17:26:26 +0530316 r = dsi_pll_calc_clock_div_pck(dpi.dsidev, is_tft,
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300317 timings->pixel_clock * 1000,
318 &dsi_cinfo, &dispc_cinfo);
319
320 if (r)
321 return r;
322
Archit Taneja1bb47832011-02-24 14:17:30 +0530323 fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
Archit Taneja7636b3b2011-04-12 13:52:26 +0530324 } else {
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300325 struct dss_clock_info dss_cinfo;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300326 r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000,
327 &dss_cinfo, &dispc_cinfo);
328
329 if (r)
330 return r;
331
332 fck = dss_cinfo.fck;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300333 }
Archit Taneja7636b3b2011-04-12 13:52:26 +0530334
335 lck_div = dispc_cinfo.lck_div;
336 pck_div = dispc_cinfo.pck_div;
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300337
338 pck = fck / lck_div / pck_div / 1000;
339
340 timings->pixel_clock = pck;
341
342 return 0;
343}
Tomi Valkeinen69b20482010-01-20 12:11:25 +0200344EXPORT_SYMBOL(dpi_check_timings);
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300345
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300346int dpi_init_display(struct omap_dss_device *dssdev)
347{
348 DSSDBG("init_display\n");
349
Tomi Valkeinen5f42f2ce2011-02-22 15:53:46 +0200350 if (cpu_is_omap34xx() && dpi.vdds_dsi_reg == NULL) {
351 struct regulator *vdds_dsi;
352
353 vdds_dsi = dss_get_vdds_dsi();
354
355 if (IS_ERR(vdds_dsi)) {
356 DSSERR("can't get VDDS_DSI regulator\n");
357 return PTR_ERR(vdds_dsi);
358 }
359
360 dpi.vdds_dsi_reg = vdds_dsi;
361 }
362
Archit Tanejaa72b64b2011-05-12 17:26:26 +0530363 if (dpi_use_dsi_pll(dssdev)) {
364 enum omap_dss_clk_source dispc_fclk_src =
365 dssdev->clocks.dispc.dispc_fclk_src;
366 dpi.dsidev = dpi_get_dsidev(dispc_fclk_src);
367 }
368
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300369 return 0;
370}
371
Tomi Valkeinen277b2882011-03-02 12:32:48 +0200372int dpi_init(void)
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300373{
Tomi Valkeinen553c48c2009-08-07 13:15:50 +0300374 return 0;
375}
376
377void dpi_exit(void)
378{
379}
380