Thomas Gleixner | 9c92ab6 | 2019-05-29 07:17:56 -0700 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Maxime Ripard | 1d80c14 | 2016-06-29 21:05:23 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2016 Maxime Ripard. All rights reserved. |
Maxime Ripard | 1d80c14 | 2016-06-29 21:05:23 +0200 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef _COMMON_H_ |
| 7 | #define _COMMON_H_ |
| 8 | |
| 9 | #include <linux/compiler.h> |
| 10 | #include <linux/clk-provider.h> |
| 11 | |
| 12 | #define CCU_FEATURE_FRACTIONAL BIT(0) |
| 13 | #define CCU_FEATURE_VARIABLE_PREDIV BIT(1) |
| 14 | #define CCU_FEATURE_FIXED_PREDIV BIT(2) |
| 15 | #define CCU_FEATURE_FIXED_POSTDIV BIT(3) |
Maxime Ripard | 7c09b85 | 2017-01-19 22:49:26 +0100 | [diff] [blame] | 16 | #define CCU_FEATURE_ALL_PREDIV BIT(4) |
Chen-Yu Tsai | 3de64bf | 2017-01-28 20:22:33 +0800 | [diff] [blame] | 17 | #define CCU_FEATURE_LOCK_REG BIT(5) |
Chen-Yu Tsai | f6f64ed | 2017-07-24 21:58:56 +0800 | [diff] [blame] | 18 | #define CCU_FEATURE_MMC_TIMING_SWITCH BIT(6) |
Chen-Yu Tsai | 05d2eaa | 2017-10-12 16:36:59 +0800 | [diff] [blame] | 19 | #define CCU_FEATURE_SIGMA_DELTA_MOD BIT(7) |
Chen-Yu Tsai | f6f64ed | 2017-07-24 21:58:56 +0800 | [diff] [blame] | 20 | |
| 21 | /* MMC timing mode switch bit */ |
| 22 | #define CCU_MMC_NEW_TIMING_MODE BIT(30) |
Maxime Ripard | 1d80c14 | 2016-06-29 21:05:23 +0200 | [diff] [blame] | 23 | |
| 24 | struct device_node; |
| 25 | |
Maxime Ripard | 1d80c14 | 2016-06-29 21:05:23 +0200 | [diff] [blame] | 26 | struct ccu_common { |
| 27 | void __iomem *base; |
| 28 | u16 reg; |
Chen-Yu Tsai | 3de64bf | 2017-01-28 20:22:33 +0800 | [diff] [blame] | 29 | u16 lock_reg; |
Maxime Ripard | 7c09b85 | 2017-01-19 22:49:26 +0100 | [diff] [blame] | 30 | u32 prediv; |
Maxime Ripard | 1d80c14 | 2016-06-29 21:05:23 +0200 | [diff] [blame] | 31 | |
| 32 | unsigned long features; |
| 33 | spinlock_t *lock; |
| 34 | struct clk_hw hw; |
| 35 | }; |
| 36 | |
| 37 | static inline struct ccu_common *hw_to_ccu_common(struct clk_hw *hw) |
| 38 | { |
| 39 | return container_of(hw, struct ccu_common, hw); |
| 40 | } |
| 41 | |
| 42 | struct sunxi_ccu_desc { |
| 43 | struct ccu_common **ccu_clks; |
| 44 | unsigned long num_ccu_clks; |
| 45 | |
| 46 | struct clk_hw_onecell_data *hw_clks; |
| 47 | |
| 48 | struct ccu_reset_map *resets; |
| 49 | unsigned long num_resets; |
| 50 | }; |
| 51 | |
| 52 | void ccu_helper_wait_for_lock(struct ccu_common *common, u32 lock); |
| 53 | |
Chen-Yu Tsai | 02ae2bc | 2017-04-13 10:13:52 +0800 | [diff] [blame] | 54 | struct ccu_pll_nb { |
| 55 | struct notifier_block clk_nb; |
| 56 | struct ccu_common *common; |
| 57 | |
| 58 | u32 enable; |
| 59 | u32 lock; |
| 60 | }; |
| 61 | |
| 62 | #define to_ccu_pll_nb(_nb) container_of(_nb, struct ccu_pll_nb, clk_nb) |
| 63 | |
| 64 | int ccu_pll_notifier_register(struct ccu_pll_nb *pll_nb); |
| 65 | |
Maxime Ripard | 1d80c14 | 2016-06-29 21:05:23 +0200 | [diff] [blame] | 66 | int sunxi_ccu_probe(struct device_node *node, void __iomem *reg, |
| 67 | const struct sunxi_ccu_desc *desc); |
| 68 | |
| 69 | #endif /* _COMMON_H_ */ |