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review.shift-gmbh.com / SHIFTPHONES / kernel / shift / mainline / 557c7ffa2f283166fa863aaa415757f5f485aa62 / . / drivers / clk / qcom / common.h
blob: 1e2a8bdac55a3781ec49ab988a27db6e7c8c5f0d [file] [log] [blame]
Taniya Dasf9419782018-07-16 11:24:32 +0530[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright (c) 2014, The Linux Foundation. All rights reserved. */
3
Stephen Boyd49fc8252014-03-21 17:59:37 -0700[diff] [blame]4#ifndef __QCOM_CLK_COMMON_H__
5#define __QCOM_CLK_COMMON_H__
6
7struct platform_device;
8struct regmap_config;
9struct clk_regmap;
10struct qcom_reset_map;
Stephen Boyd5b6b7492014-07-15 14:59:21 -0700[diff] [blame]11struct regmap;
Stephen Boyd50c6a502014-09-04 13:21:50 -0700[diff] [blame]12struct freq_tbl;
Georgi Djakov293d2e972015-03-20 18:30:26 +0200[diff] [blame]13struct clk_hw;
Stephen Boyd49fc8252014-03-21 17:59:37 -0700[diff] [blame]14
Rajendra Nayak400d9fd2016-09-29 14:05:45 +0530[diff] [blame]15#define PLL_LOCK_COUNT_SHIFT 8
16#define PLL_LOCK_COUNT_MASK 0x3f
17#define PLL_BIAS_COUNT_SHIFT 14
18#define PLL_BIAS_COUNT_MASK 0x3f
19#define PLL_VOTE_FSM_ENA BIT(20)
20#define PLL_VOTE_FSM_RESET BIT(21)
21
Stephen Boyd49fc8252014-03-21 17:59:37 -0700[diff] [blame]22struct qcom_cc_desc {
23 const struct regmap_config *config;
24 struct clk_regmap **clks;
25 size_t num_clks;
26 const struct qcom_reset_map *resets;
27 size_t num_resets;
Rajendra Nayak5e5cc242015-08-06 16:07:43 +0530[diff] [blame]28 struct gdsc **gdscs;
29 size_t num_gdscs;
Jeffrey Hugo760be652019-02-10 13:14:05 -0700[diff] [blame]30 struct clk_hw **clk_hws;
31 size_t num_clk_hws;
Stephen Boyd49fc8252014-03-21 17:59:37 -0700[diff] [blame]32};
33
Abhishek Sahudf964012017-12-13 19:55:33 +0530[diff] [blame]34/**
35 * struct parent_map - map table for source select configuration values
36 * @src: source
37 * @cfg: configuration value
38 */
39struct parent_map {
40 u8 src;
41 u8 cfg;
42};
43
Stephen Boyd50c6a502014-09-04 13:21:50 -0700[diff] [blame]44extern const struct freq_tbl *qcom_find_freq(const struct freq_tbl *f,
45 unsigned long rate);
Rajendra Nayak081ba802016-11-21 12:07:11 +0530[diff] [blame]46extern const struct freq_tbl *qcom_find_freq_floor(const struct freq_tbl *f,
47 unsigned long rate);
Rajendra Nayak400d9fd2016-09-29 14:05:45 +0530[diff] [blame]48extern void
49qcom_pll_set_fsm_mode(struct regmap *m, u32 reg, u8 bias_count, u8 lock_count);
Georgi Djakov293d2e972015-03-20 18:30:26 +0200[diff] [blame]50extern int qcom_find_src_index(struct clk_hw *hw, const struct parent_map *map,
51 u8 src);
Stephen Boyd50c6a502014-09-04 13:21:50 -0700[diff] [blame]52
Stephen Boydee15faf2015-10-26 17:11:32 -0700[diff] [blame]53extern int qcom_cc_register_board_clk(struct device *dev, const char *path,
54 const char *name, unsigned long rate);
55extern int qcom_cc_register_sleep_clk(struct device *dev);
56
Stephen Boyd5b6b7492014-07-15 14:59:21 -0700[diff] [blame]57extern struct regmap *qcom_cc_map(struct platform_device *pdev,
58 const struct qcom_cc_desc *desc);
59extern int qcom_cc_really_probe(struct platform_device *pdev,
60 const struct qcom_cc_desc *desc,
61 struct regmap *regmap);
Stephen Boyd49fc8252014-03-21 17:59:37 -0700[diff] [blame]62extern int qcom_cc_probe(struct platform_device *pdev,
63 const struct qcom_cc_desc *desc);
64
Stephen Boyd49fc8252014-03-21 17:59:37 -0700[diff] [blame]65#endif