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Ilia Lin46e28562018-05-30 05:39:28 +03001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (c) 2018, The Linux Foundation. All rights reserved.
4 */
5
6/*
7 * In Certain QCOM SoCs like apq8096 and msm8996 that have KRYO processors,
8 * the CPU frequency subset and voltage value of each OPP varies
9 * based on the silicon variant in use. Qualcomm Process Voltage Scaling Tables
10 * defines the voltage and frequency value based on the msm-id in SMEM
11 * and speedbin blown in the efuse combination.
Sricharan R7d127092019-07-25 12:41:31 +020012 * The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
Ilia Lin46e28562018-05-30 05:39:28 +030013 * to provide the OPP framework with required information.
14 * This is used to determine the voltage and frequency value for each OPP of
15 * operating-points-v2 table when it is parsed by the OPP framework.
16 */
17
18#include <linux/cpu.h>
19#include <linux/err.h>
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/nvmem-consumer.h>
24#include <linux/of.h>
Sricharan R7d127092019-07-25 12:41:31 +020025#include <linux/of_device.h>
Ilia Lin46e28562018-05-30 05:39:28 +030026#include <linux/platform_device.h>
Niklas Cassel1cb83392019-07-25 12:41:35 +020027#include <linux/pm_domain.h>
Ilia Lin46e28562018-05-30 05:39:28 +030028#include <linux/pm_opp.h>
29#include <linux/slab.h>
30#include <linux/soc/qcom/smem.h>
31
32#define MSM_ID_SMEM 137
33
34enum _msm_id {
35 MSM8996V3 = 0xF6ul,
36 APQ8096V3 = 0x123ul,
37 MSM8996SG = 0x131ul,
38 APQ8096SG = 0x138ul,
39};
40
41enum _msm8996_version {
42 MSM8996_V3,
43 MSM8996_SG,
44 NUM_OF_MSM8996_VERSIONS,
45};
46
Niklas Cassel57f2f8b2019-07-25 12:41:33 +020047struct qcom_cpufreq_drv;
48
49struct qcom_cpufreq_match_data {
50 int (*get_version)(struct device *cpu_dev,
51 struct nvmem_cell *speedbin_nvmem,
52 struct qcom_cpufreq_drv *drv);
Niklas Cassel1cb83392019-07-25 12:41:35 +020053 const char **genpd_names;
Niklas Cassel57f2f8b2019-07-25 12:41:33 +020054};
55
56struct qcom_cpufreq_drv {
57 struct opp_table **opp_tables;
Niklas Cassel1cb83392019-07-25 12:41:35 +020058 struct opp_table **genpd_opp_tables;
Niklas Cassel57f2f8b2019-07-25 12:41:33 +020059 u32 versions;
60 const struct qcom_cpufreq_match_data *data;
61};
62
Sricharan R7d127092019-07-25 12:41:31 +020063static struct platform_device *cpufreq_dt_pdev, *cpufreq_pdev;
Ilia Lin5ad73462018-06-17 22:01:46 +020064
Sricharan R7d127092019-07-25 12:41:31 +020065static enum _msm8996_version qcom_cpufreq_get_msm_id(void)
Ilia Lin46e28562018-05-30 05:39:28 +030066{
67 size_t len;
68 u32 *msm_id;
69 enum _msm8996_version version;
70
71 msm_id = qcom_smem_get(QCOM_SMEM_HOST_ANY, MSM_ID_SMEM, &len);
72 if (IS_ERR(msm_id))
73 return NUM_OF_MSM8996_VERSIONS;
74
75 /* The first 4 bytes are format, next to them is the actual msm-id */
76 msm_id++;
77
78 switch ((enum _msm_id)*msm_id) {
79 case MSM8996V3:
80 case APQ8096V3:
81 version = MSM8996_V3;
82 break;
83 case MSM8996SG:
84 case APQ8096SG:
85 version = MSM8996_SG;
86 break;
87 default:
88 version = NUM_OF_MSM8996_VERSIONS;
89 }
90
91 return version;
92}
93
Sricharan R7d127092019-07-25 12:41:31 +020094static int qcom_cpufreq_kryo_name_version(struct device *cpu_dev,
95 struct nvmem_cell *speedbin_nvmem,
Niklas Cassel57f2f8b2019-07-25 12:41:33 +020096 struct qcom_cpufreq_drv *drv)
Sricharan R7d127092019-07-25 12:41:31 +020097{
98 size_t len;
99 u8 *speedbin;
100 enum _msm8996_version msm8996_version;
101
102 msm8996_version = qcom_cpufreq_get_msm_id();
103 if (NUM_OF_MSM8996_VERSIONS == msm8996_version) {
104 dev_err(cpu_dev, "Not Snapdragon 820/821!");
105 return -ENODEV;
106 }
107
108 speedbin = nvmem_cell_read(speedbin_nvmem, &len);
109 if (IS_ERR(speedbin))
110 return PTR_ERR(speedbin);
111
112 switch (msm8996_version) {
113 case MSM8996_V3:
Niklas Cassel57f2f8b2019-07-25 12:41:33 +0200114 drv->versions = 1 << (unsigned int)(*speedbin);
Sricharan R7d127092019-07-25 12:41:31 +0200115 break;
116 case MSM8996_SG:
Niklas Cassel57f2f8b2019-07-25 12:41:33 +0200117 drv->versions = 1 << ((unsigned int)(*speedbin) + 4);
Sricharan R7d127092019-07-25 12:41:31 +0200118 break;
119 default:
120 BUG();
121 break;
122 }
123
124 kfree(speedbin);
125 return 0;
126}
127
Niklas Cassel57f2f8b2019-07-25 12:41:33 +0200128static const struct qcom_cpufreq_match_data match_data_kryo = {
129 .get_version = qcom_cpufreq_kryo_name_version,
130};
131
Niklas Cassel1cb83392019-07-25 12:41:35 +0200132static const char *qcs404_genpd_names[] = { "cpr", NULL };
133
134static const struct qcom_cpufreq_match_data match_data_qcs404 = {
135 .genpd_names = qcs404_genpd_names,
136};
137
Sricharan R7d127092019-07-25 12:41:31 +0200138static int qcom_cpufreq_probe(struct platform_device *pdev)
Ilia Lin46e28562018-05-30 05:39:28 +0300139{
Niklas Cassel57f2f8b2019-07-25 12:41:33 +0200140 struct qcom_cpufreq_drv *drv;
Ilia Lin46e28562018-05-30 05:39:28 +0300141 struct nvmem_cell *speedbin_nvmem;
142 struct device_node *np;
143 struct device *cpu_dev;
144 unsigned cpu;
Sricharan R7d127092019-07-25 12:41:31 +0200145 const struct of_device_id *match;
Ilia Lin46e28562018-05-30 05:39:28 +0300146 int ret;
147
148 cpu_dev = get_cpu_device(0);
Dan Carpenter1dd20582018-06-21 11:06:41 +0300149 if (!cpu_dev)
150 return -ENODEV;
Ilia Lin46e28562018-05-30 05:39:28 +0300151
Ilia Lin46e28562018-05-30 05:39:28 +0300152 np = dev_pm_opp_of_get_opp_desc_node(cpu_dev);
Dan Carpenter1dd20582018-06-21 11:06:41 +0300153 if (!np)
154 return -ENOENT;
Ilia Lin46e28562018-05-30 05:39:28 +0300155
156 ret = of_device_is_compatible(np, "operating-points-v2-kryo-cpu");
157 if (!ret) {
158 of_node_put(np);
159 return -ENOENT;
160 }
161
Niklas Cassel57f2f8b2019-07-25 12:41:33 +0200162 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
163 if (!drv)
164 return -ENOMEM;
165
166 match = pdev->dev.platform_data;
167 drv->data = match->data;
168 if (!drv->data) {
169 ret = -ENODEV;
170 goto free_drv;
Ilia Lin46e28562018-05-30 05:39:28 +0300171 }
172
Niklas Cassel57f2f8b2019-07-25 12:41:33 +0200173 if (drv->data->get_version) {
174 speedbin_nvmem = of_nvmem_cell_get(np, NULL);
175 if (IS_ERR(speedbin_nvmem)) {
176 if (PTR_ERR(speedbin_nvmem) != -EPROBE_DEFER)
177 dev_err(cpu_dev,
178 "Could not get nvmem cell: %ld\n",
179 PTR_ERR(speedbin_nvmem));
180 ret = PTR_ERR(speedbin_nvmem);
181 goto free_drv;
182 }
Ilia Lin46e28562018-05-30 05:39:28 +0300183
Niklas Cassel57f2f8b2019-07-25 12:41:33 +0200184 ret = drv->data->get_version(cpu_dev, speedbin_nvmem, drv);
185 if (ret) {
186 nvmem_cell_put(speedbin_nvmem);
187 goto free_drv;
188 }
189 nvmem_cell_put(speedbin_nvmem);
190 }
191 of_node_put(np);
192
193 drv->opp_tables = kcalloc(num_possible_cpus(), sizeof(*drv->opp_tables),
194 GFP_KERNEL);
195 if (!drv->opp_tables) {
196 ret = -ENOMEM;
197 goto free_drv;
198 }
Viresh Kumar03349062019-02-20 16:41:18 +0530199
Niklas Cassel1cb83392019-07-25 12:41:35 +0200200 drv->genpd_opp_tables = kcalloc(num_possible_cpus(),
201 sizeof(*drv->genpd_opp_tables),
202 GFP_KERNEL);
203 if (!drv->genpd_opp_tables) {
204 ret = -ENOMEM;
205 goto free_opp;
206 }
207
Ilia Lin46e28562018-05-30 05:39:28 +0300208 for_each_possible_cpu(cpu) {
209 cpu_dev = get_cpu_device(cpu);
210 if (NULL == cpu_dev) {
211 ret = -ENODEV;
Niklas Cassel1cb83392019-07-25 12:41:35 +0200212 goto free_genpd_opp;
Ilia Lin46e28562018-05-30 05:39:28 +0300213 }
214
Niklas Cassel57f2f8b2019-07-25 12:41:33 +0200215 if (drv->data->get_version) {
216 drv->opp_tables[cpu] =
217 dev_pm_opp_set_supported_hw(cpu_dev,
218 &drv->versions, 1);
219 if (IS_ERR(drv->opp_tables[cpu])) {
220 ret = PTR_ERR(drv->opp_tables[cpu]);
221 dev_err(cpu_dev,
222 "Failed to set supported hardware\n");
Niklas Cassel1cb83392019-07-25 12:41:35 +0200223 goto free_genpd_opp;
224 }
225 }
226
227 if (drv->data->genpd_names) {
228 drv->genpd_opp_tables[cpu] =
229 dev_pm_opp_attach_genpd(cpu_dev,
230 drv->data->genpd_names,
231 NULL);
232 if (IS_ERR(drv->genpd_opp_tables[cpu])) {
233 ret = PTR_ERR(drv->genpd_opp_tables[cpu]);
234 if (ret != -EPROBE_DEFER)
235 dev_err(cpu_dev,
236 "Could not attach to pm_domain: %d\n",
237 ret);
238 goto free_genpd_opp;
Niklas Cassel57f2f8b2019-07-25 12:41:33 +0200239 }
Ilia Lin46e28562018-05-30 05:39:28 +0300240 }
241 }
242
243 cpufreq_dt_pdev = platform_device_register_simple("cpufreq-dt", -1,
244 NULL, 0);
Viresh Kumar03349062019-02-20 16:41:18 +0530245 if (!IS_ERR(cpufreq_dt_pdev)) {
Niklas Cassel57f2f8b2019-07-25 12:41:33 +0200246 platform_set_drvdata(pdev, drv);
Ilia Lin46e28562018-05-30 05:39:28 +0300247 return 0;
Viresh Kumar03349062019-02-20 16:41:18 +0530248 }
Ilia Lin46e28562018-05-30 05:39:28 +0300249
250 ret = PTR_ERR(cpufreq_dt_pdev);
251 dev_err(cpu_dev, "Failed to register platform device\n");
252
Niklas Cassel1cb83392019-07-25 12:41:35 +0200253free_genpd_opp:
254 for_each_possible_cpu(cpu) {
255 if (IS_ERR_OR_NULL(drv->genpd_opp_tables[cpu]))
256 break;
257 dev_pm_opp_detach_genpd(drv->genpd_opp_tables[cpu]);
258 }
259 kfree(drv->genpd_opp_tables);
Ilia Lin46e28562018-05-30 05:39:28 +0300260free_opp:
261 for_each_possible_cpu(cpu) {
Niklas Cassel57f2f8b2019-07-25 12:41:33 +0200262 if (IS_ERR_OR_NULL(drv->opp_tables[cpu]))
Ilia Lin46e28562018-05-30 05:39:28 +0300263 break;
Niklas Cassel57f2f8b2019-07-25 12:41:33 +0200264 dev_pm_opp_put_supported_hw(drv->opp_tables[cpu]);
Ilia Lin46e28562018-05-30 05:39:28 +0300265 }
Niklas Cassel57f2f8b2019-07-25 12:41:33 +0200266 kfree(drv->opp_tables);
267free_drv:
268 kfree(drv);
Ilia Lin46e28562018-05-30 05:39:28 +0300269
270 return ret;
271}
272
Sricharan R7d127092019-07-25 12:41:31 +0200273static int qcom_cpufreq_remove(struct platform_device *pdev)
Ilia Lin5ad73462018-06-17 22:01:46 +0200274{
Niklas Cassel57f2f8b2019-07-25 12:41:33 +0200275 struct qcom_cpufreq_drv *drv = platform_get_drvdata(pdev);
Viresh Kumar03349062019-02-20 16:41:18 +0530276 unsigned int cpu;
277
Ilia Lin5ad73462018-06-17 22:01:46 +0200278 platform_device_unregister(cpufreq_dt_pdev);
Viresh Kumar03349062019-02-20 16:41:18 +0530279
Niklas Cassel1cb83392019-07-25 12:41:35 +0200280 for_each_possible_cpu(cpu) {
Niklas Cassel57f2f8b2019-07-25 12:41:33 +0200281 if (drv->opp_tables[cpu])
282 dev_pm_opp_put_supported_hw(drv->opp_tables[cpu]);
Niklas Cassel1cb83392019-07-25 12:41:35 +0200283 if (drv->genpd_opp_tables[cpu])
284 dev_pm_opp_detach_genpd(drv->genpd_opp_tables[cpu]);
285 }
Viresh Kumar03349062019-02-20 16:41:18 +0530286
Niklas Cassel57f2f8b2019-07-25 12:41:33 +0200287 kfree(drv->opp_tables);
Niklas Cassel1cb83392019-07-25 12:41:35 +0200288 kfree(drv->genpd_opp_tables);
Niklas Cassel57f2f8b2019-07-25 12:41:33 +0200289 kfree(drv);
Viresh Kumar03349062019-02-20 16:41:18 +0530290
Ilia Lin5ad73462018-06-17 22:01:46 +0200291 return 0;
292}
293
Sricharan R7d127092019-07-25 12:41:31 +0200294static struct platform_driver qcom_cpufreq_driver = {
295 .probe = qcom_cpufreq_probe,
296 .remove = qcom_cpufreq_remove,
Ilia Lin46e28562018-05-30 05:39:28 +0300297 .driver = {
Sricharan R7d127092019-07-25 12:41:31 +0200298 .name = "qcom-cpufreq-nvmem",
Ilia Lin46e28562018-05-30 05:39:28 +0300299 },
300};
301
Sricharan R7d127092019-07-25 12:41:31 +0200302static const struct of_device_id qcom_cpufreq_match_list[] __initconst = {
Niklas Cassel57f2f8b2019-07-25 12:41:33 +0200303 { .compatible = "qcom,apq8096", .data = &match_data_kryo },
304 { .compatible = "qcom,msm8996", .data = &match_data_kryo },
Niklas Cassel1cb83392019-07-25 12:41:35 +0200305 { .compatible = "qcom,qcs404", .data = &match_data_qcs404 },
Sricharan R7d127092019-07-25 12:41:31 +0200306 {},
Ilia Lin46e28562018-05-30 05:39:28 +0300307};
308
309/*
310 * Since the driver depends on smem and nvmem drivers, which may
311 * return EPROBE_DEFER, all the real activity is done in the probe,
312 * which may be defered as well. The init here is only registering
313 * the driver and the platform device.
314 */
Sricharan R7d127092019-07-25 12:41:31 +0200315static int __init qcom_cpufreq_init(void)
Ilia Lin46e28562018-05-30 05:39:28 +0300316{
317 struct device_node *np = of_find_node_by_path("/");
318 const struct of_device_id *match;
319 int ret;
320
321 if (!np)
322 return -ENODEV;
323
Sricharan R7d127092019-07-25 12:41:31 +0200324 match = of_match_node(qcom_cpufreq_match_list, np);
Ilia Lin46e28562018-05-30 05:39:28 +0300325 of_node_put(np);
326 if (!match)
327 return -ENODEV;
328
Sricharan R7d127092019-07-25 12:41:31 +0200329 ret = platform_driver_register(&qcom_cpufreq_driver);
Ilia Lin46e28562018-05-30 05:39:28 +0300330 if (unlikely(ret < 0))
331 return ret;
332
Sricharan R7d127092019-07-25 12:41:31 +0200333 cpufreq_pdev = platform_device_register_data(NULL, "qcom-cpufreq-nvmem",
334 -1, match, sizeof(*match));
335 ret = PTR_ERR_OR_ZERO(cpufreq_pdev);
Ilia Lin46e28562018-05-30 05:39:28 +0300336 if (0 == ret)
337 return 0;
338
Sricharan R7d127092019-07-25 12:41:31 +0200339 platform_driver_unregister(&qcom_cpufreq_driver);
Ilia Lin46e28562018-05-30 05:39:28 +0300340 return ret;
341}
Sricharan R7d127092019-07-25 12:41:31 +0200342module_init(qcom_cpufreq_init);
Ilia Lin46e28562018-05-30 05:39:28 +0300343
Sricharan R7d127092019-07-25 12:41:31 +0200344static void __exit qcom_cpufreq_exit(void)
Ilia Lin5ad73462018-06-17 22:01:46 +0200345{
Sricharan R7d127092019-07-25 12:41:31 +0200346 platform_device_unregister(cpufreq_pdev);
347 platform_driver_unregister(&qcom_cpufreq_driver);
Ilia Lin5ad73462018-06-17 22:01:46 +0200348}
Sricharan R7d127092019-07-25 12:41:31 +0200349module_exit(qcom_cpufreq_exit);
Ilia Lin5ad73462018-06-17 22:01:46 +0200350
Sricharan R7d127092019-07-25 12:41:31 +0200351MODULE_DESCRIPTION("Qualcomm Technologies, Inc. CPUfreq driver");
Ilia Lin46e28562018-05-30 05:39:28 +0300352MODULE_LICENSE("GPL v2");